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[Keyword] time(2217hit)

621-640hit(2217hit)

  • Improvement of Address Discharge Delay Time Using Modified Reset Waveform in AC Plasma Display Panel

    Bhum Jae SHIN  Hyung Dal PARK  Heung-Sik TAE  

     
    PAPER-Electronic Displays

      Vol:
    E95-C No:5
      Page(s):
    958-963

    In order to improve the address discharge characteristics, we propose the modified selective reset waveform utilizing the address-bias voltage (Va-bias) during the ramp-up period. It is revealed that the proper Va-bias makes the weak discharge between the address and scan electrodes which plays a role in sufficiently removing the wall charge, thereby contributing to minimizing the wall-voltage variation during the address-period. As a result of adopting the Va-bias in the conventional selective reset driving waveform, it was found that the address discharge delay time can be shortened by approximately 40 ns and the address period of each subfield can be significantly reduced by about 43 µs.

  • A Schmitt Trigger Based SRAM with Vertical MOSFET

    Hyoungjun NA  Tetsuo ENDOH  

     
    PAPER

      Vol:
    E95-C No:5
      Page(s):
    792-801

    In this paper, a Schmitt Trigger based 10T SRAM (ST 10T SRAM) cell with the vertical MOSFET is proposed for low supply voltage operation, and its impacts on cell size, stability and speed performance are investigated. The proposed ST 10T SRAM cell with the vertical MOSFET achieves smaller cell size than the ST 10T SRAM cell with the conventional planar MOSFET. Moreover, the proposed SRAM cell realizes large and constant static noise margin (SNM) against bottom node resistance of the vertical MOSFET without any architectural changes from the present 6T SRAM architecture. The proposed SRAM cell also suppresses the degradation of the read time of the ST 10T SRAM cell due to the back-bias effect free characteristic of the vertical MOSFET. The proposed ST 10T SRAM cell with the vertical MOSFET is a superior SRAM cell for low supply voltage operation with a small cell size, stable operation, and fast speed performance with the present 6T SRAM architecture.

  • Stochastic Power Minimization of Real-Time Tasks with Probabilistic Computations under Discrete Clock Frequencies

    Hyung Goo PAEK  Jeong Mo YEO  Kyong Hoon KIM  Wan Yeon LEE  

     
    LETTER-System Analysis

      Vol:
    E95-D No:5
      Page(s):
    1380-1383

    The proposed scheduling scheme minimizes the mean power consumption of real-time tasks with probabilistic computation amounts while meeting their deadlines. Our study formally solves the minimization problem under finitely discrete clock frequencies with irregular power consumptions, whereas state-of-the-arts studies did under infinitely continuous clock frequencies with regular power consumptions.

  • Mobility-Based Mobile Relay Selection in MANETs

    Gilnam KIM  Hyoungjoo LEE  Kwang Bok LEE  

     
    PAPER-Network

      Vol:
    E95-B No:5
      Page(s):
    1643-1650

    The future wireless mobile communication networks are expected to provide seamless wireless access and data exchange to mobile users. In particular, it is expected that the demand for ubiquitous data exchange between mobile users will increase with the widespread use of various wireless applications of the intelligent transportation system (ITS) and intelligent vehicles. Mobile ad hoc networks (MANETs) are one of the representative research areas pursuing the technology needed to satisfy the increasing mobile communication requirements. However, most of the works on MANET systems do not take into account the continuous and dynamic changes of nodal mobility to accommodate system design and performance evaluation. The mobility of nodes limits the reliability of communication between the source and the destination node since a link between two continuously moving nodes is established only when one node enters the transmission range of the other. To alleviate this problem, mobile relay has been studied. In particular, it is shown that relay selection is an efficient way to support nodal mobility in MANET systems. In this paper, we propose a mobility-based relay selection algorithm for the MANET environment. Firstly, we define the lifetime as the maximum link duration for which the link between two nodes remains active. Therefore, the lifetime indicates the reliability of the relay link which measures its capability to successfully support relayed communication when requested by the source node. Furthermore, we consider a series of realistic scenarios according to the randomness of nodal mobility. Thus, the proposed algorithm can be easily applied in practical MANET systems by choosing the appropriate node mobility behavior. The numerical results show that the improved reliability of the proposed algorithm's relayed communication is achieved with a proper number of mobile relay nodes rather than with the conventional selection algorithm. Lastly, we show that random mobility of the individual nodes enhances reliability of the network in a sparse network environment.

  • Geometrical Positioning Schemes Based on Hybrid Lines of Position

    Chien-Sheng CHEN  Jium-Ming LIN  Wen-Hsiung LIU  Ching-Lung CHI  

     
    LETTER-Signal Processing

      Vol:
    E95-D No:5
      Page(s):
    1336-1340

    To achieve more accurate measurements of the mobile station (MS) location, it is possible to integrate many kinds of measurements. In this paper we proposed several simpler methods that utilized time of arrival (TOA) at three base stations (BSs) and the angle of arrival (AOA) information at the serving BS to give location estimation of the MS in non-line-of-sight (NLOS) environments. From the viewpoint of geometric approach, for each a TOA value measured at any BS, one can generate a circle. Rather than applying the nonlinear circular lines of position (LOP), the proposed methods are much easier by using linear LOP to determine the MS. Numerical results demonstrate that the calculation time of using linear LOP is much less than employing circular LOP. Although the location precision of using linear LOP is only reduced slightly. However, the proposed efficient methods by using linear LOP can still provide precise solution of MS location and reduce the computational effort greatly. In addition, the proposed methods with less effort can mitigate the NLOS effect, simply by applying the weighted sum of the intersections between different linear LOP and the AOA line, without requiring priori knowledge of NLOS error statistics. Simulation results show that the proposed methods can always yield superior performance in comparison with Taylor series algorithm (TSA) and the hybrid lines of position algorithm (HLOP).

  • Stable Adaptive Work-Stealing for Concurrent Many-Core Runtime Systems

    Yangjie CAO  Hongyang SUN  Depei QIAN  Weiguo WU  

     
    PAPER-Fundamentals of Information Systems

      Vol:
    E95-D No:5
      Page(s):
    1407-1416

    The proliferation of many-core architectures has led to the explosive development of parallel applications using programming models, such as OpenMP, TBB, and Cilk/Cilk++. With increasing number of cores, however, it becomes even harder to efficiently schedule parallel applications on these resources since current many-core runtime systems still lack effective mechanisms to support collaborative scheduling of these applications. In this paper, we study feedback-driven adaptive scheduling based on work stealing, which provides an efficient solution for concurrently executing a set of applications on many-core systems. To dynamically estimate the number of cores desired by each application, a stable feedback-driven adaptive algorithm, called SAWS, is proposed using active workers and the length of active deques, which well captures the runtime characteristics of the applications. Furthermore, a prototype system is built by extending the Cilk runtime system, and the experimental results, which are obtained on a Sun Fire server, show that SAWS has more advantages for scheduling concurrent parallel applications. Specifically, compared with existing algorithms A-Steal and WS-EQUI, SAWS improves the performances by up to 12.43% and 21.32% with respect to mean response time respectively, and 25.78% and 46.98% with respect to processor utilization, respectively.

  • Decentralized Supervisory Control of Timed Discrete Event Systems Using a Partition of the Forcible Event Set

    Masashi NOMURA  Shigemasa TAKAI  

     
    PAPER-Concurrent Systems

      Vol:
    E95-A No:5
      Page(s):
    952-960

    In the framework of decentralized supervisory control of timed discrete event systems (TDESs), each local supervisor decides the set of events to be enabled to occur and the set of events to be forced to occur under its own local observation in order for a given specification to be satisfied. In this paper, we focus on fusion rules for the enforcement decisions and adopt the combined fusion rule using the AND rule and the OR rule. We first derive necessary and sufficient conditions for the existence of a decentralized supervisor under the combined fusion rule for a given partition of the set of forcible events. We next study how to find a suitable partition.

  • Reduced-Reference Video Quality Estimation Using Representative Luminance

    Toru YAMADA  Yoshihiro MIYAMOTO  Masahiro SERIZAWA  Takao NISHITANI  

     
    PAPER-Measurement Technology

      Vol:
    E95-A No:5
      Page(s):
    961-968

    This paper proposes a video-quality estimation method based on a reduced-reference model for realtime quality monitoring in video streaming services. The proposed method chooses representative-luminance values for individual original-video frames at a server side and transmits those values, along with the pixel-position information of the representative-luminance values in each frame. On the basis of this information, peak signal-to-noise ratio (PSNR) values at client sides can be estimated. This enables realtime monitoring of video-quality degradation by transmission errors. Experimental results show that accurate PSNR estimation can be achieved with additional information at a low bit rate. For SDTV video sequences which are encoded at 1 to 5 Mbps, accurate PSNR estimation (correlation coefficient of 0.92 to 0.95) is achieved with small amount of additional information of 10 to 50 kbps. This enables accurate realtime quality monitoring in video streaming services without average video-quality degradation.

  • Fluctuation Tolerant Charge-Integration Read Scheme for Ultrafast DNA Sequencing with Nanopore Device

    Kazuo ONO  Yoshimitsu YANAGAWA  Akira KOTABE  Riichiro TAKEMURA  Tatsuo NAKAGAWA  Tomio IWASAKI  Takayuki KAWAHARA  

     
    PAPER

      Vol:
    E95-C No:4
      Page(s):
    651-660

    A charge-integration read scheme has been developed for a solid-nanopore DNA-sequencer that determines a genome by direct and electrical measurements of transverse tunneling current in single-stranded DNA. The magnitude of the current was simulated with a first-principles molecular dynamics method. It was found that the magnitude is as small as in the sub-pico ampere range, and signals from four bases represent wide distributions with overlaps between each base. The distribution is believed to originate with translational and rotational motion of DNA in a nanopore with a frequency of over 105 Hz. A sequence scheme is presented to distinguish the distributed signals. The scheme makes widely distributed signals time-integrated convergent by cumulating charge at the capacitance of a nanopore device and read circuits. We estimated that an integration time of 1.4 ms is sufficient to obtain a signal difference of over 10 mV for distinguishing between each DNA base. Moreover, the time is shortened if paired bases, such as A-T and C-G in double-stranded DNA, can be measured simultaneously with two nanopores. Circuit simulations, which included the capacitance of a nanopore calculated with a device simulator, successfully distinguished between DNA bases in less than 2.0 ms. The speed is roughly six orders faster than that of a conventional DNA sequencer. It is possible to determine the human genome in one day if 100-nanopores are operated in parallel.

  • A Scheduling Algorithm for Connected Target Coverage in Rotatable Directional Sensor Networks

    Youn-Hee HAN  Chan-Myung KIM  Joon-Min GIL  

     
    PAPER-Network

      Vol:
    E95-B No:4
      Page(s):
    1317-1328

    A key challenge in developing energy-efficient sensor networks is to extend network lifetime in resource-limited environments. As sensors are often densely distributed, they can be scheduled on alternative duty cycles to conserve energy while satisfying the system requirements. Directional sensor networks composed of a large number of directional sensors equipped with a limited battery and with a limited angle of sensing have recently attracted attention. Many types of directional sensors can rotate to face a given direction. Maximizing network lifetime while covering all of the targets in a given area and forwarding sensor data to the sink is a challenge in developing such rotatable directional sensor networks. In this paper, we address the maximum directional cover tree (MDCT) problem of organizing directional sensors into a group of non-disjoint subsets to extend network lifetime. One subset, in which the directional sensors cover all of the targets and forward the data to the sink, is activated at a time, while the others sleep to conserve energy. For the MDCT problem, we first present an energy-consumption model that mainly takes into account the energy expenditure for sensor rotation as well as for the sensing and relaying of data. We also develop a heuristic scheduling algorithm called directional coverage and connectivity (DCC)-greedy to solve the MDCT problem. To verify and evaluate the algorithm, we conduct extensive simulations and show that it extends network lifetime to a reasonable degree.

  • A Continuous Query Allocation Scheme with Time-Parameters in Wireless Sensor Networks with Multiple Sinks

    Myungho YEO  Junho PARK  Haksin KIM  Jaesoo YOO  

     
    LETTER-Network

      Vol:
    E95-B No:4
      Page(s):
    1431-1434

    In this paper, we propose a novel scheme to optimize the allocation of continuous queries in a sensor network with multiple sinks. The existing scheme compares the coverage areas of given queries and estimates the amount of sharing among them. It tries to allocate queries to the optimal sink that maximizes the amount of sharing and reduces the communication costs among sensor nodes and sinks. However, it inefficiently allocates continuous queries. The amount of sharing among continuous queries depends not only on their coverage area but also on their time-parameters like time-duration and time-interval. We define a new cost estimator with time-parameters for continuous queries and optimize their allocation in the sensor network. Simulation results show that our scheme performs the allocation of continuous queries efficiently and reduces the communication cost.

  • An Ultra-Low Voltage Analog Front End for Strain Gauge Sensory System Application in 0.18 µm CMOS

    Alexander EDWARD  Pak Kwong CHAN  

     
    PAPER-Electronic Circuits

      Vol:
    E95-C No:4
      Page(s):
    733-743

    This paper presents analysis and design of a new ultra-low voltage analog front end (AFE) dedicated to strain sensor applications. The AFE, designed in 0.18 µm CMOS process, features a chopper-stabilized instrumentation amplifier (IA), a balanced active MOSFET-C 2nd order low pass filter (LPF), a clock generator and a voltage booster which operate at supply voltage (Vdd) of 0.6 V. The designed IA achieves 30 dB of closed-loop gain, 101 dB of common-mode rejection ratio (CMRR) at 50 Hz, 80 dB of power-supply rejection ratio (PSRR) at 50 Hz, thermal noise floor of 53.4 nV/, current consumption of 14 µA, and noise efficiency factor (NEF) of 9.7. The high CMRR and rail-to-rail output swing capability is attributed to a new low voltage realization of the active-bootstrapped technique using a pseudo-differential gain-boosting operational transconductance amplifier (OTA) and proposed current-driven bulk (CDB) biasing technique. An output capacitor-less low-dropout regulator (LDO), with a new fast start-up LPF technique, is used to regulate this 0.6 V supply from a 0.8–1.0 V energy harvesting power source. It achieves power supply rejection (PSR) of 42 dB at frequency of 1 MHz. A cascode compensated pseudo differential amplifier is used as the filter's building block for low power design. The filter's single-ended-to-balanced converter is implemented using a new low voltage amplifier with two-stage common-mode cancellation. The overall AFE was simulated to have 65.6 dB of signal-to-noise ratio (SNR), total harmonic distortion (THD) of less than 0.9% for a 100 Hz sinusoidal maximum input signal, bandwidth of 2 kHz, and power consumption of 51.2 µW. Spectre RF simulations were performed to validate the design using BSIM3V3 transistor models provided by GLOBALFOUNDRIES 0.18 µm CMOS process.

  • Design of a Tree-Queue Model for a Large-Scale System

    Byungsung PARK  Jaeyeong YOO  Hagbae KIM  

     
    LETTER-Dependable Computing

      Vol:
    E95-D No:4
      Page(s):
    1159-1161

    In a large queuing system, the effect of the ratio of the filled data on the queue and waiting time from the head of a queue to the service gate are important factors for process efficiency because they are too large to ignore. However, many research works assumed that the factors can be considered to be negligible according to the queuing theory. Thus, the existing queuing models are not applicable to the design of large-scale systems. Such a system could be used as a product classification center for a home delivery service. In this paper, we propose a tree-queue model for large-scale systems that is more adaptive to efficient processes compared to existing models. We analyze and design a mean waiting time equation related to the ratio of the filled data in the queue. Based on simulations, the proposed model demonstrated improvement in process-efficiency, and it is more suitable to realistic system modeling than other compared models for large-scale systems.

  • High Uniqueness Arbiter-Based PUF Circuit Utilizing RG-DTM Scheme for Identification and Authentication Applications

    Mitsuru SHIOZAKI  Kota FURUHASHI  Takahiko MURAYAMA  Akitaka FUKUSHIMA  Masaya YOSHIKAWA  Takeshi FUJINO  

     
    PAPER

      Vol:
    E95-C No:4
      Page(s):
    468-477

    Silicon Physical Unclonable Functions (PUFs) have been proposed to exploit inherent characteristics caused by process variations, such as transistor size, threshold voltage and so on, and to produce an inexpensive and tamper-resistant device such as IC identification, authentication and key generation. We have focused on the arbiter-PUF utilizing the relative delay-time difference between the equivalent paths. The conventional arbiter-PUF has a technical issue, which is low uniqueness caused by the ununiformity on response-generation. To enhance the uniqueness, a novel arbiter-based PUF utilizing the Response Generation according to the Delay Time Measurement (RG-DTM) scheme, has been proposed. In the conventional arbiter-PUF, the response 0 or 1 is assigned according to the single threshold of relative delay-time difference. On the contrary, the response 0 or 1 is assigned according to the multiple threshold of relative delay-time difference in the RG-DTM PUF. The conventional and RG-DTM PUF were designed and fabricated with 0.18 µm CMOS technology. The Hamming distances (HDs) between different chips, which indicate the uniqueness, were calculated by 256-bit responses from the identical challenges on each chip. The ideal distribution of HDs, which indicates high uniqueness, is achieved in the RG-DTM PUF using 16 thresholds of relative delay-time differences. The generative stability, which is the fluctuation of responses in the same environment, and the environmental stability, which is the changes of responses in the different environment were also evaluated. There is a trade-off between high uniqueness and high stability, however, the experimental data shows that the RG-DTM PUF has extremely smaller false matching probability in the identification compared to the conventional PUF.

  • Signal Separation and Reconstruction Method for Simultaneously Received Multi-System Signals in Flexible Wireless System

    Takayuki YAMADA  Doohwan LEE  Hiroyuki SHIBA  Yo YAMAGUCHI  Kazunori AKABANE  Kazuhiro UEHARA  

     
    PAPER

      Vol:
    E95-B No:4
      Page(s):
    1085-1092

    We previously proposed a unified wireless system called “Flexible Wireless System”. Comprising of flexible access points and a flexible signal processing unit, it collectively receives a wideband spectrum that includes multiple signals from various wireless systems. In cases of simultaneous multiple signal reception, however, reception performance degrades due to the interference among multiple signals. To address this problem, we propose a new signal separation and reconstruction method for spectrally overlapped signals. The method analyzes spectral information obtained by the short-time Fourier transform to extract amplitude and phase values at each center frequency of overlapped signals at a flexible signal processing unit. Using these values enables signals from received radio wave data to be separated and reconstructed for simultaneous multi-system reception. In this paper, the BER performance of the proposed method is evaluated using computer simulations. Also, the performance of the interference suppression is evaluated by analyzing the probability density distribution of the amplitude of the overlapped interference on a symbol of the received signal. Simulation results confirmed the effectiveness of the proposed method.

  • A 580 fs-Resolution Time-to-Digital Converter Utilizing Differential Pulse-Shrinking Buffer Ring in 0.18 µm CMOS Technology

    Tetsuya IIZUKA  Satoshi MIURA  Ryota YAMAMOTO  Yutaka CHIBA  Shunichi KUBO  Kunihiro ASADA  

     
    PAPER

      Vol:
    E95-C No:4
      Page(s):
    661-667

    This paper proposes a sub-ps resolution TDC utilizing a differential pulse-shrinking buffer ring. This scheme uses two differentially-operated pulse-shrinking inverters and the TDC resolution is finely controlled by the transistor size ratio between them. The proposed TDC realizes 9 bit, 580 fs resolution in a 0.18 µm CMOS technology with 0.04 mm2 area, and achieves DNL and INL of +0.8/-0.8LSB and +4.3/-4.0LSB, respectively, without linearity calibration. A power dissipation at 1.5 MS/s ranges from 10.8 to 12.6 mW depending on the input time intervals.

  • Asynchronous Circuit Design on Field Programmable Gate Array Devices

    Jung-Lin YANG  Shin-Nung LU  Pei-Hsuan YU  

     
    PAPER

      Vol:
    E95-C No:4
      Page(s):
    516-522

    Developing a rapid prototyping environment utilizing hardware description languages (HDLs) and conventional FPGAs can help ease and conquer the difficulties caused by the complexity of asynchronous digital systems and the advance of VLSI technology recently. We proposed a design flow and a FPGA template for implementing generalized C-element (gC) style asynchronous controllers. Utilizing conventional FPGA synthesis tools, self-timed bundled-data function modules can be realized with some effort on timing validation. The proposed design flow with FPGA-based realization approach is a very effective design methodology for rapid prototyping and functionality validation. This work could be useful for the early stage of performance estimation, power reduction exploration, circuits design training, and many other applications regarded asynchronous circuits. In this paper, the proposed FPGA-based asynchronous circuit design flow, a hands-on design tutorial, a generalized C-element template, and a list of synthesized benchmark circuits are documented and discussed in detail.

  • DOA Estimation of Multiple Speech Sources from a Stereophonic Mixture in Underdetermined Case

    Ning DING  Nozomu HAMADA  

     
    PAPER-Engineering Acoustics

      Vol:
    E95-A No:4
      Page(s):
    735-744

    This paper proposes a direction-of-arrival (DOA) estimation method of multiple speech sources from a stereophonic mixture in an underdetermined case where the number of sources exceeds the number of sensors. The method relies on the sparseness of speech signals in time-frequency (T-F) domain representation which means multiple independent speakers have a small overlap. At first, a selection of T-F cells bearing reliable spatial information is proposed by an introduced reliability index which is defined by the estimated interaural phase difference at each T-F cell. Then, a statistical error propagation model between the phase difference at T-F cell and its consequent DOA is introduced. By employing this model and the sparseness in T-F domain the DOA estimation problem is altered to obtaining local peaks of probability density function of DOA. Finally the kernel density estimator approach based on the proposed statistical model is applied. The performance of the proposed method is assessed by conducted experiments. Our method outperforms others both in accuracy for real observed data and in robustness for simulation with additional diffused noise.

  • A Continuous Skyline Processing Method Using Competitive Mechanisms in Wireless Sensor Networks

    Su Min JANG  Choon Seo PARK  Jae Soo YOO  

     
    LETTER-Network

      Vol:
    E95-B No:3
      Page(s):
    1003-1006

    Skyline queries on sensor networks have attracted much attention from the database research community due to their wide applications related to multi-criteria decision making. The existing methods use filters that are based on the data locality of sensor nodes and routing paths. However, they have two serious problems: i) unnecessary data transmission is still to frequent. ii) the processing cost of a continuous skyline query on high-dimensional data is very high. In this paper, we propose a new method that uses competitive mechanisms for processing continuous skyline queries. The proposed method dramatically reduces the data transmissions of sensors and quickly processes a continuous skyline query on high-dimensional data. An extensive performance study verifies the merits of our new method.

  • Adaptive Timer-Based Countermeasures against TCP SYN Flood Attacks

    Masao TANABE  Hirofumi AKAIKE  Masaki AIDA  Masayuki MURATA  Makoto IMASE  

     
    PAPER-Internet

      Vol:
    E95-B No:3
      Page(s):
    866-875

    As a result of the rapid development of the Internet in recent years, network security has become an urgent issue. Distributed denial of service (DDoS) attacks are one of the most serious security issues. In particular, 60 percent of the DDoS attacks found on the Internet are TCP attacks, including SYN flood attacks. In this paper, we propose adaptive timer-based countermeasures against SYN flood attacks. Our proposal utilizes the concept of soft-state protocols that are widely used for resource management on the Internet. In order to avoid deadlock, a server releases resources using a time-out mechanism without any explicit requests from its clients. If we change the value of the timer in accordance with the network conditions, we can add more flexibility to the soft-state protocols. The timer is used to manage the resources assigned to half-open connections in a TCP 3-way handshake mechanism, and its value is determined adaptively according to the network conditions. In addition, we report our simulation results to show the effectiveness of our approach.

621-640hit(2217hit)