Recently, there has been a lot of research on solving combinatorial problems using Binary Decision Diagrams (BDDs), which are very efficient representations of Boolean functions. We have already developed a Boolean Expression Manipulator, which calculates and reduces Boolean expressions quickly based on BDD techniques. This greatly aids our works on developing VLSI CAD systems and solving combinatorial problems. Any combinatorial problem can be described in Boolean expressions; however, arithmetic operations, such as addition, subraction, multiplication, equality and inequality, are also used for describing many practical problems. Arithmetic operations provide simple descriptions of problems in many cases. In this paper, we present an arithmetic Boolean expression manipulator (BEM-), based on BDD techniques. BEM- calculates Boolean expressions containing arithmetic operations and then displays the results in various formats. It can solve problems represented by a set of equalities and inequalities, which are dealt with using 0-1 linear programming. We show the efficient data structure based on BDD representation, algorihms for manipulating Boolean expressions with arithmetic operations, and good formats for displaying the results. Finally we present the specification of BEM- and an example of application to the 8-Queens problem. BEM- is customizable to various applicationa. It has good computation performance in terms of the total time for programming and execution. We expect BEM- to be a helpful tool in research and development on digital systems.

Subcarrier multiplexing uses the available fiber bandwidth in optical transmission, efficiently. Semiconductor lasers, which are used as optical sources in such systems, exhibit nonlinear characteristics. Nonlinearity degrades the performance of such transmission systems. For nonlinearity compensation, nonlinear predistortion may be incorporated prior to the laser. Characteristics of this nonlinear block invert those of the laser source. Performance of the radio subcarrier multiplexed system with and without predistortion is evaluated by harmonic and intermodulation distortions analyses. Nonlinear distortion level decreases significantly when predistortion is employed prior to the laser. This enhancement results in system requirements on carrier-to-noise ratio being met for FM, 4-level QAM and HDTV (Zenith proposal) radio subcarriers. This amount of increase in carrier-to-noise ratio is a function of the optical modulation index.

Fiber-optic microcellular system has been studied actively as an excellent system for solving the equipment cost problems in microcellular systems. However, the occurrence of intermodulation distortion (IMD) arising from the nonlinearity of the laser diode used for E/O conversion which degrades the transmission quality is a serious problem in this system. In this paper, we propose a new frequency switching/IM3 reduction method, which dynamically reassigns the carrier frequencies to minimize the carrier to IMD power ratio under the hostile environment with time-varying received carrier strength, and analyze the performance improvements by the proposed method. The improvements obtained both for the worst value of the overall CNR and for the overall CNR in a specific user are numerically made clear. It is also shown that if the interval between frequency reassignings is set less than one second, a sufficient improvement in the overall CNR is achievable.

Fiber-optic passive double star (PDS) network is described as an access network for microcellular radio communication systems. The intrinsic characteristics of the PDS network, reduction in the optical fiber count and flexible access capability, are examined. A unit cell structure is introduced which enables the PDS network to be effectively incorporated into the access portion of microcellular radio communication systems. The reduced total fiber length in the unit cell structure based on the PDS network is discussed in comparison with the conventional architecture. Calculations show that there is an optimum splitting ratio that minimizes the total fiber length. When the microcell radius and service area radius are 100m and 10km, respectively, the total fiber length of the PDS network is reduced to only about 9% of that of the conventional single star (SS) network for a splitting ratio of 34. Resource sharing and handover between microcells in a unit cell are performed by using the dynamic channel allocation function of the PDS system. Substantial performance improvement for loaded traffic can be obtained by resource sharing. When the splitting ratio is 32, the available traffic of a base station (BS) increases from 0.9 [erl/BS] to 3.4 [erl/BS] by adopting dynamic channel allocation for the lost call probability of 0.01.

Let U denote a set comprising elements called "keys." The goal of the nearest point problem is to search quickly for a key among some keys x1 , xn that is the nearest to a reference key x under a partial order relation defined as (x, y) (x, z) for x, y, zU if d(x, y)d(x, z) given a wide-sense distance measure d. This article proposes a method of rearranging x1 , xn into a binary perfectly-balanced tree for solving quickly the nearest point problems. Further, computational performances of the proposed method are evaluated experimentally.

We discuss delay times derived from the current gain cutoff frequency of a heterostructure field effect transistor and describe three types of novel channel structures for millimeter-wave InP-based HFETs. The first structure discussed is a lattice-matched InGaAs HEMT with high state-of-the art performance. The second structure is an InAs-inserted InGaAs HEMT which harnesses the superior transport properties of InAs. Fabricated devices show high electron mobility of 12,800 cm2/Vs and high transconductance over 1.4 S/mm for a 0.6-µm-gate length. The effective saturation velocity in the device derived from the current gain cutoff frequency in 3.0107 cm/s. The third one is an InGaAs/InP double-channel HFET that utilizes the superior transport properties of InP at a high electric field. Fabricated double-channel devices show kink-free characteristics, high carrier density of 4.51012 cm-2 and high transconductance of 1.3 S/mm for a 0.6-µm-gate length. The estimated effective saturation velocity in these devices is 4.2107 cm/s. Also included is a discussion of the current gain cutoff frequency of ultra-short channel devices.

A model for a large network with an unidirectional linear respone (ULR) is proposed in this letter. This deterministic system has powerful computing properties in very close correspondence with earlier stochastic model based on McCulloch-Pitts neurons and graded neuron model based on sigmoid input-output relation. The exclusive OR problems and other digital computation properties of the earlier models also are present in the ULR model. Furthermore, many analog and continuous signal processing can also be performed using the simple ULR neural network. Several examples of the ULR neural networks for analog and continuous signal processing are presented and show extemely promising results in terms of performance, density and potential for analog and continuous signal processing. An algorithm for the ULR neural network is also developed and used to train the ULR network for many digital and analog as well as continuous problems successfully.

Recently, the small set of nonbinary Kasami sequences was presented and their correlation properties were clarified by Liu and Komo. The family of nonbinary Kasami sequences has the same periodic maximum nontrivial correlation as the family of Kumar-Moreno sequences, but smaller family size. In this paper, first it is shown that each of the nonbinary Kasami sequences is unbalanced. Secondly, a new family of nonbinary sequences obtained from modified Kasami sequences is proposed, and it is shown that the new family has the same maximum nontrivial correlation as the family of nonbinary Kasami sequences and consists of the balanced nonbinary sequences.

In this paper, a construction of de Bruijn sequences using maximum length linear sequences is considered. The construction is based on the well-known cross-join (CJ) method: Maximum length linear sequences are used to produce de Bruijn sequences by the CJ process. Properties of the CJ paris in the maximum length linear sequences are investigated. It is conjectured that the number of CJ pairs in a maximum length linear sequence is given by (22n-3+1)/3-2n-2, where n2 is the length of the linear feedback shift register with the sequence. The CJ paris for some special cases are obtained. An algorithm for finding CJ pairs is described and a method of implementation is discussed briefly.

This paper proposes new design methods for single b-bit (b2) byte error correcting and double bit error detecting code, called SbEC-DED code, suitable for high-speed memory systems using byte organized RAM chips. This new type of byte error control code is practical from the viewpoint of having less redundancy and stronger error control capability than the existing ones. A code design method using elements from a coset of subfield under addition gives the practical SbEC-DED code with 64 information bits and 4-bit byte length which has the same check-bit length, 12 bits, as that of the Hamming single byte error correcting code. This also has very high error detection capabilities of random double byte errors and of random triple bit errors.

A technique for reducing fiber four-wave mixing (FWM) in multichannel transmissions is proposed. Birefringent elements are inserted on the way of transmission lines. Due to the effect of birefringent elements on the polarization states, the effective crosstalk due to FWM is expected to be 3/16 of that in the worst case in conventional systems.

Asymptotic bounds are considered for unidirectional byte error-correcting codes. Upper bounds are developed from the concepts of the Singleton, Plotkin, and Hamming bounds. Lower bounds are also derived from a combination of the generalized concatenated code construction and the Varshamov-Gilbert bound. As the result, we find that there exist codes of low rate better than those on the basis of Hamming distance with respect to unidirectional byte error-correction.

A new Viterbi algorithm with adaptive path reduction method is presented. The proposed system consists of the pre-decoder and reduced path Virerbi decoder. The predecoder separates the mixed channel noise from the received sequence. The number of errors in the pre-decoded error sequence is counted and the path reduction is implemented by the number of errors in pre-decoded error sequence. The path reduction is implemented as a function of channel condition because the errors in the pre-decoded error sequence can be considered as the channel error sequence. Due to the reduction of the path, the number of ACS (add compare select) operations can be reduced, which occupies the dominant part in Viterbi decoding. The ACS reduction ratio for the proposed system achieves up to 30% for the case of (2, 1, 2) Ungerboeck code without degradation of the error performance.

Most of actual environmental systems show a complicated fluctuation pattern of non-Gaussian type, owing to various kinds of factors. In the actual measurement, the fluctuation of random signal is usually contaminated by an external noise. Furthermore, it is very often that the reliable observation value can be obtained only within a definite fluctuating amplitude domain, because many of measuring equipments have their proper dynamic range and original random wave form is unreliable at the end of amplitude fluctuation. It becomes very important to establish a new signal detection method applicable to such an actual situation. This paper newly describes a dynamical state estimation algorithm for a successive observation contaminated by the external noise of an arbitrary distribution type, when the observation value is measured through a finite dynamic range of measurement. On the basis of the Bayes' theorem, this method is derived in the form of a wide sense digital filter, which is applicable to the non-Gaussian properties of the fluctuations, the actual observation in a finite amplitude domain and the existence of external noise. Differing from the well-known Kalman's filter and its improvement, the proposed state estimation method is newly derived especially by paying our attention to the statistical information on the observation value behind the saturation function instead of that on the resultant noisy observation. Finally, the proposed method is experimentally confirmed too by applying it to the actual problem for a reverberation time measurement from saturated noisy observations in room acoustics.

This paper presents two new maximum likelihood decoding (MLD) algorithms for linear codes over Z-channel, which are much more efficient than conventional exhaustive algorithms for high rate codes. In the proposed algorithms, their complexities are reduced by employing the projecting set Cs of the code, which is determined by the "projecting" structure of the code. Space and computational complexities of algorithms mainly depend upon the size of Cs which is usually several times smaller than the total number of codewords. It is shown that the upper bounds on computational complexities of decoding algorithms are in proportion to the number of parity bits and the distance between an initial estimate of the codeword and the received word, respectively, while space complexities of them are equal to the size of Cs. Lastly, numerical examples clarify the average computational complexities of the proposed algorithms, and the efficiency of these algorithms for high rate codes is confirmed.

A new applicative design language is proposed for developing generators of data-path modules from hardware algorithms. The language includes a set of primitives that represent placement operations, parameterized cells, routing patterns and a set of transformation rules specifying modifications of the module topology without changing its functionality. Using the language, a hardware algorithm designer can easily define both the topological and geometrical specifications of module generation directly at the functional level without engaged in the layout details. A sketch of the language and an example of module design with the language is presented.

This paper tends to analyze the trends of the research in logic synthesis. The first part is devoted to an expertise of the efficiency of factorization methods developed during the last decade and to the proposal of dedicated methods for complex logic blocks. The second part shows the importance of Binary Decision Diagrams as representation of Boolean functions. Their use in the technology mapping phase of multiplexor-based FPGAs in an industrial tool is taken as illustration.

The small-signal negative resistance of QWITT (Quantum Well Transit-Time) diodes is calculated including the effect of field-dependent diffusion coefficient in the frequency range of 10 to 300 GHz. The drift velocity transient effect is also included. The result is compared with those obtained by using constant diffusion coefficients at average electric fields.

This paper describes IC-oriented high-performance AlGaAs/GaAs heterojunction bipolar transistors that were fabricated to demonstrate their great potential in applications to high-speed integrated circuits. A collector structure of ballistic collection transistors with a launcher (LBCTs) shortens the intrinsic delay time of the transistors. A novel and simple self-aligned fabrication process, which features an base-metal-overlaid structure (BMO), reduces emitter- and base-resistances and collector capacitance. The combination of the thin-collector LBCT layer structure and the BMO self-alignment technology raises the average value of cutoff frequency, fT, to 160 GHz with a standard deviation as small as 4.3 GHz. By modifying collector thickness and using Pt/Ti/Pt/Au as the base ohmic contact metal in BMO-LBCTs, the maximum oscillation frequency, fmax, reaches 148 GHz with a 114 GHz fT. A 2:1 multiplexer with retiming D-type flip-flops (DFFs) at input/output stages fabricated on a wafer with the thin-collector LBCT structure operates at 19 Gbit/s. A monolithic preamplifier fabricated on the same wafer has a transimpedance of 52 dBΩ with a 3-dB-down bandwidth of 18.5 GHz and a gain S21 OF 21 dB with a 3-dB-down bandwidth of 19 GHz. Finally, a 40 Gbit/s selector IC and a 50 GHz dynamic frequency divider that were successfully fabricated using the 148-GHz fmax technologies are described.

This paper describes the performance of AlGaAs/GaAs HBT's developed for power applications. Their applicability to power amplifiers used in digital mobile radio communications is examined through measurement and numerical simulation, considering both power capability and linearity. Power HBT's with carbon-doped base layers showed DC current gains over 90. A linear gain of 19.2 dB, a maximum output RF power of 32.5 dBm, and a power added efficiency of 56 percent were obtained at 950 MHz. Numerical simulations showed that the power efficiency of HBT amplifiers could be improved by using harmonic trap circuits. Intermodulation measurements showed that third-order distortions were at most 21 dBc level at the 1-dB gain compression point. RF spectrum simulations using π/4 shift QPSK modulation showed that side-band spectrum generation was less than 45 dBc level at points 50 kHz off of the carrier frequency. These properties indicate that the power handling capabilities and linearity of HBT amplifiers offer promising potentials for digital mobile radio communications.