Novel circuit design techniques for bipolar and MOS four-quadrant analog multipliers operable on low supply voltage are described. There are three design techniques for multipliers operable on low supply voltage. One is the transistor-size unbalance technique. Another is the bias offset technique. A third is the multitail technique. Bipolar and MOS four-quadrant analog multipliers proposed in this paper consist of transistor-pairs with different transistor sizes (i.e. emitter areas or gate W/L values are different), transistor-pairs with the same bias offset or multitail cells (i.e. quadritail cells and an octotail cell). Several kinds of squaring circuits consisting of such transistor-pairs are applied to the multipliers when the multiplication method is based on the quarter-square technique. These multipliers all have satisfiable multiplication characteristics with four-quadrant operations in analog signal processing, whether implemented in bipolar technology or implemented in MOS technology.

This paper describes design techniques for a high-throughput BiCMOS self-timed SRAM. A new BiCMOS read circuit using a pipelined read architecture and a BiCMOS complementary clocked driver (BCCD) are proposed to reduce the operating cycle time. A 8192 9-b dual-port self-timed SRAM designed using the proposed techniques achieved a clock cycle time of 3.0 ns, that is, a 333-MHz operating frequency, by SPICE simulation on model parameters for 0.8-µm BiCMOS technology. A high-speed built-in self-test (BIST) circuit was studied and designed for the 3.0-ns cycle SRAM. It is confirmed that the BIST circuit allows the 3.0-ns cycle SRAM to test at its maximum operating frequency.

A new optimal nonlinear regulator design method is developed by applying a multi-layered neural network and a fixed point theorem for a nonlinear controlled system. Based on the calculus of variations and the fixed point theorem, an optimal control law containing a nonlinear mapping of the state can be derived. Because the neural network has not only a good learning ability but also an excellent nonlinear mapping ability, the neural network is used to represent the state nonlinear mapping after some learning operations and an optimal nonlinear regulator may be formed. Simulation demonstrates that the new nonlinear regulator is quite efficient and has a good robust performance as well.

A low-voltage, high-speed 4-bit CMOS single chip microprocessor, with instruction execution time of 1.0µs at a power supply voltage of 1.8V, has been developed. A single chip processor generally includes crystal oscillation circuits to generate a system clock or a time-base clock. But when the operating voltage is lowered, it becomes difficult to get oscillations to start reliably and to continue stably. This paper describes a low voltage circuit design method for built-in crystal oscillators. Simple design equations for oscillation starting voltage and oscillation starting time are introduced. Then effects of the circuit device parameters, such as power supply voltage, loop gain values, and subthreshold swing S, on the low voltage performance of the crystal oscillators are considered. It is shown that the crystal oscillators operate in a tailing (subthreshold) region at voltages lower than about 1.8 V. Subthreshold swing, threshold voltage, and open loop gain have a significant influence on low voltage oscillation capability. This design method can be applied to crystal oscillators for a wide range of operating voltages.

In this paper, a synthesizing method is proposed for the design of discrete-time cellular neural networks for binary image processing. Based on the theory of digital-logical design paradigm of threshold logic, the template parameters of the discrete-time cellular neural network for a prescribed binary image processing problem are calculated. Application examples including edge detection, connected component detection, and hole filling are given to demonstrate the merits and limitations of the proposed method. For a given realization of the parameters of the cloning template, a guideline for the selection of the offset Ic for maximum error tolerance is also considered.

A non-profit satellite communication network is desired to be configured by using low cost earth stations in the field of education, research and health in the Pacific region. This paper proposes the following concept as one of the tools to realize such a network: (a) A hitchhiker transponder dedicated to the network, and (b) The volunteer group prepares earth stations. A preliminary system design shows that the S band hitchhiker payload is most appropriate and has the weight of about 3kg. The feasibility of manufacturing earth stations by a volunteer group is examined through the experiment using ETS-V satellite. The parameters of the hitchhiker payload are re-examined on the basis of the experience of the experiment.

The architecture and performance of an interpolative bandpass A-to-D converter (ADC) and digital quadrature demodulator dedicated for digital narrow-band transmission systems, like the cellular radio mobile receiver, are presented. A prototype version has been implemented on a 1.2-µm/7-GHz BiCOMS analog/digital array. A bandpass signal centered at 6.5 MHz with 200-kHz bandwidth is demodulated and converted with a 55-dB signal-to-noise ratio giving 9-b performance.

This paper describes a 1-Mb (256K 4) CMOS SRAM with 6-ns access time. The SRAM, having a cell size of 3.8 µm 7.2 µm and a die size of 6.09 mm 12.94 mm, is fabricated using 0.5-µm triple-polysilicon and double-metal process technology. The fast access time and low power dissipation of 52 mA at 100-MHz operation are achieved by using a new nMOS source-controlled latched sense amplifier and a data-output prereset circuit. In addition, an equalizing technique at the end of the write operation is used to avoid lengthening of access time in a read cycle following a write cycle.

This paper presents an optimization method for pseudo-Kronecker expressions of p-valued input two-valued output functions by using multi-place decision diagrams for p2 and p4. A conventional method using extended truth tables requires memory of O (3n) to simplify an n-variable expression, and is only practical for functions of up to n14 variables when p2. The method presented here utilizes multi-place decision diagrams, and can optimize considerably larger problems. Experimental results for up to n39 variables are shown.

A 155-Mb/s 3232 Si bipolar switch LSI is designed and implemented for a wide application in the broad-band ISDN. The operating speed is 1.4 GHz using an A-BSA Si bipolar process. Its throughput is 5.0 Gb/s by handling four 1.4-GHz interfaces, each of which supports an eight-channel multiplexed data stream. To realize a highly integrated high-speed bipolar LSI, power consumption and chip area should be reduced. Two technologies are newly developed for the LSI, namely, 1) active pull-down circuit with an embedded bias circuit in each gate, and 2) modified standard cell with overlapped cell-channel structure. Using these technologies, total power consumption and chip area are reduced to 60% and 70%, respectively, of what is expected when conventional ECL technologies and standard cell structures are used. The LSI evaluation results show that the developed LSI has sufficient performance to realize a large-scale B-ISDN switching system.

In this paper, we provide an efficient algorithm for GMD (Generalized Minimum Distance) decoding of BCH codes over q-valued logic, when q is pl (p: prime number, l: positive integer). An algebraic errors-and-erasures decoding procedure is required to execute only one time, whereas in a conventional GMD decoding at mostd/2algebraic decodings are necessary, where d is the design distance of the code. In our algorithm, Welch-Berlekamp's iterative method is efficiently employed to reduce the number of algebraic decoding procedures. We also show a method for hardware implementation of this GMD decoding based on q-valued logic.

A group-based random access communication system which consists of two groups of many users is considered. The two different groups share a common random multiple access channel. Users from a group are allocated a high transmitting power level and have a high probability of correct reception among overlapping packets. We set a threshold, θ, which is such that the group with the high power level will occupy the channel if less than or equal to θ packets are transmitted from the group with the low power level. We obtain a two-dimensional Markovian model by tracing the number of backlogged users in the two groups. The two-dimensional Markov chain is shown to be not ergodic and thus the system is not stable. A two-dimensional retransmission algorithm is developed to stabilize the system and the retransmission control parameters are chosen so as to maximize the channel throughput. An equilibrium point analysis is performed by studying the drift functions of the system backlog and it is shown that there is a unique global equilibrium point. The channel capacity for the system is found to be in the range from 0.47 up to 0.53, which is a remarkable increase compared to the conventional slotted ALOHA system.

This paper discusses psychophysical aspects of human sensory system through a differential-geometrical formulation. The discussions reveal relationships among three fundamental functions--the psychophysical, the DL and the JND functions, which characterize sensory system.

This paper describes new methematical tools, taken from quantum field theory (QFT), which may make it possible to characterize localized excitations (including solitons, but also including chaotic modes) generated by PDE systems. The significance to computer hardware and neurocomputing is also discussed. This mathematics--IF further developed--may also have the potential to reorganize and simplify our understanding of QFT itself--a topic of very great intellectual and practical importance. The paper concludes by describing three new possibilities for research, which will be very important to achieving these goals.

A new computer architecture using multiwavelength optoelectronic integrated circuits (OEICs) is proposed to attack the problems caused by interconnection complexity. Multiwavelength-OEIC architecures, where various wavelengths are employed as information carriers, provide the wavelength as an extra dimension of freedom for parallel processing, so that we can perform several independent computations in parallel in a single optical module using the wavelength space. This multiplex computing" enables us to reduce the wiring area required by a network and improve their complexity. In this paper, we discuss the efficient multiplexing of Batcher's bitonic sorting networks, highly parallel computing architectures that require global interconnections inherently. A systematic multiplexing of interconnection topology is presented using a binary representation of the connectivities of interconnection paths. It is shown that the wiring area can be reduced by a factor of 1/r2 using r kinds of wavelength components.

In this article a Neural Network learning scheme is described, which is a generalization of VQ (Vector Quantization) and ART2a (a simplified version of Adaptive Resonance Theory 2). The basic differences between VQ and ART2a will be exhibited and it will be shown how these differences are covered by the generalized scheme. The generalized scheme enables a rich set of variations on VQ and ART2a. One such variation uses the expression ||I||2+||zj||2/||zj||sin(I,zj), as the distance measure between input vector I and weight vector zj. This variation tends to be more robust to noise than ART2a, as is shown by experiments we performed. These experiments use the same data-set as the ART2a experiments in Ref.(3).

The paper deals with the level-crossing intervals of a stationary random process. Probability densities of the level-crossing intervals of a process consisting of a sine wave plus Gaussian random noise are experimentally investigated by digital simulation. The Gaussian random noise is selected to be of 7-th order Butterworth power spectrum density. The obtained probability densities appear with a number of isolated peaks much larger than the number observed on the corresponding probability densities of the Gaussian noise alone. When the sine wave frequency is greater than or approximately equal to the half of the cutoff frequency of the noise spectrum, experimental data suggest that each isolated peak has a Gaussian-like density. The mean time interval associated with each Gaussian-like density is equal to a multiple number of the period of the sine wave, while the variance is found to be fairly the same for all peaks of a same probability density. The assumption of "quasi-independence" is not valid for the level-crossing intervals of the present process.

Link conditions of a low-earth orbit (LEO) satellite communications system were evaluated, to provide the information necessary for designing a broadband LEO-SAT communications system. The study was made both for optical intersatellite and user/satellite links. For the optical intersatellite link (ISL), we examined several ISL configurations in a circular polar orbit, and found that when the satellites are in the same orbital plane, the link parameters are quite stable, that is, the link between adjacent satellites can be regarded as fixed and, therefore, suitable for broadband transmission via an optical link. However, the link conditions between adjacent orbits change very quickly and over a wide range. To overcome this and extend the network path between satellites in adjacent orbital planes, we proposed intermittent use of the link between satellites in co-rotating adjacent orbital planes at the low latitude region, i.e., only during the period of stable conditions. The optical intersatellite link budget also sets link parameters that are realistic, given present optoelectronic technologies. From quantitative evaluations of the user/satellite link, we believe that both the satellite altitude and minimum elevation angle are critical, both in defining the quality of the service of the LEO-SAT system and in their impact on the other transmission parameters. The link loss, the visible period and the required number of satellites vs. satellite altitude and elevation angle are also indicated. These are important considerations for future system design.

Abrupt variations of attractors caused by argumental discreteness in non-Hermitian complex-valued neural networks are reported. When we apply the complex-valued associative memories to dynamical processing, the weighting matrices are constructed as non-Hermitian in general so that they have motive force to the signal vectors. It is observed that competitions between argumental rotation force and noise-suppression ability of associative memories lead to trajectory distortions and abrupt variations of the attractors.

Erasure-and-error decoding is a general form of channel decoding and is a basis of important coding schemes, such as the concatenated coding scheme and coded ARQ. However, there do not exist enough discussions on the interrelationship between erasure-and-error decoding schemes. In this paper, threshold decoding schemes are discussed in a systematic manner and compared with Forney's optimal scheme. Some confusions in known results are pointed out and new results on threshold decoding are shown.