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39041-39060hit(42756hit)

  • A Current-Controlled Latch Sense Amplifier and a Static Power-Saving Input Buffer for Low-Power Architecture

    Tsuguo KOBAYASHI  Kazutaka NOGAMI  Tsukasa SHIROTORI  Yukihiro FUJIMOTO  

     
    LETTER

      Vol:
    E76-C No:5
      Page(s):
    863-867

    This paper describes two new power-saving schemes for high-performance VLSI's with a large-scale memory and many interface signals. One is a current-controlled latch sense amplifier that reduces the power dissipation by stopping sense current automatically. This sense amplifier reduces power without degrading access time compared with the conventional current-mirror sense amplifier. The other is a static power-saving input buffer (SPSIB) that reduces dc current in interface circuits receiving TTL-high input level. The effectiveness of these new circuits is demonstrated with a 512-kb high-speed SRAM.

  • Standardization of Telemetry Signal Transmission by CCSDS and an Experiment Using a Satellite in a Highly Elliptical Orbit

    Tadashi TAKANO  Takahiro YAMADA  Koshiro SHUTO  Toshiyuki TANAKA  Katherine I. MOYD  

     
    REVIEW PAPER

      Vol:
    E76-B No:5
      Page(s):
    466-472

    The Consultative Committee of Space Data Systems (CCSDS) proposes a packetized telemetry scheme for the convenience of data exchange and networking in space activity. This paper describes the outline of the telemetry scheme and the on-orbit experiment which was carried out to show the applicability of the proposed CCSDS packet telemetry scheme using the Japan's satellite "Hiten" in a highly elliptical orbit. The telemetry data which are generated by the onboard instruments are packetized in Hiten, and reformed to the original data in earth stations successfully. The experimental results show that the standardized scheme is helpful for tracking cross-support between organizations, and that the concatenated code is quite effective to transmit data in a low C/N condition.

  • FOREWORD

    Charles G. SODINI  Toshiaki MASUHARA  

     
    FOREWORD

      Vol:
    E76-C No:5
      Page(s):
    746-747
  • Low-Power 1/2 Frequency Dividers Using 0.1-µm CMOS Circuits Built with Ultrathin SIMOX Substrates

    M. FUJISHIMA  K. ASADA  Y. OMURA  K. IZUMI  

     
    LETTER

      Vol:
    E76-C No:5
      Page(s):
    850-852

    Four types of frequency dividers were fabricated on SIMOX/SOI (Separation by IMplanted OXygen/silicon on insulator) substrates. A novel circuit among these four circuits showed highest operation frequency of 1.2 GHz under 1-V supply voltage, the gate lengths of which were 0.15 and 0.1µm. Power consumption was no more than 50 and 62 µW for both 0.15-and 0.1-µm gate designs, respectively.

  • Multiple Destination Routing Algorithms

    Yoshiaki TANAKA  Paul C. HUANG  

     
    INVITED PAPER-Communication Networks and Service

      Vol:
    E76-B No:5
      Page(s):
    544-552

    With the arrival of B-ISDN, point-to-point routing alone is no longer adequate. A new class of computer and video related services, such as mass mailing, TV broadcasting, teleconferencing, and video 900 service, requires the network to handle multiple destination routing (MDR). Multiple destination routing enables widespread usage of multipoint services at a lower cost than networks using point-to-point routing. With this in mind, network providers are researching more into MDR algorithms. However, the MDR problem itself is very complex. Furthermore, its optimal solution, the Steiner tree problem, is NP-complete and thus not suitable for real-time applications. Recently, various algorithms which approximate the Steiner tree problem have been proposed and, in this invited paper, we will summarize the simulation results of these algorithms. But first, we will define the MDR problem, the issues involved, and the benchmark used to compare MDR algorithms. Then, we will categorize the existing MDR algorithms into a five-level classification tree. Lastly, we will present various published results of static algorithms and our own simulation results of quasi-static algorithms.

  • A Feedback-Loop Type Transmission Power Control for TDMA Satellite Communication Systems

    Hiroshi KAZAMA  Takeo ATSUGI  Shuzo KATO  

     
    PAPER

      Vol:
    E76-B No:5
      Page(s):
    529-535

    This paper proposes a feedback-loop type transmission power control (TPC) scheme coupled with first and second order prediction methods and analyzes the optimum control period and residual control error. In order to minimize residual control error, the three main factors contributing to residual control error are analyzed. First, to detect accurately up-link rain attenuation, a channel quality detection method is proposed and analyzed experimentally for puseudo-error detection. Second, rain attenuation rates in Ka band are measured and analyzed statistically. Finally, the optimum control period of the proposed TPC scheme is analyzed. The simulation results on the prototype TPC system show a maximum of 4.5 dB residual control error is achievable with an optimum control period of about 1 second to 1.5 seconds.

  • An Optimal Nonlinear Regulator Design with Neural Network and Fixed Point Theorem

    Dawei CAI  Yasunari SHIDAMA  Masayoshi EGUCHI  Hiroo YAMAURA  Takashi MIYAZAKI  

     
    LETTER-Neural Nets--Theory and Applications--

      Vol:
    E76-A No:5
      Page(s):
    772-776

    A new optimal nonlinear regulator design method is developed by applying a multi-layered neural network and a fixed point theorem for a nonlinear controlled system. Based on the calculus of variations and the fixed point theorem, an optimal control law containing a nonlinear mapping of the state can be derived. Because the neural network has not only a good learning ability but also an excellent nonlinear mapping ability, the neural network is used to represent the state nonlinear mapping after some learning operations and an optimal nonlinear regulator may be formed. Simulation demonstrates that the new nonlinear regulator is quite efficient and has a good robust performance as well.

  • Neural Network Configuration for Multiple Sound Source Location and Its Performance

    Shinichi SATO  Takuro SATO  Atsushi FUKASAWA  

     
    PAPER-Neural Nets--Theory and Applications--

      Vol:
    E76-A No:5
      Page(s):
    754-760

    The method of estimating multiple sound source locations based on a neural network algorithm and its performance are described in this paper. An evaluation function is first defined to reflect both properties of sound propagation of spherical wave front and the uniqueness of solution. A neural network is then composed to satisfy the conditions for the above evaluation function. Locations of multiple sources are given as exciting neurons. The proposed method is evaluated and compared with the deterministic method based on the Hyperbolic Method for the case of 8 sources on a square plane of 200m200m. It is found that the solutions are obtained correctly without any pseudo or dropped-out solutions. The proposed method is also applied to another case in which 54 sound sources are composed of 9 sound groups, each of which contains 6 sound sources. The proposed method is found to be effective and sufficient for practical application.

  • BiCMOS Circuit Performance at Low Supply Voltage

    Yutaka KOBAYASHI  

     
    INVITED PAPER

      Vol:
    E76-C No:5
      Page(s):
    681-686

    BiCMOS circuit performance at low supply voltages is discussed. The basic advantages of BiCMOS circuits are briefly reviewed, and then actual advantages of the BiCMOS gate and the BiCMOS sense circuits, which are typical BiCMOS circuits, are explained. Their advantages at low supply voltages are also discussed. BiCMOS gates, BiCMOS sense circuits, and combined circuits that include a BiCMOS sense circuit are two or three times faster than CMOS circuits down to a supply voltage of 2 V. BiCMOS circuits have high performance even at low supply voltages such as 2 V.

  • A Frequency Utilization Ffficiency Improvement on Superposed SSMA-QPSK Signal Transmission over High Speed QPSK Signals in Nonlinear Channels

    Takatoshi SUGIYAMA  Hiroshi KAZAMA  Masahiro MORIKURA  Shuji KUBOTA  Shuzo KATO  

     
    PAPER

      Vol:
    E76-B No:5
      Page(s):
    480-487

    This paper proposes a superposed SSMA (Spread Spectrum Multiple Access)-QPSK (Quadrature Phase Shift Keying) signal transmission scheme over high speed QPSK signals to achieve higher frequency utilization efficiency and to facilitate lower power transmitters for SSMA-QPSK signal transmission. Experimental results show that the proposed scheme which employs the coding-rate of one-half FEC (Forward Error Correction) and a newly proposed co-channel interference cancellation scheme for SSMA-QPSK signals can transmit twenty SSMA-QPSK channels simultaneously over a nonlinearly amplified high speed QPSK signal transmission channel and achieve as ten times SSMA channels transmission as that without co-channel interference cancellation when the SSMA-QPSK signal power to the high speed QPSK signal power ratio equals -30dB. Moreover, cancellation feasibility generation of the interference signals replica through practical hardware implementation is clarified.

  • Induction Motor Modelling Using Multi-Layer Perceptrons

    Paolo ARENA  Luigi FORTUNA  Antonio GALLO  Salvatore GRAZIANI  Giovanni MUSCATO  

     
    PAPER-Neural Nets--Theory and Applications--

      Vol:
    E76-A No:5
      Page(s):
    761-771

    Asynchronous machines are a topic of great interest in the research area of actuators. Due to the complexity of these systems and to the required performance, the modelling and control of asynchronous machines are complex questions. Problems arise when the control goals require accurate descriptions of the electric machine or when we need to identify some electrical parameters; in the models employed it becomes very hard to take into account all the phenomena involved and therefore to make the error amplitude adequately small. Moreover, it is well known that, though an efficient control strategy requires knowledge of the flux vector, direct measurement of this quantity, using ad hoc transducers, does not represent a suitable approach, because it results in expensive machines. It is therefore necessary to perform an estimation of this vector, based on adequate dynamic non-linear models. Several different strategies have been proposed in literature to solve the items in a suitable manner. In this paper the authors propose a neural approach both to derive NARMAX models for asynchronous machines and to design non-linear observers: the need to use complex models that may be inefficient for control aims is therefore avoided. The results obtained with the strategy proposed were compared with simulations obtained by considering a classical fifth-order non-linear model.

  • Single Minimum Method for Combinatorial Optimization Problems and Its Application to the TSP Problem

    Dan XU  Itsuo KUMAZAWA  

     
    PAPER-Neural Nets--Theory and Applications--

      Vol:
    E76-A No:5
      Page(s):
    742-748

    The problem of local minima is inevitable when solving combinatorial optimization problems by conventional methods such as the Hopfield network, relying on the minimization of an objective function E(X). Such a problem arises from the search mechanism in which only the local information about the objective function E(X) is used. In this paper we propose a new approach called the Single Minimum Method (SMM) which uses the global information in searching for the solutions to combinatorial optimization problems. In this approach, we add a function -TS(X) to the original objective function E(X) to construct the function F(X)=E(X)-TS(X) which has only one minimum, one which can be easily found by any general gradiet method including the Hopfield network. Based on an analogy between thermodynamic systems and neural networks, it is shown that the global information about the original objective function E(X) is included in the single minimum of the function F(X) and can be used for finding the global minimum of the objective function E(X). In order to show how to apply the Single Minimum Method to a combinatorial optimization problem we give an algorithm for the TSP problem based on our method. The simulation results show that the algorithm can almost always find the shortest or near shortest paths. Finally, a modified SMM, which has some great advantages for hardware implementation, is also given.

  • Global Unfolding of Chua's Circuit

    Leon O. CHUA  

     
    PAPER-Chaos and Related Topics

      Vol:
    E76-A No:5
      Page(s):
    704-734

    By adding a linear resistor in series with the inductor in Chua's circuit, we obtain a circuit whose state equation is topologically conjugate (i.e., equivalent) to a 21-parameter family C of continuous odd-symmetric piecewise-linear equations in R3. In particular, except for a subset of measure zero, every system or vector field belonging to the family C, can be mapped via an explicit non-singular linear transformation into this circuit, which is uniquely determined by 7 parameters. Since no circuit with less than 7 parameters has this property, this augmented circuit is called an unfolding of Chua's circuit--it is analogous to that of "unfolding a vector field" in a small neighborhood of a singular point. Our unfolding, however, is global since it applies to the entire state space R3. The significance of the unfolded Chua's Circuit is that the qualitative dynamics of every autonomous 3rd-order chaotic circuit, system, and differential equation, containing one odd-symmetric 3-segment piecewise-linear function can be mapped into this circuit, thereby making their separate analysis unnecessary. This immense power of unification reduces the investigation of the many heretofore unrelated publications on chaotic circuits and systems to the analysis of only one canonical circuit. This unified approach is illustrated by many examples selected from a zoo of more than 30 strange attractors extracted from the literature. In addition, a gallery of 18 strange attractors in full color is included to demonstrate the immensely rich and complex dynamics of this simplest among all chaotic circuits.

  • Variable VCC Design Techniques for Battery-Operated DRAM's

    Seung-Moon YOO  Ejaz HAQ  Seung-Hoon LEE  Yun-Ho CHOI  Soo-IN CHO  Nam-Soo KANG  Daeje CHIN  

     
    PAPER

      Vol:
    E76-C No:5
      Page(s):
    839-843

    Wide-voltage-range DRAM's with extended data retention are desirable for battery-operated or portable computers and consumer devices. This paper describes the techniques required to obtain wide operation, functionality, and performance of standard DRAM's from 1.8 V (2 NiCd or Alkaline batteries) to 3.6 V (upper end of LVTTL standard). Specific techniques shown are: 1) a low-power and low-voltage reference generator for detecting VCC level; 2) compensation of dc generators, VBB and VPP, for obtaining high speed at reduced voltages; 3) a static word-line driver and latch-isolation sense amplifier for reducing operating current; and 4) a programmable VCC variable self-refresh scheme for obtaining maximum data retention time over a full operating range. A sub-50-ns access time is obtained for a 16M DRAM(2M 8) by simulation.

  • Code Assignment Algorithm for Highly Parallel Multiple-Valued Combinational Circuits Based on Partition Theory

    Saneaki TAMAKI  Michitaka KAMEYAMA  Tatsuo HIGUCHI  

     
    PAPER-Logic Design

      Vol:
    E76-D No:5
      Page(s):
    548-554

    Design of locally computable combinational circuits is a very important subject to implement high-speed compact arithmetic and logic circuits in VLSI systems. This paper describes a multiple-valued code assignment algorithm for the locally computable combinational circuits, when a functional specification for a unary operation is given by the mapping relationship between input and output symbols. Partition theory usually used in the design of sequential circuits is effectively employed for the fast search for the code assignment problem. Based on the partition theory, mathematical foundation is derived for the locally computable circuit design. Moreover, for permutation operations, we propose an efficient code assignment algorithm based on closed chain sets to reduce the number of combinations in search procedure. Some examples are shown to demonstrate the usefulness of the algorithm.

  • Fundametal Properties of Multiple-Valued Logic Functions Monotonic with Respect to Ambiguity

    Kyoichi NAKASHIMA  Noboru TAKAGI  

     
    PAPER-Logic and Logic Functions

      Vol:
    E76-D No:5
      Page(s):
    540-547

    The paper considers multiple-valued logic systems having the property that the ambiguity of the system increases as the ambiguity of each component increases. The partial-ordering relation with respect to ambiguity with the greatest element 1/2 and minimal elements 0, 1 or simply the ambiguity relation is introduced in the set of truth values V {0, 1/ (p1), , 1/2, , (p2) / (p1), 1}. A-monotonic p-valued logic functions are defined as p-valued logic functions monotonic with respect to the ambiguity relation. A necessary and sufficient condition for A-monotonic p-valued logic functions is presented along with the proofs, and their logic formulae using unary operators defined in the ambiguity relation are given. Some discussions on the extension of theories to other partial-ordering relations are also given.

  • Output Permutation and the Maximum Number of Implicants Needed to Cover the Multiple-Valued Logic Functions

    Yutaka HATA  Kazuharu YAMATO  

     
    PAPER-Logic Design

      Vol:
    E76-D No:5
      Page(s):
    555-561

    An idea of optimal output permutation of multiple-valued sum-of-products expressions is presented. The sum-of-products involve the TSUM operator on the MIN of window literal functions. Some bounds on the maximum number of implicants needed to cover an output permuted function are clarified. One-variable output permuted functions require at most p1 implicants in their minimal sum-of-products expressions, where p is the radix. Two-variable functions with radix between three and six are analyzed. Some speculations of maximum number of the implicants could be established for functions with higher radix and more than 2-variables. The result of computer simulation shows that we can have a saving of approximately 15% on the average using permuting output values. Moreover, we demonstrate the output permutation based on the output density as a simpler method. For the permutation, some speculation is shown and the computer simulation shows a saving of approximately 10% on the average.

  • An Implementation of Multiple-Valued Logic and Fuzzy Logic Circuits Using 1.5 V Bi-CMOS Current-Mode Circuit

    Mamoru SASAKI  Kazutaka TANIGUCHI  Yutaka OGATA  Fumio UENO  Takahiro INOUE  

     
    PAPER-Circuits

      Vol:
    E76-D No:5
      Page(s):
    571-576

    This paper presents Bi-CMOS current-mode multiple valued logic circuit with 1.5 V supply voltage. This circuit is composed of current mirror, threshold detector and current source. This circuit has advantages such as high accuracy, high speed, high density and low supply voltage. So, it is possible to realize high-radix multiple valued logic circuit. As an other application of the proposed circuit, a processing unit of fuzzy inference is given. This circuit operates with high speed and high accuracy. The circuit simulation of the proposed circuit has been performed using SPICE2 program.

  • A Differential-Geometrical Theory of Sensory System --Relations between the Psychophysical, the DL and the JND Functions

    Ryuzo TAKIYAMA  

     
    PAPER-Mathematical Theory

      Vol:
    E76-A No:5
      Page(s):
    683-688

    This paper discusses psychophysical aspects of human sensory system through a differential-geometrical formulation. The discussions reveal relationships among three fundamental functions--the psychophysical, the DL and the JND functions, which characterize sensory system.

  • A Link Study of a Low-Earth Orbit Satellite Communications System Using Optical Intersatellite Links

    Mitsuo NOHARA  Yoshinori ARIMOTO  Wataru CHUJO  Masayuki FUJISE  

     
    PAPER

      Vol:
    E76-B No:5
      Page(s):
    536-543

    Link conditions of a low-earth orbit (LEO) satellite communications system were evaluated, to provide the information necessary for designing a broadband LEO-SAT communications system. The study was made both for optical intersatellite and user/satellite links. For the optical intersatellite link (ISL), we examined several ISL configurations in a circular polar orbit, and found that when the satellites are in the same orbital plane, the link parameters are quite stable, that is, the link between adjacent satellites can be regarded as fixed and, therefore, suitable for broadband transmission via an optical link. However, the link conditions between adjacent orbits change very quickly and over a wide range. To overcome this and extend the network path between satellites in adjacent orbital planes, we proposed intermittent use of the link between satellites in co-rotating adjacent orbital planes at the low latitude region, i.e., only during the period of stable conditions. The optical intersatellite link budget also sets link parameters that are realistic, given present optoelectronic technologies. From quantitative evaluations of the user/satellite link, we believe that both the satellite altitude and minimum elevation angle are critical, both in defining the quality of the service of the LEO-SAT system and in their impact on the other transmission parameters. The link loss, the visible period and the required number of satellites vs. satellite altitude and elevation angle are also indicated. These are important considerations for future system design.

39041-39060hit(42756hit)