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[Keyword] ATI(18690hit)

17281-17300hit(18690hit)

  • A Design Method of an Adaptive Joint-Process IIR Filter with Generalized Lattice Structure

    Katsumi YAMASHITA  M. H. KAHAI  Hayao MIYAGI  

     
    LETTER-Digital Signal Processing

      Vol:
    E78-A No:7
      Page(s):
    890-892

    An adaptive joint-process IIR filter with generalized lattice structure is constructed. This filter can borrow both FIR and IIR features and simultaneously holds the well-known merits of lattice structure.

  • Acceleration Techniques of Multiple Fault Test Generation Using Vector Pair Analysis

    Seiji KAJIHARA  Rikiya NISHIGAYA  Tetsuji SUMIOKA  Kozo KINOSHITA  

     
    PAPER

      Vol:
    E78-D No:7
      Page(s):
    811-816

    This paper presents techniques used in combinational test generation for multiple stuck-at faults using the parallel vector pair analysis. The techniques accelerate a test generation procedure previously proposed and reduce the number of test vectors generated, while higher fault coverage is derived. The first technique proposed in this paper, which is applied at the first phase of test generation, is rules of ordering vector pairs to be analyzed, to derive high fault coverage without repeating the analysis for the same vector pairs. The second one is to generate new vector pairs for undetected faults, instead of random vector pairs. Both techniques are based on the idea that faults close to primary inputs should be detected earlier than close to primary outputs. The third technique proposed here is how to construct vector pairs from one input vector in order to accelerate test generation especially for circuits with many primary inputs and scan flip-flops. Experimental results for bench-mark circuits show the effectiveness of the techniques.

  • A Next-Generation Database System for Advanced Multimedia Applications

    Hiroshi ISHIKAWA  Koki KATO  Miyuki ONO  Naomi YOSHIZAWA  Kazumi KUBOTA  Akiko KONDO  

     
    PAPER

      Vol:
    E78-B No:7
      Page(s):
    952-962

    New multimedia applications have emerged on top of information infrastructures, such as on-demand services, digital libraries and museums, online shopping, information Q & A, concurrent engineering, document management, and desktop program production, which require new databases. That is, next-generation database systems must enable users to efficiently and flexibly develop and execute such advanced multimedia applications. Moreover, in some applications, there is no existent data; in others, there are databases or files to be integrated. This requires both top-down and bottom-up database development. To this end, we focus on development of a database system which enables flexible and efficient acquisition, storage, access and retrieval, and distribution and presentation of large amounts of heterogeneous media data. In particular, we propose a multimedia data model as an integration of structural, temporal, spatial, and control functionality. That is, we take an approach based on an object-oriented database, which is more suitable for description of media structures and operations than a traditional relational database. And we extend the object-oriented approach by providing temporal and spatial operators, and control of distributing computing and QOS (quality of service). In this paper, we describe a multimedia data model and its efficient implementation.

  • Temporal Verification of Real-Time Systems

    Sérgio V. CAMPOS  Edmund M. CLARKE  Wilfredo MARRERO  Marius MINEA  Hiromi HIRAISHI  

     
    PAPER

      Vol:
    E78-D No:7
      Page(s):
    796-801

    This paper presents a general method for computing quantitative information about finite-state real-time systems. We have developed algorithms that compute exact bounds on the delay between two specified events and on the number of occurrences of an event in a given interval. This technique allows us to determine performance measures such as schedulability, response time, and system load. Our algorithms produce more detailed information than traditional methods. This information leads to a better understanding of system behavior, in addition to determining its correctness. The algorithms presented in this paper are efficiently implemented using binary decision diagrams and have been incorporated into the SMV symbolic model checker. Using this method, we have verified a model of an aircraft control system with 1015 states. The results obtained demonstrate that our method can be successfully applied in the verification of real-time system designs.

  • A Single Bridging Fault Location Technique for CMOS Combinational Circuits

    Koji YAMAZAKI  Teruhiko YAMADA  

     
    PAPER

      Vol:
    E78-D No:7
      Page(s):
    817-821

    A single bridging fault location technique for CMOS combinational circuits is proposed. In this technique, the cause of an error observed at the primary outputs in deduced using a diagnosis table constructed from the circuit under test and the given tests. The size of a diagnosis table is [the number of gates][the number of tests]2 bits, which is much smaller than that of the fault dictionary. The experimental results show that the number of possible bridging faults is reduced to less than 5 in several seconds, when using the tests to detect single stuck-at faults and considering only the bridging faults between physically adjacent nets.

  • Performance Evaluation of Handoff Schemes in Personal Communication Systems

    Ahmed ABUTALEB  Victor O.K. LI  

     
    INVITED PAPER

      Vol:
    E78-A No:7
      Page(s):
    773-784

    In this paper, we evaluate the performance of handoff schemes in microcellular personal communication systems (PCS) which cater to both pedestrian and vehicular users. Various performance parameters, including blocking of new calls,channel utilization, handoff blocking and call termination probabilities for each user type are evaluated. We study different queuing disciplines for handoff calls and their impact on system performance. We also study the tradeoff in handoff blocking and call termination probabilities between user types as the handoff traffic carried by the system from each user type is varied.

  • A Study for Testability of Redundant Faults in Combinational Circuits Using Delay Effects

    Xiangqiu YU  Hiroshi TAKAHASHI  Yuzo TAKAMATSU  

     
    PAPER

      Vol:
    E78-D No:7
      Page(s):
    822-829

    Some undetectable stuck-at faults called the redundant faults are included in practical combinational circuits. The redundant fault does not affect the functional behavior of the circuit even if it exists. The redundant fault, however, causes undesirable effects to the circuit such as increase of delay time and decrease of testability of the circuit. It is considered that some redundant faults may cause the logical defects in the future. In this paper, firstly, we study the testability of the redundant fault in the combinational circuit by using delay effects. Secondly, we propose a method for generating a test-pair of a redundant fault by using an extended seven-valued calculus, called TGRF (Test-pair Generation for Redundant Fault). TGRF generates a dynamically sensitizable path for the target line which propagates the change in the value on the target line to a primary output. Finally, we show experimental results on the benchmark circuits under the assumptions of the unit delay and the fanout weighted delay models. It shows that test-pairs for some redundant faults are generated theoretically.

  • A Synchronous DRAM with New High-Speed I/O Lines Method for the MultiMedia Age

    Yuji SAKAI  Kanji OISHI  Miki MATSUMOTO  Shoji WADA  Tadamichi SAKASHITA  Masahiro KATAYAMA  

     
    PAPER

      Vol:
    E78-C No:7
      Page(s):
    782-788

    As microprocessor units have become faster, DRAMs have also been required to become faster. One of the fast DRAMs is the synchronous DRAM, which transfers data at a high rate. We have developed a 100-MHz Synchronous DRAM using pipeline architecture and new high speed I/O lines method. This paper describes some features of the DRAM and its new pipeline architecture.

  • Use of a Monte Carlo Wiring Yield Simulator to Optimize Design of Random Logic Circuits for Yield Enhancement

    Hideyuki FUKUHARA  Takao KOMATSUZAKI  Katsushi BOKU  Yoichi MIYAI  

     
    PAPER

      Vol:
    E78-C No:7
      Page(s):
    852-857

    There is general trend toward larger chip size and tighter layout due to customer requests of loading more and more functions on single chip. This trend makes yield difficult to be maintained high enough, since larger amount of defects are distributed on such large and tight-ruled chips. To overcome such a situation, RADLYS (RAnDom Logic Yield Simulator) and DD-TEG (Defect Density TEG) have been developed. DD-TEG extracts defect size distribution and its amount automatically, while RADLYS simulates defects on any layout and outputs yield based on the extracted defect size distribution. Critical layout from yield point of view can be found in this procedure. DD-TEG and RADLYS are used as a set of parameter extraction and simulation of the SPICE. In this paper, we introduce these tools and showed two application results. The predicted yield showed a good agreement with the actual yield in the first application (Optical Device A). Critical layout at the Local I/O portion was found in the second application (Random Logic portion of Memory Device B) and the layout was changed based on the RADLYS results.

  • Global Interpolation in the Segmentation of Handwritten Characters Overlapping a Border

    Satoshi NAOI  Maki YABUKI  Atsuko ASAKAWA  Yoshinobu HOTTA  

     
    PAPER-Image Processing, Computer Graphics and Pattern Recognition

      Vol:
    E78-D No:7
      Page(s):
    909-916

    The global interpolation method we propose evaluates segment pattern continuity and connectedness to produce characters with smooth edges while interpreting blank or missing segments based on global label connectivities, e.g, in extracting a handwritten character overlapping a border, correctly. Conventional character segmentation involving overlapping a border concentrates on removing the thin border based on known format information rather than extracting the character. This generates discontinuous segments which produce distortion due to thinning and errors in direction codes, and is the problem to recognize the extracted character. In our method, characters contacting a border are extracted after the border itself is labeled and removed automatically by devising how to extract wavy and oblique borders involved in fax communication. The absence of character segments is then interpolated based on segment continuity. Interpolated segments are relabeled and checked for matching against the original labeled pattern. If a match cannot be made, segments are reinterpolated until they can be identified. Experimental results show that global interpolation interprets the absence of character segments correctly and generates with smooth edges.

  • ULSI Memory for Multimedia Applications

    Yasuo AKATSUKA  Yoichi YANO  Shigeo NIITSU  Akihiko MORINO  

     
    INVITED PAPER

      Vol:
    E78-C No:7
      Page(s):
    766-772

    At the beginning of the 21st century, 1 Gb DRAMs will be in practical use, and sufficient in terms of memory capacity for most memory applications systems. The key technologies for multimedia systems include data compression, communication, storage, and human interfaces. Image data processing, ATM switch, and microprocessor in multimedia applications require the high data transfer rate from several 100 Mbits/s to Tbits/s. Storage systems, on the other hand, require the reduction of the price per bit to less than 10 cents/Mbytes. Application specific design approaches towards a system-on-chip are strongly needed for ULSI memories in the multimedia era.

  • Low-Voltage Operation of a High-Resistivity Load SOI SRAM Cell by Reduced Back-Gate-Bias Effect

    Yasuo YAMAGUCHI  Jun TAKAHASHI  Takehisa YAMAGUCHI  Tomohisa WADA  Toshiaki IWAMATSU  Hans-Oliver JOACHIM  Yasuo INOUE  Tadashi NISHIMURA  Natsuro TSUBOUCHI  

     
    PAPER

      Vol:
    E78-C No:7
      Page(s):
    812-817

    The stability of a high-resistivity load SRAM cell using thin-film SOI MOSFET's was investigated as compared with bulk-Si MOSFET's. In SOI MOSFET's back-gate-bias effect was suppressed by indirect application of back-gate-bias to the channel region through the thick buried oxide. The Vt shifts were reduced to be 10% and 14% of that in bulk-Si MOSFET's in partially and fully depleted devices, respectively. The reduction of back-gate-bias effect provides improvement of "high" output voltage and gain in the enhancement-enhancement (EE) inverter in a high-resistivity load SRAM cell, thereby offering improved cell stability. It was demonstrated by using partially depleted SOI SRAM cells that non-destructive reading was obtained even at a low drain voltage of 1.4 V without gate-potential boost, which was much smaller than the operation limit in a bulk Si SRAM with the same patterns and dimensions used as a reference. This implies that SOI devices can also offer low-voltage operation even in TFT-load cells used in up-to-date high-density SRAM's. These results suggest that thin-film SOI MOSFET's have a superior potential of low-voltage operation expected for further scaled devices and/or for portable systems in a forthcoming multimedia era.

  • A Media Synchronization Mechanism for a Distributed Multimedia System with Interactive Control

    Ryuichi OHNO  Hitoshi AIDA  Tadao SAITO  

     
    PAPER

      Vol:
    E78-B No:7
      Page(s):
    980-986

    Synchronization of media streams is recognized as an important requirement not only in media retrieval such as a video on-demand service but also in groupware such as a remote conferencing system. In a remote conferencing system, synchronization is more complicated because Live Media Streams (LMS) such as the live raw voice of some participants must be taken into consideration as well as Retrieved Media Streams (RMS) such as media streams retrieved from video equipment. In this paper, we propose a mechanism to synchronize RMSs and LMSs in a remote conferencing system DMSIC (Distributed Multimedia System with Interactive Control) which has been implemented on UNIX workstations connected by Ethernet. In this mechanism, synchronization among RMSs (we call it R & R synchronization) is kept by maintaining the Current Presentation Positions (CPP) on Media Buffers (MB) close to the Ideal Presentation Position (IPP). Synchronization among RMSs and LMSs (we call it R & L synchronization) is kept by adjusting the IPPs among multiple nodes. We have implemented the synchronization mechanism in DMSIC to confirm the effectiveness of it.

  • Very Fast Fault Simulation for Voltage Stuck-at Faults in Analog/Digital Mixed Circuit

    Shigeharu TESHIMA  Naoya CHUJO  Ryuta TERASHIMA  

     
    PAPER

      Vol:
    E78-D No:7
      Page(s):
    853-860

    This paper deals with the problems in testing large mixed-signal ICs. To help generating test patterns of these larger mixed-signal circuits for a functional test, a fast fault simulation algorithm and a fault model voltage stuck-at fault" which the algorithm is based on, are proposed. A voltage stuck-at fault is that a signal line sticks its voltage level at a certain constant. Under an assumption that blocks in a circuit are designed as identically current-independent, i.e. their input impedance can be regarded as infinite and their output impedance as zero, fault simulation can be realized by the event driven method and the concurrent method and can detect voltage stuck-at faults. These methods are essential for digital fault simulation and very effective to high speed simulation, although they were impossible for an analog or mixed-signal circuit by a conventional algorithm. Furthermore, the efficiency of the simulation is improved because I/O relation of blocks is approximated to a stepwise linear function. The above techniques and methods make fault simulation for a mixed-signal circuit possible in practical use. Actually, a fault simulator was implemented, then some test circuits were simulated. The simulator is really faster than conventional simulation based on circuit simulation. Next, fault analysis was applied to several bipolar ICs to verify the validity of the fault model voltage stuck-at faults". Analyses of open and short faults between terminals of transistors and resistors show that this fault model has sufficient coverage (more than 50%) to test mixed-signal circuit.

  • Fully Self-Timing Data-Bus Architecture for 64-Mb DRAMs

    Tadaaki YAMAUCHI  Koji TANAKA  Kiyohiro FURUTANI  Yoshikazu MOROOKA  Hiroshi MIYAMOTO  Hideyuki OZAKI  

     
    PAPER-Integrated Electronics

      Vol:
    E78-C No:7
      Page(s):
    858-865

    This paper proposes a fully self-timing data-bus (FSD) architecture which includes a dual data-bus driven by the read-out data itself and a complementary output differential (COD) amplifier. The proposed COD amplifier achieves a high voltage gain and a high speed data transfer with low power consumption. The read-out data is transmitted from the COD amplifier to the output terminal without the timing control caused by the fluctuation of the device parameters. Therefore the proposed FSD architecture eliminates the timing delay and achieves a timing-free data transfer even in DRAMs with a small signal level at the sense amplifier and the data line. Applying this architecture to a 64-Mb DRAM, a fast column address access time of 16 ns and a RAS access time of 32 ns have been achieved.

  • Duration Modeling with Decreased Intra-Group Temporal Variation for HMM-Based Phoneme Recognition

    Nobuaki MINEMATSU  Keikichi HIROSE  

     
    PAPER

      Vol:
    E78-D No:6
      Page(s):
    654-661

    A new clustering method was proposed to increase the effect of duration modeling on the HMM-based phoneme recognition. A precise observation on the temporal correspondences between a phoneme HMM with output probabilities by single Gaussian modeling and its training data indicated that there were two extreme cases, one with several types of correspondences in a phoneme class completely different from each other, and the other with only one type of correspondence. Although duration modeling was commonly used to incorporate the temporal information in the HMMs, a good modeling could not be obtained for the former case. Further observation for phoneme HMMs with output probabilities by Gaussian mixture modeling also showed that some HMMs still had multiple temporal correspondences, though the number of such phonemes was reduced as compared to the case of single Gaussian modeling. An appropriate duration modeling cannot be obtained for these phoneme HMMs by the conventional methods, where the duration distribution for each HMM state is represented by a distribution function. In order to cope with the problem, a new method was proposed which was based on the clustering of phoneme classes with plural types of temporal correspondences into sub-classes. The clustering was conducted so as to reduce the variations of the temporal correspondences in sub-classes. After the clustering, an HMM was constructed for each sub-class. Using the proposed method, speaker dependent recognition experiments were performed for phonemes segmented from isolated words. A few-percent increase was realized in the recognition rate, which was not obtained by another method based on the duration modeling with a Gaussian mixture.

  • A Study on Speaker Adaptation for Mandarin Syllable Recognition with Minimum Error Discriminative Training

    Chih-Heng LIN  Chien-Hsing WU  Pao-Chung CHANG  

     
    PAPER

      Vol:
    E78-D No:6
      Page(s):
    712-718

    This paper investigates a different method of speaker adaptation for Mandarin syllable recognition. Based on the minimum classification error (MCE) criterion, we use the generalized probabilistic decent (GPD) algorithm to adjust interatively the parameters of the hidden Markov models (HMM). The experiments on the multi-speaker Mandarin syllable database of Telecommunication Laboratories (T.L.) yield the following results: 1) Efficient speaker adaptation can be achieved through discriminative training using the MCE criterion and the GPD algorithm. 2) The computations required can be reduced through the use of the confusion sets in Mandarin base syllables. 3) For the discriminative training, the adjustment on the mean values of the Gaussian mixtures has the most prominent effect on speaker adaptation. 4) The discriminative training approach can be used to enhance the speaker adaptation capability of the maximum a posteriori (MAP) approach.

  • Uniform and Non-uniform Normalization of Vocal Tracts Measured by MRI Across Male, Female and Child Subjects

    Chang-Sheng YANG  Hideki KASUYA  

     
    PAPER

      Vol:
    E78-D No:6
      Page(s):
    732-737

    Three-dimensional vocal tract shapes of a male, a female and a child subjects are measured from magnetic resonance (MR) images during sustained phonation of Japanese vowels /a, i, u, e, o/. Non-uniform dimensional differences in the vocal tract shapes of the subjects are quantitatively measured. Vocal tract area functions of the female and child subjects are normalized to those of the male on the basis of non-uniform and uniform scalings of the vocal tract length and compared with each other. A comparison is also made between the formant frequencies computed from the area functions normalized by the two different scalings. It is suggested by the comparisons that non-uniformity in the vocal tract dimensions is not essential in the normalization of the five Japanese vowels.

  • Relationship among Recognition Rate, Rejection Rate and False Alarm Rate in a Spoken Word Recognition System

    Atsuhiko KAI  Seiichi NAKAGAWA  

     
    PAPER

      Vol:
    E78-D No:6
      Page(s):
    698-704

    Detection of an unknown word or non-vocabulary word uttered by the user is necessary in realizing a practical spoken language user-interface. This paper describes the evaluation of an unknown word processing method for a subword unit based spoken word recognizer. We have assessed the relationship between the word recognition accuracy of a system and the detection rate of unknown words both by simulation and by experiment of the unknown word processing method. We found that the resultant detection accuracies using the unknown word processing are significantly influenced by the original word recognition accuracy while the degree of such effect depends on the vocabulary size.

  • Speaker-Consistent Parsing for Speaker-Independent Continuous Speech Recognition

    Kouichi YAMAGUCHI  Harald SINGER  Shoichi MATSUNAGA  Shigeki SAGAYAMA  

     
    PAPER

      Vol:
    E78-D No:6
      Page(s):
    719-724

    This paper describes a novel speaker-independent speech recognition method, called speaker-consistent parsing", which is based on an intra-speaker correlation called the speaker-consistency principle. We focus on the fact that a sentence or a string of words is uttered by an individual speaker even in a speaker-independent task. Thus, the proposed method searches through speaker variations in addition to the contents of utterances. As a result of the recognition process, an appropriate standard speaker is selected for speaker adaptation. This new method is experimentally compared with a conventional speaker-independent speech recognition method. Since the speaker-consistency principle best demonstrates its effect with a large number of training and test speakers, a small-scale experiment may not fully exploit this principle. Nevertheless, even the results of our small-scale experiment show that the new method significantly outperforms the conventional method. In addition, this framework's speaker selection mechanism can drastically reduce the likelihood map computation.

17281-17300hit(18690hit)