In this paper, we quantitively analyzed speech data in seven different styles to make natural Japanese conversational speech synthesis. Three reading styles were produced at different speeds (slow, normal and fast), and four speaking styles were produced by enacting conversation in different situations (free, hurried, angry and polite). To clarify the differences in prosodic characteristics between conversational speech and read speech, means and standard deviations of vowel duration, vowel amplitude and fundamental frequency (F0) were analyzed. We found large variation in these prosodic parameters. To look more precisely at the segmental duration and segmental amplitude differences between conversational speech and read speech, control rules of prosodic parameters in reading styles were applied to conversational speech. F0 contours of different speaking styles are superposed by normalizing the segmental duration. The differences between estimated values and actual values were analyzed. Large differences were found at sentence final and key (focused) phrases. Sentence final positions showed lengthening of segmental vowel duration and increased segmental vowel amplitude. Key phrase positions featured raising F0.

This paper presents a method for verifying safety property of a communication protocol modeled as two extended communicating finite-state machines with two unbounded FIFO channels connecting them. In this method, four types of atomic formulae specifying a condition on a machine and a condition on a sequence of messages in a channel are introduced. A human verifier describes a logical formula which expresses conditions expected to be satisfied by all reachable global states, and a verification system proves that the formula is indeed satisfied by such states (i.e. the formula is an invariant) by induction. If the invariant is never satisfied in any unsafe state, it can be concluded that the protocol it safe. To show the effectiveness of this method, a sample protocol extracted from the data transfer phase of the OSI session protocol was verified by using the verification system.

The authors developed a portable Japanese text-to-speech system using a pocket-sized formant speech synthesizer. It consists of a linguistic processor and an acoustic processor. The linguistic processor runs on an MS-DOS personal computer and has functions to determine readings and prosodic information for input sentences written in kana-kanji-mixed style. New techniques, such as minimization of a cost function for phrases, rare-compound flag, semantic information, information of reading selection and restriction by associated particles, are used to increase the accuracy of readings and accent positions. The accuracy of determining readings and accent positions is 98.6% for sentences in newspaper articles. It is possible to use the linguistic processor through an interface library which has also been developed by the authors. Consequently, it has become possible not only to convert whole texts stored in text files but also to convert parts of sentences sent by the interface library sequentially, and the readings and prosodic information are optimized for the whole sentence at one time. The acoustic processor is custom-made hardware, and it has adopted new techniques, for the improvement of rules for vowel devoicing, control of phoneme durations, control of the phrase components of voice fundamental frequency and the construction of the acoustic parameter database. Due to the above-mentioned modifications, the naturalness of synthetic speech generated by a Klatt-type formant speech synthesizer was improved. On a naturalness test it was rated 3.61 on a scale of 5 points from 0 to 4.

Prosodic features of the spoken Japanese play an important role in the transmission of linguistic information concerning the lexical word accent, the sentence structure and the discourse structure. In order to construct prosodic rules for synthesizing high-quality speech, therefore, prosodic features of speech should be quantitatively analyzed with respect to the linguistic information. With a special focus on the fundamental frequency contour, we first define four prosodic units for the spoken Japanese, viz., prosodic word, prosodic phrase, prosodic clause and prosodic sentence, based on a decomposition of the fundamental frequency contour using a functional model for the generation process. Syntactic units are also introduced which have rough correspondence to these prosodic units. The relationships between the linguistic information and the characteristics of the components of the fundamental frequency contour are then described on the basis of results obtained by the analysis of two sets of speech material. Analysis of weathercast and newscast sentences showed that prosodic boundaries given by the manner of continuation/termination of phrase components fall into three categories, and are primarily related to the syntactic boundaries. On the other hand, analysis of noun phrases with various combinations of word accent types, syntactic structures, and focal conditions, indicated that the magnitude and the shape of the accent components, which of course reflect the information concerning the lexical accent types of constituent words, are largely influenced by the focal structure. The results also indicated that there are cases where prosody fails to meet all the requirements presented by word accent, syntax and discourse.

For the production of high quality synthetic sounds in a text-to-speech system, an excellent synthesizing method of speech signals is indispensable. In this paper, a new speech analysis-synthesis method for the text-to-speech system is proposed. The signals of voiced speech, which have a line spectrum structure at intervals of pitch in the linear frequency domain, can be represented approximately by the superposition of sinusoidal waves. In our system, analysis and synthesis are performed using such a harmonic structure of the signals of voiced speech. In the analysis phase, assuming an exact harmonic structure model at intervals of pitch against the fine structure of the short-time power spectrum, the fundamental frequency f0 is decided so as to minimize the error of the log-power spectrum at each peak position. At the same time, according to the value of the above minimized error, the rate of periodicity of the speech signal is detemined. Then the log-power spectrum envelope is represented by the cosine-series interpolating the data which are sampled at every pitch period. In the synthesis phase, numerical solutions of non-linear differential equations which generate sinusoidal waves are used. For voiced sounds, those equations behave as a group of mutually synchronized oscillators. These sinusoidal waves are superposed so as to reconstruct the line spectrum structure. For voiceless sounds, those non-linear differential equations work as passive filters with input noise sources. Our system has some characteristics as follows. (1) Voiced and voiceless sounds can be treated in a same framowork. (2) Since the phase and the power information of each sinusoidal wave can be easily controlled, if necessary, periodic waveforms in the voiced sounds can be precisely reproduced in the time domain. (3) The fundamental frequency f0 and phoneme duration can be easily changed without much degradation of original sound quality.

We studied minority carrier collection in high-density stacked-capacitor DRAM cells using a three-dimensional device simulator. We estimated the collected charge for incident angle, location, and junction size and showed that, compared to the conventional structure by a twin-well process, an n-well-guarded cell array fabricated using a triple-well process effectively reduced the charge injected into cells. The reduction was because the n-well absorbed most of the electrons. A so-called "size-effect" did exist and smaller junctions performed better. We concluded that storage capacitance in a 256 M-bit DRAM cell could be reduced, compared to that in previous devices, which would, in turn, help reduce costs in fabricating high-density DRAM.

An approximate but sufficiently accurate high frequency solution is developed in this paper for analyzing the problem of electromagnetic plane wave scattering by an open-ended, perfectly-conducting, semi-infinite parallel-plate waveguide with a thin layer of lossy or absorbing material on its inner wall, and with a planar termination inside. The high frequency solution combines uniform geometrical theory of diffraction (UTD) and aperture integration (AI) methods. The present method has several advantages in comparison with other methods.

We deal with a new type ceramic emitter which is used in a cleanroom ionizer system and is composed of a needle-shaped silicon and a rod-shaped silicon carbide ceramics. The discharge test was carried out to investigate the particle generation from the emitter and the degradation of the emitter. As a result, it was found that the ceramic emitter had practically higher performance than a conventional tungsten emitter.

This paper describes automatic generation of speech synthesis rules which predict a stress level for each bunsetsu in long noun phrases. The rules are inductively inferred from a lot of speech data by using two kinds of tree-based methods, the conventional decision tree and the SBR-tree methods. The rule sets automatically generated by two methods have almost the same performance and decrease the prediction error to about 14 Hz from 23 Hz of the accent component value. The rate of the correct reproduction of the change for adjacent bunsetsu pairs is also used as a measure for evaluating the generated rule sets and they correctly reproduce the change of about 80%. The effectiveness of the rule sets is verified through the listening test. And, with regard to the comprehensiveness of the generated rules, the rules by the SBR-tree methods are very compact and easy to human experts to interpret and matches the former studies.

For analyzing the transient electromagnetic fields caused by electrostatic discharge (ESD), a new ESD model is presented here. Numerical calculation is also given to explain the distinctive phenomenon being well-recognized in the ESD event.

The discrete time analysis of logic circuits is usually more efficient than the continuous time analysis, but the preciseness of the discrete time analysis is not guaranteed. The paper shows a method to decide a unit time for a logic circuit under which the analysis result is the same as the result based on the continuous time. The delay time of an element is specified with an interval between the minimum and maximum delay times, and we assume an analysis method which enumerates all possible delay cases under the deisrete time. Our main theorem is as follows: refine the unit time by a factor of 1/2, and if the analysis result with a unit time u and that with a unit time u/2 are the same, then u is the expected unit time.

One of the most interesting and most analyzed aspects of the CPU design is the instruction set design. How many and which operations to be provided by hardware is one of the most fundamental issues relaing to the instruction set design. This paper describes a novel method that formulates the instruction set design of ASIP (an Application Specific Integrated Processor) using a combinatorial appoach. Starting with the whole set of all possible candidata instructions that represesnt a given application domain, this approach selects a subset that maximizes the performance under the constraints of chip area, power consumption, and functional module sharing relation among operations. This leads to the efficient implementation of the selected instructions. A branch-and-bound algorithm is used to solve this combinatorial optimization problem. This approach selects the most important instructions for a given application as well as optimizing the hardware resources that implement the selected instructions. This approach also enables designers to predict the perfomance of their design before implementing them, which is a quite important feature for producing a quality design in reasonable time.

This article discusses on PDM (Petri net based Development Methodology) which integrates approaches, modeling methods, design methods and analysis methods in a coherent manner. Although various development techniques based on Petri nets have demonstrated advantages over conventional techniques, those techniques are rather ad hoc and lack an overall picture on entire development process. PDM anticipates to provide a refernce process model to develop distributed systems with various Petri net based development methods. Behavioral properties of distrbuted systems can be an appropriate application domain of PDM.

Evolution programs have been shown to be very useful in a variety of search and optimization problems, however, until now, there has been little attempt to apply evolution programs to channel routing problem. In this paper, we present an exolution program and identify the key points which are essential to successfully applying evolution programs to channel routing problem. We also indicate how integrating heuristic information related to the problem under consideration helps in convergence on final solutions and illustrate the validity of out approach by providing experimental results obtained for the benchmark tests. compared with the optimal solutions.

The scattering of electromagnetic waves by a dielectric grating with planar slanted-fringe is analyzed using the improved Fourier series expansion method. In the analysis, the slanted grating region is divided into layers to make an assembly of stratified thin modulated index layers. This method can be applied to a wide range of periodic structures and is especially effective in the case of planar slanted grating, because the electromagnetic fields in the each layer can easily be obtained by shifting the solution in the first layer. In this paper, the numerical results are given for grating with rectangular and sinusoidal dielectric profiles, and for TM and TE cases of arbitrary incident angle. The diffraction efficiencies obtained by the presented method are compared with the results by the coupled-wave approach; the influences of the slant angle on the diffraction efficiencies at the Wood's anomaly and at the coupling resonance frequency are also discussed.

An FM-CW radar system for the detection of objects buried in sandy ground is explored and is applied to a field measurement. The key factors for underground FM-CW radar performance are the center frequency and bandwidth determining the depth at which the radar can detect targets and the resolution in the range direction. In order for FM-CW radar sounding, two ridged horn antennas are employed in the system, which are operative in the frequency range of 250-1000MHz. The impedance matching to the ground is optimized by measuring the echo strength from a fixed target as a function of the spacing interval between the antenna aperture and the ground surface. It is shown that the radar with an output power of 18dBm could detect a metallic plate (30100cm) and a pipe (10cmφ) buried at the depth of 1.2m. Also the synthetic aperture technique together with an averaging and subtracting method produced fine image in shallow region up to 100cm in the sandy ground.

In this paper, we will clarify the problem of consecutively lost customer due to buffer overflow in an IPP, M/M/l/K queueing system including an M1, M2/M/l/K queueuing system as a special case. We define a length of a consecutive loss as the number of customers consecutively lost due to buffer overflow. And, we obtain individual distributions of the lengths of consecutive losses for the IPP- and Markov-sources. From analytical and numerical results, it is shown that either they are geometrical or they can be approximated by a geometric distribution. Also, from numerical examples, we show some properties of the length of consecutive customer loss.

Since, in a VLSI circuit, the number of transistors and the clock frequency are constantly increasing, it is important to analyze the voltage drop and current density on a full chip's power networks. We propose a new hierarchical power analysis system named XPOWER. A new reduction algorithm for the resistance and current source network is used in this system. The algorithm utilizes the design hierarchy in nature and is independent of network topology. Networks at each level are reduced into small and equivalent networks, and this reduction is performed recursively from the bottom levels of the design hierarchy. At each step of the reduction, the network under consideration consists of two kinds of objects: (1) reduced child networks, and (2) the interconnection between child networks. After all networks have been reduced, circuit equationa are solved recursively from the top. This allows to decrease the size of the matrix to be solved and to reduce the execution time. Experimental results show that the factor of reduction in matrix size is from 1/10 to 1/40 and execution is six times faster than with flat analysis. The power networks of a 16 bit digital signal processor was analyzed within 15 minutes using XPOWER.

High speed simulation of neural networks can be achieved through parallel implementations capable of exploiting their massive inherent parallelism. In this paper, we show how this inherent parallelism can be effectively exploited on parallel data-driven systems. By using these systems, the asynchronous parallelism of neural networks can be naturally specified by the functional data-driven programs, and maximally exploited by pipelined and scalable data-driven processors. We shall demonstrate the suitability of data-driven systems for the parallel simulation of neural networks through a parallel implementation of the widely used back propagation networks. The implementation is based on the exploitation of the network and training set parallelisms inherent in these networks, and is evaluated using an image data compression network.

The performance of ASIPs (Application Specific Integrated Processors) is heavily affected by the design of their instruction set architecture. In order to maximize the performance of ASIP, it is essential to design an architecture that has an optimum instruction set. This paper descibes a new method that automates the design of optimum instruction set of ASIP. This method solves the Instruction set implementation Method Selection Problem(IMSP). IMSP is to be solved in the instruction set architecture design. Frse, the IMSP is formalized as an integer programming problem, which is to maximize the perfomance of the CPU under the constraints of chip area and power consumption. Then, a branch-and-bound algorithm to solve IMSP is described. According to the experimental results, the proposed algorithm is quite effective and efficient in solving the IMSP. The presented method automates a complex part of the ASIP chip design and is also a good design tool that enables designer to predict the performance of their design before completion.