A new method is proposed for automatically evaluating the English pronunciation quality of non-native speakers. It is assumed that pronunciation can be rated using three criteria: the static characteristics of phonetic spectra, the dynamic structure of spectrum sequences, and the prosodic characteristics of utterances. The evaluation uses speech recognition techniques to compare the English words pronounced by a non-native speaker with those pronounced by a native speaker. Three evaluation measures are proposed to rate pronunciation quality. (1) The standard deviation of the mapping vectors, which map the codebook vectors of the non-native speaker onto the vector space of the native speaker, is used to evaluate the static phonetic spectra characteristics. (2) The spectral distance between words pronounced by the non-native speaker and those pronounced by the native speaker obtained by the DTW method is used to evaluate the dynamic characteristics of spectral sequences. (3) The differences in fundamental frequency and speech power between the pronunciation of the native and non-native speaker are used as the criteria for evaluating prosodic characteristics. Evaluation experiments are carried out using 441 words spoken by 10 Japanese speakers and 10 native speakers. One half of the 441 words was used to evaluate static phonetic spectra characteristics, and the other half was used to evaluate the dynamic characteristics of spectral sequences, as well as the prosodic characteristics. Based on the experimental results, the correlation between the evaluation scores and the scores determined by human judgement is found to be 0.90.

We consider an asymptotically sparsely encoded associative memory. Patterns are encoded by n-dimensional vectors of 1 and 1 generated randomly by a sequence of biased Bernoulli trials and stored in the network according to Hebbian rule. Using a heuristic argument we derive the following capacities:c(n)ne/4k log n'C(n)ne/4k(1e)log n'where, 0e1 controls the degree of sparsity of the encoding scheme and k is a constant. Here c(n) is the capacity of the network such that any stored pattern is a fixed point with high probability, whereas C(n) is the capacity of the network such that all stored patterns are fixed points with high probability. The main contribution of this technical paper is a theoretical verification of the above results using the Poisson limit theorems of exchangeable events.

This letter extends the overfitting lattice filter for ARMA parameter estimation with additive noise proposed by Sun and Yahagi. A new way of calculating the lattice parameters is proposed, making their computation truly recursive. This simplifies the method in Ref.(1), and makes it suitable to the parameter estimation of high-order systems.

A high-speed data communication service such as inter-LAN is one of many services possible with ATM-based B-ISDN. Design objectives were to simplify the connection setup procedure, to ensure efficient utilization of network capacity, and to reduce delay in servers. These objectives were met in a B-ISDN service trial system featuring distributed connectionless servers connected by permanent virtual channels and cell-by-cell processing in the connectionless server. The system's eight connectionless servers accommodate up to 256 subscriber network interfaces. The authors discuss how multicast can be provided in ATM-based connectionless data networks for inter-LAN communications. Four possible configurations, distinguished by copy function (multicast/broadcast) and on functional arrangement in the inter-connectionless server network (centralized/distributed), are presented. The configurations are compared from perspectives of required hardware and network capacity. The distributed broadcast function is shown the most reasonable solution.

Some problems in formal language theory are considered and are shown to be deterministic exponential time complete. They include the problems for a given context-free grammar G, a nondeterministic finite automaton M, a deterministic pushdown automaton MD, of determining whether L(G)L(M), and whether L(MD)L(M). Polynomial time reductions are presented from the pebble game problem, known to be deterministic exponential time complete, to each of these problems.

In this paper, a methodology for designing the architecture of the processor array for wide class of image processing algorithms is proposed. A concept of spatially expanding the SFG description which enables us to handle the problem as merely one-dimensional signal processing is used in constructing the methodology. Problem of I/O interface which is critical in real-time processing is also considered.

In a coherent optical communication system, a polarization fluctuation of an optical fiber is one of the most important problem. On the other hand, for a realization of optical devices, dielectric waveguides with sinusoidally varying width are investigated. Knowledge of the electromagnetic field distribution in a dielectric waveguide with boundary perturbed time by time becomes a very interesting problem. This paper shows a numerical method to simulate the effect of the external disturbance against the dielectric waveguide from time to time. The author has discussed body fitted grid generation with moving boundary for the Poisson's equation and the Laplace's equation. Here we apply this theory for the dielectric waveguide. The technique employs a kind of an expanded numerical grid generation. As the author added time component to grid generation, the time dependent coordinate system which coincides with a contour of moving boundary could be transformed into fixed rectangular coordinate system. Two cases of the perturbations against the dielectric waveguide are treated. In the first case, we present the electric distribution in the dielectric waveguide perturbed along a propagation path. While in the second case, the electric field in the waveguide perturbed perpendicular to the propagation path. Such phenomena that the phase of the electric field modulated by the external perturbation are clarified by numerical results. This technique makes it possible not only to analyze the effect of the external disturbance in a coherent optical communication system but also to fabricate optical modulators or couplers.

In this paper, four simple nonlinear circuits with time-varying resistors are analyzed. These circuits consist of only four elements; a inductor, a capacitor, a diode and a time-varying resistor and are a kind of parametric excitation circuits whose dissipation factors vary with time. In order to analyze chaotic phenomena observed from these circuits a degeneration technique is used, that is, diodes in the circuits are assumed to operate as ideal switches. Thereby the Poincar maps are derived as one-dimensional maps and chaotic phenomena are well explained. Moreover, validity of the analyzing method is confirmed theoretically and experimentally.

Responses in the Nagumo neural circuit to pulse-train stimulation are studied using the time sequence, phase diagram, Poincare section, return map, firing rate, Lyapunov number and bifurcation diagram. For the mono-stable neuron with an equilibrium point deeper than the maximal point of a tunnel diode curve, main responses are periodic or all-or-none and chaotic responses are rarely observed. For the neuron with an equilibrium point located near the maximal point, the response to one input pulse oscillates after the undershoot and responses to pulse-trains make complex bifurcation structure in the threshold diagram. The ranges of periodic responses are stratified in the diagram. There exist broad regions of chaotic responses and chaos is not a special response of the Nagumo circuit, but it often comes out. The results are different from those obtained from Hodgkin-Huxley equations and the BVP model.

In this paper, a general theory on multiple-valued static random-access-memory (RAM) is investigated. A criterion for a stable and an unstable modes is proved with a strict mathematical method and expressed with a diagrammatic representation. Based on the theory, an NMOS 6-transistor ternary and a quaternary static RAM (SRAM) cells are proposed and simulated with PSPICE. The detail circuit design and realization are analyzed. A 10-valued CMOS current-mode static RAM cell is also presented and fabricated with standard 5-µm CMOS technology. A family of multiple-valued flip-flops is presented and they show to have desirable properties for use in multiple-valued sequential circuits. Both PSPICE simulations and experiments indicate that the general theory presented are very useful and effective tools in the optimum design and circuit realization of multiple-valued static RAMs and flip-flops.

A method is proposed for realizing any k-valued n-variable function with a celluler array, which consists of linear arrays (called input arrays) and a rectangular array (called control array). In this method, a k-valued n-variable function is divided into kn-1 one-variable functions and remaining (n1)-variable function. The parts of one-variable functions are realized by the input arrays, remaintng the (n1)-variable function is realized by the control array. The array realizing the function is composed by connecting the input arrays with the control array. Then, this array requires (kn2)kn-1 cells and the number is smaller than the other rectangular arrays. Next, a ternary cell circuit and a literal circuit are actually constructed with CMOS transistors and NMOS pass transistors. The experiment shows that these circuits perform the expected operations.

Two computational-geometric approaches to linear programming are surveyed. One is based on the prune-and-search paradigm and the other utilizes randomization. These two techniques are quite useful to solve geometric problems efficiently, and have many other applications, some of which are also mentioned.

This paper presents a VLSI-oriented arithmetic design method using a radix-2 redundant number representation with digit set {0, 1, 2} and multiple-valued current-mode (MVCM) circuit technology. We propose a carry-propagation-free (CPF) parallel addition method with redundant digit set {0, 1, 2} which is suitable for the design with MVCM circuits. Several types of CPF parallel adders are compared and the proposed CPF parallel adder with MVCM circuits offers the best total performance with respect to speed, complexity, and power dissipation. The designed basic arithmetic circuits has sufficient noise immunity to the supply voltage fluctuation which is important for stable operations of the VLSI circuits. The CPF parallel adder is effectively used as the reduction scheme of partial products in a high-speed compact multiplier. For example, the designed 3232 bit multiplier reduces the number of active elements to two-third and the number of interconnections to one-fifth of the corresponding binary Wallace tree multiplier, where the speed is almost the same. The structure is simple and regular. The static power dissipation of the designed 32-bit multiplier is estimated to be the mean value of 212 mW and the worst case of 708 mW. The total power including dynamic power dissipation would not be so large compared with that of the 32-bit binary CMOS multiplier reported under 10 MHz operation.

The evolution of Multiple-Valued Logic (MVL) circuits has been inexorably tied to the rapid technological changes induced by evolving needs and emerging developments in computing methodologies. Unfortunately for MVL, the numbers of designers of technologies and circuits whose lives are dedicated to the improvement of binary techniques, are large and overwhelming. Correspondingly, technological developments in MVL typically await the appearance of a problem or technique in the larger binary world to motivate and/or make possible some new advance. Such opportunities are inevitably quite transient since each such problem is simultaneously attacked by many others of a more conventional bent, and, as well, each technological change begets yet another, quickly. It is in the sensing of this reality that the present paper is written. Correspondingly, its thrust is two-fold: One target is the possibility of encouraging a leap ahead through modest technological projection. The other is the possibility of identifying application areas that already exist in this unbalanced competition, but which are specially suited to multiple-valued solutions. For example, it has been clear for decades that one such area is that of arithmetic. Correspondingly, we in MVL must strive quickly to concentrate our efforts on applications that exploit such demonstrable strengths. Some such applications are includes here; others are visible historically, many probably remain to be found: Search on!

A typical fault-tolerance technique of systolic arrays is to include redundant processors and links so that the array is reconfigurable when some processors fail. Another typical technique is to implement each processor by a majority voter and N (N3) copies of processors so that the faults of up to N-2 copies of processors can be masked without reconfiguration. This paper proposes a systolic linear array called reconfigurable modular redundant linear array (RMA) that combines these techniques with N4. When up to 2 copies of each processor fail in RMA, the faults can be masked without reconfiguration. When some voters or more than 2 copies of a processor fail, RMA can be reconfigured by specifying a new switch pattern. In order to perform reconfiguration efficiently, we present a reconfiguration algorithm with time complexity O (n), where n is the number of processors in RMA.

A Decision Feedback Equalizer (DFE) structure with a varying number of tap lengths was used with a recursive least squares (RLS) algorithm to determine tradeoffs between equalizer size and performance in mobile and portable digital radio systems. A mobile channel simulator, SMRCIM, was used to demonstrate how much an equalizer can improve the BER in real world urban channels. The results show that at 850MHz, the DFE is unable to improve the BER when the mobile terminal exceeds speeds of 115km/h for U.S. Digital Cellular systems. The performance of adaptive equalization for indoor high data rate systems was evaluated using the indoor channel simulator SIRCIM, and we found that DFEs have excellent performance for indoor radio channels. For simple structures, the BER is less than 10-3 at 15dB Eb/NO using coherent QPSK modulation. Finally, an equalizer structure for non-coherent π/4 DQPSK modulation was developed and simulation results are presented.

An adaptive restoration algorithm is developed for binary images degraded nonadditively with flip noises. The true image is assumed to be a realization of a Markov Random Field (MRF) and the nonadditive flip noises are assumed to be statistically independent and asymmetric. Using the Expectation and Maximization (EM) method and approximating the Baum's auxiliary function, the degraded image is restored iteratively. The algorithm is implemented as follows. First, the unknown parameters and the true image are guessed or estimated roughly. Second, using the true image estimate, the Baum's auxiliary function is approximated and then the noise and MRF parameters are reestimated. To reestimate the MRF parameters the Maximum Pseudo-likelihood (MPL) method is used. Third, using the Iterated Conditional Modes (ICM) method, the true image is reestimated. The second and third steps are carried out iteratively until by some ad hoc criterion a critical point of EM algorithm is approximated. A number of simulation examples are presented which show the effectiveness of the algorithm and the parameter estimation procedures.

In this paper, we will define Kleene-Stone logic functions which are functions F: [0, 1]n[0, 1] including the intuitionistic negation into fuzzy logic functions, and they can easily represent the concepts of necessity and possibility which are important concepts of many-valued logic systems. A set of Kleene-Stone logic functions is one of the models of Kleene-Stone algebra, which is both Kleene algebra and Stone algebra, as same as a set of fuzzy logic functions is one of the models of Kleene algebra. This paper, especially, describes some algebraic properties and representation of Kleene-Stone logic functions.

A field trial was conducted to evaluate the technical performance of land mobile message communication in different environments. The OmniTRACS system and the Ku-band JCSAT satellite were utilized as the mobile communications system and the satellite, respectively. The trial took place in September 1990 at different areas in Japan. Data collected correspond to about 65 hours of operation, during which a large number of messages were sent via the satellite. Two land mobile terminals operated simultaneously, each terminal having a function of generating messages automatically which simulates a large volume of traffic corresponding to about 50 terminals. Thus, the system was evaluated under the condition that 100 mobile terminals were in operation. Obtained data have been analyzed with a particular focus on the message transmission correlating with actual environments. The analysis was done by classifying environments into five categories: overall condition, type of roads, terrain, areas and weather conditions. The average transmission count per message experienced under all conditions is equal to 1.432 for forward messages transmitted from the hub station to mobiles, and 1.157 for return messages transmitted from mobiles to the hub station. With respect to the classification by the type of roads, for enample it becomes obvious that the performance is generally good except along roads of North-South orientation through dense urban areas. It is concluded that the message communications from/to mobiles are feasible in a wide range of environments, with the performance of success essentially depending on the visibility of satellite.

With rapid increase of information requirements from various application areas, there has been much research on the efficient information retrieval. A signature is an abstraction of information, and has been applied in many proposals of information retrieval systems. In this paper we evaluate the performance of various signature-based information retrieval methods and provide guidelines for the most effective usage to a given operational environment. We derive analytic performance evaluation models of these access methods based on retrieval time, storage overhead and insertion time. The relationships between various performance parameters are thoroughly investigated. We also perform simulation experiments by using wide range of parameter values and show that the performance experiments agree with those analytic models.