The purpose of this study is to estimate the possible effect of cellular radio on implantable cardiac pacemakers in elevators. We previously investigated pacemaker EMI in elevator by examining the E-field distribution of horizontal plane at the height of expected for implanted pacemakers inside elevators. In this paper, we introduce our method for estimating EMI impact to implantable cardiac pacemakers using EMF distributions inside the region of the human body in which pacemakers are implanted. Simulations of a human phantom in an elevator are performed and histograms are derived from the resulting EMF distributions. The computed results of field strengths are compared with a certain reference level determined from experimentally obtained maximum interference distance of implantable cardiac pacemakers. This enables us to carry out a quantitative evaluation of the EMI impact to pacemakers by cellular radio transmission. This paper uses a numerical phantom model developed based on an European adult male. The simulations evaluate EMI on implantable cardiac pacemakers in three frequency bands. As a result, calculated E-field strengths are sufficiently low to cause the pacemaker to malfunction in the region examined.

Post-wall waveguide slot arrays are potential candidates for millimeter-wave systems. The modeling of the post-walls by the equivalent solid-walls in terms of guided wavelength is indispensable for intensive optimization of slot design for reducing computational load. In the single mode waveguide slot arrays, the modeling errors of the post-wall waveguide by the solid-wall waveguide are serious especially for the transversely located slots. The S-parameter prediction errors become larger as we increase the height of the waveguide to utilize the low-loss advantage of the waveguide. The authors propose a novel post-wall waveguide structure, named as a connected post-wall (C-PW), to enhance the equivalence. The C-PW waveguide keeps enhanced equivalence to the solid-walls even for a larger substrate height. The predictions are confirmed by simulations and measurements. An 8-element linear array of reflection-cancelling slot pairs is designed by using the equivalent solid-wall model to demonstrate the feasibility of the simple design in the C-PW.

Multipath is one of the major error sources that deteriorates tracking performance in global navigation satellite system (GNSS). In this letter, the orthogonal matching pursuit (OMP) algorithm is used to estimate multipaths which are highly correlated with the line of signal (LoS) signal. The estimated multipaths are subtracted from the received signal such that the autocorrelation function of the received signal is restored to optimize the tracking performance. The performance of the proposed technique is verified via computer simulations under the multipath environment of GNSS.

This paper describes a black-box model of mixed analog-digital VLSI circuits for the prediction of microcontroller electromagnetic emissions without disclosure of manufacturer data. The model is based on small-signal simulations performed at the analog and digital building-block level, considering also layout and technology parameters, and modeling the parasitic substrate coupling paths and the interconnects. The developed model allows system designers to predict the impact of microcontroller operation on the system-level EMEs by carrying out low-time consuming simulations in the early design phases of their products thus minimizing unnecessary costs and scheduling delays. In this paper, the black-box model of an 8-bit microcontroller is described and it is employed to predict the conducted emission delivered through the input-output ports.

In this paper, the transmission and reflection properties of the microstrip line with bends are investigated using the Fourier transform and a mode-matching technique. Based on the waveguide model, the microstrip bends are modeled as the rectangular waveguides with perfect electric conducting top and bottom walls and perfect magnetic conducting side walls. Analytical closed-form expressions for transmission and reflection coefficients are developed using the residue calculus. To verify the proposed method, numerical computations are performed for comparison with 3D full-wave simulations and measurements. A quarter-wavelength transmission line scheme is also proposed to improve the signal integrity of double bend discontinuity.

In this letter, delay-dependent stability criterion for linear time-delay systems with multiple time varying delays is proposed by employing the Lyapunov-Krasovskii functional approach and integral inequality. By the N-segmentation of delay length, we obtain less conservative results on the delay bounds which guarantee the asymptotic stability of the linear time-delay systems with multiple time varying delays. Simulation results show that the proposed stability criteria are less conservative than several other existing criteria.

In deep submicron era, wire delay is no longer negligible and is becoming a dominant factor of the system performance. To cope with the increasing wire delay, several state-of-the-art architectural synthesis flows have been proposed for the distributed register architectures by enabling on-chip multicycle communication. In this article, we present a new performance-driven criticality-aware synthesis framework CriAS targeting regular distributed register architectures. To achieve high system performance, CriAS features a hierarchical binding-then-placement for minimizing the number of performance-critical global data transfers. The key ideas are to take time criticality as the major concern at earlier binding stages before the detailed physical placement information is available, and to preserve the locality of closely related critical components in the later placement phase. The experimental results show that CriAS can achieve an average of 14.26% overall performance improvement with no runtime overhead as compared to the previous art.

The ability to find the speaker's face region in a video is useful for various applications. In this work, we develop a novel technique to find this region within different time windows, which is robust against the changes of view, scale, and background. The main thrust of our technique is to integrate audiovisual correlation analysis into a video segmentation framework. We analyze the audiovisual correlation locally by computing quadratic mutual information between our audiovisual features. The computation of quadratic mutual information is based on the probability density functions estimated by kernel density estimation with adaptive kernel bandwidth. The results of this audiovisual correlation analysis are incorporated into graph cut-based video segmentation to resolve a globally optimum extraction of the speaker's face region. The setting of any heuristic threshold in this segmentation is avoided by learning the correlation distributions of speaker and background by expectation maximization. Experimental results demonstrate that our method can detect the speaker's face region accurately and robustly for different views, scales, and backgrounds.

The Waveguide-Penetration method is a permittivity measurement technique where a columnar object pierces a rectangular waveguide through a pair of holes at the center of its broad walls. The permittivity of the object is estimated from measured S-parameters . This paper demonstrates a scheme for analyzing permittivity measurement errors in the Waveguide-Penetration method. The sources of errors are categorized into systematic and random error sources. Systematic errors in the values of the sample and waveguide holes diameters, the effect of sample's length, and the influence of ambient temperature are investigated and corrected for. Potential random error sources such as imperfect TRL calibration elements, VNA thermal noise, sample loading, and test-port cable flexure are analyzed and their contribution to random errors are estimated.

Broadband optical access services are spreading throughout the world, and the number of fiber to the home (FTTH) subscribers is increasing rapidly. Telecom operators are constructing passive optical networks (PONs) to provide optical access services. Externally installed optical splitters for PONs are very important passive devices in optical access networks, and they must provide satisfactory performance as outdoor plant over long periods. Therefore, we calculate the failure rate of optical access networks and assign a failure rate to the optical splitters in optical access networks. The maximum cumulative failure rate of 18 optical splitters was calculated as 0.025 for an optical access fiber length of 2.1 km and a 20-year operating lifetime. We examined planar lightwave circuit (PLC) type optical splitters for use as outside plant in terms of their optical characteristics and environmental reliability. We confirmed that PLC type optical splitters have sufficient optical performance for a PON splitter and sufficient reliability as outside plant in accordance with ITU-T standard values. We estimated the lifetimes of three kinds of PLC type optical splitters by using accelerated aging tests. The estimated failure rate of these splitters installed in optical access networks was below the target value for the cumulative failure rate, and we confirmed that they have sufficient reliability to maintain the quality of the network service. We developed 18 optical splitter modules with plug and socket type optical connectors and optical fiber cords for optical aerial closures designed for use as outside plant. These technologies make it easy to install optical splitters in an aerial optical closure. The optical splitter modules have sufficient optical performance levels for PONs because the insertion loss at the commercially used wavelengths of 1.31 and 1.55 µm is less than the criterion established by ITU-T Recommendation G.671 for optical splitters. We performed a temperature cycling test, and a low temperature storage and damp heat test to confirm the long-term reliability of these modules. They exhibited sufficient reliability as regards heat and moisture because the maximum loss change was less than 0.3 dB.

The quantity and state of fishery resources must be known so that they can be sustained. The fish culture industry is also planning to investigate resources. The results of investigations are used to estimate the catch size, times fish are caught, and future stocks. We have developed a method for extracting scallop areas from gravel seabed images to assess fish resources and also developed an automatic system that measures their quantities, sizes, and states. Japanese scallop farms for fisheries are found on gravel and sand seabeds. The seabed images are used for fishery investigations, which are absolutely necessary to visually estimate, and help us avoid using the acoustic survey. However, there is no automatic technology to measure the quantities, sizes, and states of resources, and so the current investigation technique is the manual measurement by experts. There are varied problems in automating technique. The photography environments have a high degree of noise, including large differences in lighting. Gravel, sand, clay, and debris are also included in the images. In the gravel field, we can see scallop features, such as colors, striped patterns, and fan-like shapes. This paper describes the features of our image extracting method, presents the results, and evaluates its effectiveness.

This letter addresses the edge effect on a windowed discrete Fourier transform (WDFT)-based channel estimator for orthogonal frequency division multiplexing (OFDM) systems with virtual carriers in non-sample spaced channels and derives a sufficient condition to reduce the edge effect. Moreover, a modified WDFT-based channel estimator with multi-step linear prediction as an edge effect reduction technique is proposed. Simulation results show that it offers around 5 dB signal-to-noise ratio (SNR) gain over the conventional WDFT-based channel estimator at bit error rate (BER) of 10-3.

We detail a self synchronous field programmable gate array (SSFPGA) with dual-pipeline (DP) architecture to conceal pre-charge time for dynamic logic, and its throughput optimization by using pipeline alignment implemented on benchmark circuits. A self synchronous LUT (SSLUT) consists of a three input tree-type structure with 8 bits of SRAM for programming. A self synchronous switch box (SSSB) consists of both pass transistors and buffers to route signals, with 12 bits of SRAM. One common block with one SSLUT and one SSSB occupies 2.2 Mλ2 area with 35 bits of SRAM, and the prototype SSFPGA with 3430 (1020) blocks is designed and fabricated using 65 nm CMOS. Measured results show at 1.2 V 430 MHz and 647 MHz operation for a 3 bit ripple carry adder, without and with throughput optimization, respectively. We find that using the proposed pipeline alignment techniques we can perform at maximum throughput of 647 MHz in various benchmarks on the SSFPGA. We demonstrate up to 56.1 times throughput improvement with our pipeline alignment techniques. The pipeline alignment is carried out within the number of logic elements in the array and pipeline buffers in the switching matrix.

This research addresses a high-speed computation method for the Kleene star of the weighted adjacency matrix in a max-plus algebraic system. We focus on systems whose precedence constraints are represented by a directed acyclic graph and implement it on a Cell Broadband EngineTM (CBE) processor. Since the resulting matrix gives the longest travel times between two adjacent nodes, it is often utilized in scheduling problem solvers for a class of discrete event systems. This research, in particular, attempts to achieve a speedup by using two approaches: parallelization and SIMDization (Single Instruction, Multiple Data), both of which can be accomplished by a CBE processor. The former refers to a parallel computation using multiple cores, while the latter is a method whereby multiple elements are computed by a single instruction. Using the implementation on a Sony PlayStation 3TM equipped with a CBE processor, we found that the SIMDization is effective regardless of the system's size and the number of processor cores used. We also found that the scalability of using multiple cores is remarkable especially for systems with a large number of nodes. In a numerical experiment where the number of nodes is 2000, we achieved a speedup of 20 times compared with the method without the above techniques.

The tiled-display system has been used as a Computer Supported Cooperative Work (CSCW) environment, in which multiple local (and/or remote) participants cooperate using some shared applications whose outputs are displayed on a large-scale and high-resolution tiled-display, which is controlled by a cluster of PC's, one PC per display. In order to make the collaboration effective, each remote participant should be aware of all CSCW activities on the titled display system in real-time. This paper presents a capturing and delivering mechanism of all activities on titled-display system to remote participants in real-time. In the proposed mechanism, the screen images of all PC's are periodically captured and delivered to the Merging Server that maintains separate buffers to store the captured images from the PCs. The mechanism selects one tile image from each buffer, merges the images to make a screen shot of the whole tiled-display, clips a Region of Interest (ROI), compresses and streams it to remote participants in real-time. A technical challenge in the proposed mechanism is how to select a set of tile images, one from each buffer, for merging so that the tile images displayed at the same time on the tiled-display can be properly merged together. This paper presents three selection algorithms; a sequential selection algorithm, a capturing time based algorithm, and a capturing time and visual consistency based algorithm. It also proposes a mechanism of providing several virtual cameras on tiled-display system to remote participants by concurrently clipping several different ROI's from the same merged tiled-display images, and delivering them after compressing with video encoders requested by the remote participants. By interactively changing and resizing his/her own ROI, a remote participant can check the activities on the tiled-display effectively. Experiments on a 32 tiled-display system show that the proposed merging algorithm can build a tiled-display image stream synchronously, and the ROI-based clipping and delivering mechanism can provide individual views on the tiled-display system to multiple remote participants in real-time.

Numerical simulations of the gain and phase center measurements for a pyramidal horn antenna are carried out. The electromagnetic simulation is based on the finite integration method. The gain of horn antennas varies with the distance between their apertures, even if the antennas satisfy the far-field criterion. This gain variation is shown to correspond with the ratio of the distance between the apertures to the distance between the phase centers. The experimental results also demonstrate the efficacy of considering the location of the phase center for antenna calibration.

This paper presents a high-speed, low-complexity VLSI architecture based on the modified Euclidean (ME) algorithm for Reed-Solomon decoders. The low-complexity feature of the proposed architecture is obtained by reformulating the error locator and error evaluator polynomials to remove redundant information in the ME algorithm proposed by Truong. This increases the hardware utilization of the processing elements used to solve the key equation and reduces hardware by 30.4%. The proposed architecture retains the high-speed feature of Truong's ME algorithm with a reduced latency, achieved by changing the initial settings of the design. Analytical results show that the proposed architecture has the smallest critical path delay, latency, and area-time complexity in comparison with similar studies. An example RS(255,239) decoder design, implemented using the TSMC 0.18 µm process, can reach a throughput rate of 3 Gbps at an operating frequency of 375 MHz and with a total gate count of 27,271.

10G-EPON systems have attracted a great deal of attention as a way of exceeding to realize over 10 Gb/s for optical subscriber networking. Rapid burst-mode transmitting/receiving techniques are the key technologies enabling the burst-mode upstream transmission of 10G-EPON systems. In this paper, we have developed a OLT burst-mode 3R receiver incorporating a burst-mode AGC optical receiver and an 82.5 GS/s over-sampling burst-mode CDR and a ONU burst-mode transmitter with high launch power DFB-LD of 1.27 µm wavelength to fully compliant with IEEE802.3av 10G-EPON PR30 standards. The transmitting characteristics of a fast LD turn-on/off time of less than 6ns and a high launch power of more than +8.0 dBm, and the receiving characteristics of receiver sensitivity of -30.1 dBm and the upstream power budget of 38.1 dB are successfully achieved.

In this paper, a novel CMA (constant modulus algorithm) algorithm employing fast convolution in the DFT (discrete Fourier transform) domain is proposed. We propose a non-linear adaptation algorithm that minimizes CMA cost function in the DFT domain. The proposed algorithm is completely new one as compared to the recently introduced similar DFT domain CMA algorithm in that, the original CMA cost function has not been changed to develop DFT domain algorithm, resulting improved convergence properties. Using the proposed approach, we can reduce the number of multiplications to O(Nlog2 N), whereas the conventional CMA has the computation order of O(N2). Simulation results show that the proposed algorithm provides a comparable performance to the conventional CMA.

A high directivity microstrip coupler suppressing leak coupling with a cancellation circuit of a Wilkinson divider is presented. The presented coupler utilizes a cancellation circuit between a coupling port and an isolation port of the conventional microstrip coupler to enhance the isolation. The cancellation circuit consists of the Wilkinson divider, the multistage attenuator, and the phase offset line. The frequency to enhance the isolation is controlled by the attenuators. As the directivity is improved without the modification of the conventional coupler, the cancellation circuit can be applied to the fabricated conventional couplers. The measured directivity of the presented 1/18 λ coupler is improved from 4.8 dB to 43.0 dB at 2.6 GHz, compared with the conventional 1/4 λ coupler with -20 dB coupling. Simultaneously, the 27.4% relative bandwidth with the 20 dB directivity is achieved.