To achieve a sound field reproduction system, it is important to design multichannel inverse filters which cancel the effects of room transfer functions. The design method in the frequency domain based on the least-norm solution (LNS) requires less memory and less calculation than the design method in the time domain. However, the LNS method cannot guarantee the causality or stability of the filters. In this paper, a design method of a time-domain inverse filter using iterative processing in the frequency domain for multichannel sound field reproduction is proposed, and the result of numerical analysis is described. The proposed method can decrease the squared error of every control point by 3-12 dB. Furthermore, the sound reproduced by this method attains over 13 dB improvement in the segmental signal-noise ratio (SNR) compared with that designed by the LNS method for real environment impulse responses.

A new method for active suppression of reflected sound waves is proposed in this paper. The proposed control system is based on the state feedback control. FEM (Finite Element Method) was applied to represent the sound field under the system equations as proposed by Samejima et al. A new performance index was derived so as to minimize the sound intensity leaving a control region, which was set around the control source on a wall. On the basis of the system equations and the new performance index, an optimal feedback law governing suppression of waves reflected from the wall was derived. In order to evaluate the validity of the proposed method, computer simulations in one- and two-dimensional sound fields were executed. In a one-dimensional sound field, the time response was examined, and the distribution of the instantaneous sound intensity was evaluated in a two-dimensional sound field. The results showed that the reflected sound waves can be suppressed quite well in one-dimensional sound fields by using this method and that the proposed method can potentially suppress the reflected sound waves in the two-dimensional sound fields as well.

This paper is concerned with fuzzy modeling in some reduction methods of inference rules with gradient descent. Reduction methods are presented, which have a reduction mechanism of the rule unit that is applicable in three parameters--the central value and the width of the membership function in the antecedent part, and the real number in the consequent part--which constitute the standard fuzzy system. In the present techniques, the necessary number of rules is set beforehand and the rules are sequentially deleted to the prespecified number. These methods indicate that techniques other than the reduction approach introduced previously exist. Experimental results are presented in order to show that the effectiveness differs between the proposed techniques according to the average inference error and the number of learning iterations.

Automatic repeat request (ARQ) for wireless ATM (WATM) operating at 20 Mbit/s or higher is required to achieve high throughput performance as well as high transmission quality, i.e., low CLR (cell loss ratio). Selective Repeat (SR) and Go-Back-N (GBN) are typical ARQ schemes. Though SR-ARQ is superior to GBN-ARQ in throughput performance, the implementation complexity of SR-ARQ's control procedures is disadvantageous to its application to high-speed wireless systems. In addition, when PDU (protocol data unit) length on wireless link is short, the capacity for ARQ control messages can be significantly large. GBN-ARQ, on the other hand, cannot avoid serious throughput degradation due to fairly high BER caused by multipath fading and shadowing, though its implementation is simple. To solve the above-mentioned problems, this paper proposes a novel ARQ scheme named PRIME-ARQ (Partial selective Repeat superIMposEd on gbn ARQ). PRIME-ARQ achieves high throughput performance, almost equal to selective repeat ARQ, with a simple algorithm resulting in reduced implementation complexity for high speed operation. This paper describes the design, implementation, and performance of the proposed PRIME-ARQ. In addition, it shows the experimental results using an experimental PRIME-ARQ hardware processor and proto-type AWA equipment.

This paper reports the field test performance of a base station (BS) equipped with a linear parallel multi-stage interference canceller for uplink of wideband CDMA in a suburban area. The field test was performed with one desired mobile station (MS) moving around the BS, and three fixed interfering MSs having a target SIR 11 dB higher than that of the desired MS. The field test clearly demonstrates that using interference cancellation with a proper suppression factor (or weighting factor), can reduce the transmission power of the desired MS by around 6 dB. This performance was also compared with calculated data and the interference canceller was verified to function as theoretically expected. The receive power capture ratio was estimated at around 96%. This paper therefore establishes that interference cancellation performance of CDMA systems in the field can be found by estimating the receive power capture ratio and the theoretical results of interference cancellation.

In a real-time vision system, parallel memory access is essential for highly parallel image processing. The use of multiple memory modules is one efficient technique for parallel access. In the technique, data stored in different memory modules can be accessed in parallel. This paper presents an optimal memory allocation methodology to map data to be read in parallel onto different memory modules. Based on the methodology, a high-performance VLSI processor for three-dimensional instrumentation is proposed.

Processes in image recognition include target detection and shape extraction. Active Net has been proposed as one of the methods for such processing. It treats the target detection in an image as an energy optimization problem. In this paper, a problem of the conventional Active Net is presented and the new Active Net is proposed. The new net is improved the ability for detecting a target. Finally, the validity of the proposed net is confirmed by experimental results.

A secret sharing scheme allows a secret to be shared among a set of participants, P, such that only authorized subsets of P can recover the secret, but any unauthorized subset can not recover the secret. It can be used to protect important secret data, such as cryptographic keys, from being lost or destroyed without accidental or malicious exposure. In this paper, we consider secret sharing schemes based on interpolating polynomials. We show that, by simply increasing the number of shares held by each participant, there is a multiple assignment scheme for any monotone access structure such that cheating can be detected with very high probability by any honest participant even the cheaters form a coalition in order to deceive him.

With the advancement of technologies in wireless communication and computer down-sizing, it becomes possible to access a global network using handy terminals which are equipped with wireless communication facilities. In such a mobile computing environment, data management is one of the primary objectives of effective computer uses. However, since conventional distributed data management technologies assume that servers and clients are fixed at certain locations in a network, they do not provide any tools to construct advanced applications which make full use of dynamically changing information in such an environment. In this paper, in order to incorporate data distributed over mobile computing environment, we propose a dynamic data integration mechanism called MobiView which is an enhanced view mechanism of a conventional database system. In MobiView, we introduce four methods for database indication without using conventional host name or its local name: host-specified, cell-specified, location-dependent, and MobiView-oriented, through which we discuss how to handle both mobile database servers and mobile database clients.

In this paper, an architecture of multi-threaded processor for embedded systems is proposed and evaluated comparing with other processors for embedded systems. The experimental results show the trade-off of hardware costs and execution times among processors. Taking proposed multi-threaded processor into account as an embedded processor, design space of embedded systems are enlarged and more suitable architecture can be selected under some design constraints.

Many experimentally and theoretically based models have been proposed to predict, quantitatively evaluate, and combat the fading phenomenon in mobile communication systems. However, to the best of the authors' knowledge, up to now there is no objective method to determine which is the most suitable distribution to model the fading phenomenon based on experimental data. In this work, the Minimum Description Length (MDL) criterion for model selection is proposed for that purpose. Furthermore, the MDL analysis is performed for some of the most widely used fading models based on measurements taken in a sub-urban environment.

The k-vertex-connectivity augmentation problem for a specified set of vertices of a graph with degree-unchangeable vertices, kVCA(G,S,D), is defined as follows: "Given a positive integer k, an undirected graph G=(V,E), a specified set of vertices S V and a set of degree-changeable vertices D V, find a smallest set of edges E such that the vertex-connectivity of S in (V,E E) is at least k and E {(u,v) u,v D}. " The main result of the paper is that checking the existence of a solution and finding a solution to 2VCA(G,S,D) or 3VCA(G,S,D) can be done in O(|V|+|E|) or O(|V|(|V|+|E|)) time, respectively.

Recently, Vatan, Roychowdhury and Anantram have presented two types of revised versions of the Calderbank-Shor-Steane code construction, and have also provided an exhaustive procedure for determining bases of quantum error-correcting codes. In this paper, we investigate the revised versions given by Vatan et al., and point out that there is no essential difference between them. In addition, we propose an efficient algorithm for searching for bases of quantum error-correcting codes. The proposed algorithm is based on some fundamental properties of classical linear codes, and has much lower complexity than Vatan et al.'s procedure.

This paper proposes an efficient reduction method for a substrate network model, which is extracted from layout data, to analize a substrate coupling noise. The proposed method adopts in a reduction operation a hierarchic structure of a substrate RC network model, a computational procedure using matrix elements, and an expression of admittance as polynominal in complex frequency s=jω. These techniques improve computational efficiency and are suitable for an implementation. In the example of a triple well CMOS circuit, a reduced model, from 7500 nodes to 5 nodes, has less than 25% errors up to 1 GHz.

A new architecture-based Dynamically Programmable Arithmetic Array processor (DPAA) is proposed for general purpose Digital Signal Processing applications. Parallelism and pipelining are achieved by using DPAA, which consists of various basic arithmetic blocks connected through a code-division multiple access bus interface. The proposed architecture poses 100% interconnection flexibility because connections are done virtually through code matching instead of physical wire connections. Compared to conventional multiplexing architectures, the proposed interconnection topology consumes less chip area and thus, more arithmetic blocks can be incorporated. A 16-bit prototype chip incorporating 10 multipliers and 40 other arithmetic blocks had been implemented into a 4.5 mm 4.5 mm chip with 0.6 µm CMOS process. DPAA also features its simple programmability, as numerical formula can be used to configure the processor without programming languages or specialized CAD tools.

We consider syntactic congruences of some codes. As a main result, for an infix code L, it is proved that the following (i) and (ii) are equivalent and that (iii) implies (i), where PL is the syntactic congruence of L. (i) L is a PL2-class. (ii) Lm is a PLk-class, for given two integers m and k with 1 m k. (iii)L* is a PL*-class. Next we show that every (i), (ii) and (iii) holds for a strongly infix code L. Moreover we consider properties of syntactic conguences of a residue W(L) for a strongly outfix code L.

By combining the technology of all-optical saturable absorbers and the diffractive optics, a scheme of all-optical time division demultiplexing module is investigated. Following authors' proposal, design, test fabrication of the optical platform in the previous paper, this paper focuses on the characterization of switching performance. Using a multiple quantum well saturable absorber of InGaAs/InAlAs composition, and gain switched semiconductor laser pulses of 25 ps pulse width, the switching function was demonstrated experimentally at wavelength of 1.55 µm. The switching on-off ratio was compared among 4 lens configuration, 2 lens configuration (2L) and free space, collinear geometry. No degradation was observed in the case of 2 lens configuration in comparison to collinear illumination. Thus the feasibility of all-optical switch module with power efficiency and high speed is predicted, under the assumption of the progress in sub-micron lithography.

RHiNET-2/SW is a network switch for the RHiNET-2 parallel computing system. RHiNET-2/SW enables high-speed and long-distance data transmission between PC nodes for parallel computing. In RHiNET-2/SW, a one-chip CMOS switch-LSI and eight pairs of 800-Mbit/s 12-channel parallel optical interconnection modules are mounted into a single compact board. This switch allows high-speed 8-Gbit/s/port parallel optical data transmission over a distance of up to 100 m, and the aggregate throughput is 64 Gbit/s/board. The CMOS-ASIC switching LSI enables high-throughput (64 Gbit/s) packet switching with a single chip. The parallel optical interconnection modules enable high-speed and low-latency data transmission over a long distance. The structure and layout of the printed circuit board is optimized for high-speed, high-density device implementation to overcome electrical problems such as signal propagation-loss and crosstalk. All of the electrical interfaces are composed of high-speed CMOS-LVDS logic (800 Mbit/s/pin). We evaluated the reliability of the optical I/O port through long-term data transmission. No errors were detected during 50 hours of continuous data transmission at a data rate of 800 Mbit/s 10 bits (BER: < 2.44 10-14). This test result shows that RHiNET-2/SW can provide high-throughput, long-transmission-length, and highly reliable data transmission in a practical parallel computing system.

An improved pulse shaper is proposed which is able to control both the spatial and temporal profile of femtosecond light pulses. Our pulse shaper exploits the spatio-temporal coupling effect seen in pulse shapers. Its properties are numerically analyzed by application of the Wigner distribution function. We confirm that the spatio-temporal output pulse track dictates the differentiation of the phase mask; that the degree of spatio-temporal coupling is determined by the focal length ratio of the lenses in the pulse shaper; and that space to spatial-frequency chirp results from misalignment of lenses.

We propose a low-cost, high-uniformity, and low excess loss star coupler. The proposed star coupler comprises a planar lightguide, a diffuser, and polymer optical fibers (POFs). High-uniformity of optical power distribution was enabled by utilizing the diffused light transmission. Input light is diffused by the diffuser that is attached between the input POFs and the planar lightguide and transmitted through the planar lightguide. The optimum width-to-length ratio of the lightguide is clarified through simulations and experiments. We fabricated the star couplers based on the optimum width-to-length ratio for evaluation. The fabricated 1616 star coupler showed the excellent uniformity at the distribution ratio of 0.8 dB and the excess loss of 3.3 dB. The fabricated star coupler also provides a wide tolerance for misalignment. The maximum number of nodes to assure high transmission quality and the bandwidth of the proposed star coupler are discussed. The proposed star coupler is remarkably cost effective since it can be produced by injection-molding technology. The proposed star coupler enables easy multi-channel interconnection.