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[Keyword] EE(4073hit)

3541-3560hit(4073hit)

  • The Prediction of Attenuation Due to Aircraft's Flying across the Earth-Satellite Link at SHF

    Honggang ZHANG  Takashi YOSHINO  Shiro ITO  Yoji NAGASAWA  Hirokazu ANDO  Rampo SATO  

     
    PAPER-Electronic and Radio Applications

      Vol:
    E81-B No:8
      Page(s):
    1687-1695

    This paper develops a prediction model for evaluating the influence of propagation attenuation due to aircraft's flying across the earth-satellite link. This prediction model is based on the Aperture-field method of Huygens-Fresnel wave theory. Considering arriving and taking off course around airport, attenuation impairment is calculated for different types of aircrafts and flight directions. In order to verify this model's accuracy, numerical results are compared with measurement values. The calculations agree well with the measurements. Ground antenna directivity and anticipated impairment to digital broadcasting system such as Perfect TV are also discussed.

  • Effect of the Height and Diameter of the Cup on Cup Microstrip Antennas

    Masato TANAKA  

     
    LETTER-Antennas and Propagation

      Vol:
    E81-B No:8
      Page(s):
    1700-1702

    The results of experiments on the effect of the height and diameter of the cup on cup microstrip antennas are presented. The results show that the optimum height of the cup for the narrowest beamwidth and the highest gain is about 1/3 λ, and that the beamwidth decreases and the gain increases as the diameter of the cup increases.

  • A New Radar System Operating in the Forward-Scatter Region

    Kohki NAKATSUKA  

     
    LETTER-Electronic and Radio Applications

      Vol:
    E81-B No:7
      Page(s):
    1553-1557

    A new radar system is presented, which consists of one main radar and cooperative plural transponders. The transponders are integrated in the respective retrodirective antennas which are arranged beyond the horizon in such a manner as they surround the main radar. An algorithm for determining the three-dimensional target position is given. Computer simulations have been made for different target positions by assuming measurement errors. A target whose monostatic radar cross section is small or has been specially reduced by absorbing materials could be detected by this system if it is properly constructed.

  • High Speed Multimedia-Multimode TDMA Radio Transmission System for IMT-2000

    Mitsuhiko MIZUNO  Eimatsu MORIYAMA  Yoichi SAITO  Hiroshi USAMI  Akihiro SHIBUYA  Tetsuo ONODERA  

     
    INVITED PAPER

      Vol:
    E81-B No:7
      Page(s):
    1327-1329

    MTDMA (Multimedia, Multimode TDMA) system has been developed for the 3rd generation mobile communications. An adaptive modulation technique is employed, which select 16 QAM or QPSK modulations fit for the O (Indoor Office)/P (Outdoor to Indoor and Pedestrian) communication environments. The maximum user rate of 4 Mbps is realized. Basic specification is described for O, P and V environments.

  • Frequency Domain Diakoptics for IC Packaging Structures Based on the PEE and FDTD Methods

    Tsugumichi SHIBATA  Tatsuo ITOH  

     
    INVITED PAPER-Functional Modules and the Design Technology

      Vol:
    E81-C No:6
      Page(s):
    801-809

    This paper describes a diakoptics approach to the field simulation of shielded structures. If the structure can be divided so that the sliced cross section is homogeneously filled with a medium in the metal-surrounded region, the frequency domain diakoptics can be effectively formulated. In the method, the partial eigenfunction expansion (or modal expansion) is utilized at the interface between the divided structures, and the finite difference time domain calculation is used to characterize some of the divided parts. The synthesis of total characteristics is demonstrated using a simple example. The issue of term truncation in the eigenfunction expansion is also addressed and an effective algorithm for the term selection (mode selection) is proposed. The techniques described here are applicable to metal package designs for efficient structure optimization.

  • Basic Characteristics of a Quarter-Wavelength CPW Resonator with Tap-Feed Structure and Its Application to a Bandpass Filter with Attenuation Poles

    Kouji WADA  Ikuo AWAI  

     
    PAPER-Passive Element

      Vol:
    E81-C No:6
      Page(s):
    924-933

    Properties of a quarter-wavelength coplanar waveguide resonator such as resonant frequency, external quality factor (Qe) are characterized by a theoretical approach and verified by the experiment. The unloaded quality factor (Q0) of the resonator is also examined experimentally. After new types of combline bandpass filter (BPF) made of these resonators are realized, their transmission and reflection characteristics are examined theoretically and experimentally. A new combline BPF having attenuation poles are also realized. A simple method to produce two-port equivalent circuit of these BPF is presented in this paper. The transmission characteristics including such as the control of attenuation poles of these filters are explained by the created equivalent circuit with the concept of even and odd modes. A new method of describing attenuation poles is established.

  • A Fault-Tolerant Wormhole Routing Algorithm in Two Dimensional Mesh Networks

    Jinsoo KIM  Ji-Yun KIM  Hyunsoo YOON  Seung Ryoul MAENG  Jung Wan CHO  

     
    PAPER-Fault Tolerant Computing

      Vol:
    E81-D No:6
      Page(s):
    532-544

    We propose a fault-tolerant routing algorithm for 2D meshes. Our routing algorithm can tolerate any number of concave fault regions. It is based on xy-routing and uses the concept of the fault ring/chain composed of fault-free elements surrounding faults. Three virtual channels per physical link are used for deadlock-free routing on a fault ring. Four virtual channels are needed for a fault chain. For a concave fault ring, fault-free nodes in the concave region have been deactivated to avoid deadlock in the previous algorithms, which results in excessive loss of the computational power. Our algorithm ensures deadlock-freedom by restricting the virtual channel usage in the concave region, and it minimizes the loss of the computational power. We also extend the proposed routing scheme for adaptive fault-tolerant routing. The adaptive version requires the same number of virtual channels as the deterministic one.

  • An Efficient Mandarin Text-to-Speech System on Time Domain

    Yih-Jeng LIN  Ming-Shing YU  

     
    PAPER-Speech Processing and Acoustics

      Vol:
    E81-D No:6
      Page(s):
    545-555

    This paper describes a complete Mandarin text-to-speech system on time domain. We take advantage of the advancement of memory technology, which achieves ever-increasing capacity and ever-lower price. We try to collect as more as possible the synthesis units in a Mandarin text-to-speech system. With such an effort, we developed simpler speech processing techniques and achieved faster processing speed by using only an ordinary personal computer. We also developed delicate methods to measure the intelligibility, comprehensibility, and naturalness of a Mandarin text-to-speech system. Our system performs very well compared with existing systems. We first develop a set of useful algorithms and methods to deal with some features of the syllables, such as duration, amplitude, fundamental frequency, pause, and so on. Based on these algorithms and methods, we then build a Mandarin text-to-speech system. Given any Chinese text in some computerized form, e. g. , in BIG-5 code representation, our system can pronounce the text in real time. Our text-to-speech system runs on an IBM 80486 compatible PC, with no special hardware for signal processing. The evaluation of our text-to-speech system is based on a proposed subjective evaluation method. An evaluation was made by 51 undergraduate students. The intelligibility of our text-to-speech system is 99. 5%, the comprehensibility of our text-to-speech system is 92. 6%, and the naturalness of our text-to-speech system is 81. 512 points in a percentile grading system (the highest score is 100 points, and the lowest score is 0 point). Other 40 Ph. D. students also did the same evaluation about naturalness. The result shows that the naturalness of our text-to-speech system is 82. 8 points in a percentile grading system.

  • Efficient Encoding of Excitation Codes Using Trained Partial Algebraic Codebook

    Yun Keun LEE  Hwang Soo LEE  Robert M. GRAY  

     
    LETTER-Speech Processing and Acoustics

      Vol:
    E81-D No:6
      Page(s):
    612-615

    An efficient encoding method of excitation codes using a partial algebraic codebook (PAC) is proposed. Since the conventional algebraic code excited linear prediction (ACELP) encodes the positions and signs of all excitation pulses separately, the bits required for encoding excitation codes take a large portion of the total bit rate. Vector quantization (VQ) of the positions and signs of the excitation pulses results in a PAC. Using PAC instead of the full set of algebraic codes, we can reduce the bits required to encode the excitation codes while maintaining the output speech quality. An iterative training algorithm is proposed to obtain the suboptimal PAC by modifying the Lloyd algorithm. Simulation results show that considerable bit savings can be obtained with only a small amount of degradation in the segmental signal to noise ratio (SEGSNR).

  • Wide-Band Subharmonically Injection-Locked Oscillators Using Three-Dimensional MMIC Technology

    Kenji KAMOGAWA  Ichihiko TOYODA  Tsuneo TOKUMITSU  Kenjiro NISHIKAWA  

     
    PAPER-Functional Modules and the Design Technology

      Vol:
    E81-C No:6
      Page(s):
    848-855

    Subharmonically Injection-locked oscillators (ILO's) with very wide injection-locking ability are presented. Two types of ILO MMIC's with this ability are proposed. The oscillation frequency tuning function of the ILO MMIC is very useful for expansion of the injection locking range at higher subharmonics. One consists of a shunt varactor diode inserted into the oscillation loop, and the other incorporates a vector-combining configuration with in-phase divider and 90 degree hybrid. Using three-dimensional MMIC's technology which can offer miniature and high-density passive circuits, the vector-combining type ILO is formed in a very compact area of 1. 7 mm2. Fabricated 20 GHz-band ILO achieves a wide tuning ranges of 870 MHz, resulting in a very wide locking range for higher subharmonics. The wide frequency tuning ability also reduces phase noise, shortens a locking time and compensates the center frequency deviation against temperature, as well as increasing locking range. The measured results show that the ILO configuration is extremely suitable for realizing simple, fully monolithic and low phase noise millimeter-wave frequency synthesizers.

  • Parallel Architecture for Generalized LFSR in LSI Built-In Self Testing

    Tomoko K. MATSUSHIMA  Toshiyasu MATSUSHIMA  Shigeichi HIRASAWA  

     
    PAPER-Reliability and Fault Analysis

      Vol:
    E81-A No:6
      Page(s):
    1252-1261

    This paper presents a new architecture for multiple-input signature analyzers. The proposed signature analyzer with Hδ inputs is designed by parallelizing a GLFSR(δ,m), where δ is the number of input signals and m is the number of stages in the feedback shift register. The GLFSR, developed by Pradhan and Gupta, is a general framework for representing LFSR-based signature analyzers. The parallelization technique described in this paper can be applied to any kind of GLFSR signature analyzer, e. g. , SISRs, MISRs, multiple MISRs and MLFSRs. It is shown that a proposed signature analyzer with Hδ inputs requires less complex hardware than either single GLFSR(Hδ,m)s or a parallel construction of the H original GLFSR(δ,m)s. It is also shown that the proposed signature analyzer, while requiring simpler hardware, has comparable aliasing probability with analyzers using conventional GLFSRs for some CUT error models of the same test response length and test time. The proposed technique would be practical for testing CUTs with a large number of output sequences, since the test circuit occupies a smaller area on the LSI chip than the conventional multiple-input signature analyzers of comparable aliasing probability.

  • The Degrees of Immune and Bi-Immune Sets

    John GESKE  

     
    PAPER-Automata,Languages and Theory of Computing

      Vol:
    E81-D No:6
      Page(s):
    491-495

    We study the pm-degrees and pT-degrees of immune and bi-immune sets. We demonstrate the existence of incomparable pT-immune degrees in deterministic time classes.

  • Two-Way Power Divider for Partially Parallel Feed in Single-Layer Slotted Waveguide Arrays

    Kenji FUKAZAWA  Jiro HIROKAWA  Makoto ANDO  Naohisa GOTO  

     
    PAPER-Antennas and Propagation

      Vol:
    E81-B No:6
      Page(s):
    1248-1254

    The authors propose a novel waveguide two-way power divider, named as τ-junction, in a feed waveguide of a single-layer slotted waveguide array antenna. This junction occupies only a small space and is placed in the middle of a cascade of several power dividers. It suppresses the long line effect and widens the bandwidth of the feed waveguide. The junction has two inductive walls; one is for suppressing the reflection and the other is for controlling the ratio of divided power to the two output ports. Analysis using Galerkin's method of moments is verified by experiments of a 4 GHz-band model. We install the junctions in a 12 GHz-band single-layer slotted waveguide array. The gain reduction at the band-edge is suppressed.

  • New Networks for Linear Programming

    Yukihiko YAMASHITA  

     
    PAPER-Numerical Analysis and Optimization

      Vol:
    E81-A No:5
      Page(s):
    931-939

    We propose a set of new algorithms for linear programming. These algorithms are derived by accelerating the method of averaged convex projections for linear inequalities. We provide strict proofs for the convergence of our algorithms. The algorithms are so simple that they can be calculated by super-parallel processing. To this effect, we propose networks for implementing the algorithms. Furthermore, we provide illustrative examples to demonstrate the capability of our algorithms.

  • Computer Simulation of Feedback Induced Noise in Semiconductor Lasers Operating with Self-Sustained Pulsation

    Minoru YAMADA  

     
    PAPER-Quantum Electronics

      Vol:
    E81-C No:5
      Page(s):
    768-780

    Theoretical calculations of the pulsing operation and the intensity noise under the optical feedback are demonstrated for operation of the self-sustained pulsation lasers. Two alternative models for the optical feedback effect, namely the time delayed injection model and the external cavity model, are applied in a combined manner to analyze the phenomena. The calculation starts by supposing the geometrical structure of the laser and the material parameters, and are ended by evaluating the noise. Characteristics of the feedback induced noise for variations of the operating parameters, such as the injection current, the feedback distance and the feedback ratio, are examined. A comparison to experimental data is also given to ensure accuracy of the calculation.

  • Dynamic Cepstral Representations Based on Order-Dependent Windowing Methods

    Hong Kook KIM  Seung Ho CHOI  Hwang Soo LEE  

     
    PAPER-Speech Processing and Acoustics

      Vol:
    E81-D No:5
      Page(s):
    434-440

    In this paper, we propose dynamic cepstral representations to effectively capture the temporal information of cepstral coefficients. The number of speech frames for the regression analysis to extract a dynamic cepstral coefficient is inversely proportional to the cepstral order since the cepstral coefficients of higher orders are more fluctuating than those of lower orders. By exploiting the relationship between the window length for extracting a dynamic cepstral coefficient and the statistical variance of the cepstral coefficient, we propose three kinds of windowing methods in this work: an utterance-specific variance-ratio windowing method, a statistical variance-ratio windowing method, and an inverse-lifter windowing method. Intra-speaker, inter-speaker, and speaker-independent recognition tests on 100 phonetically balanced words are carried out to evaluate the performance of the proposed order-dependent windowing methods.

  • A Recursive Algorithm for Estimating the Internal Charge Sharing Effect in RC Tree Circuits

    Molin CHANG  Wu-Shiung FENG  

     
    PAPER-VLSI Design Technology and CAD

      Vol:
    E81-A No:5
      Page(s):
    913-923

    BTS (Binary-tree Timing Simulator) is a waveform-based switch-level timing simulator for VLSI circuits and the primary goal is to obtain an accurate waveform during the transient period. To achieve high accuracy, the internal charge effect should be considered because the delay behavior of a CMOS gate is dramatically influenced by internal charges stored in the internal nodes. However, the delay estimation will become a difficult problem when the charge sharing effect is considered. Therefore, this paper presents a recursive algorithm based on Modified Threaded Binary (MTB) tree for efficiently performing the internal-charge-delay estimation in transistor groups using the switch-level delay model. The algorithm CSEE (Charge Sharing Effect Estimation) can determine the charge distribution among the internal nodes, and then increases the accuracy of the waveform approximate technique used in BTS.

  • A 40-Gb/s 88 ATM Switch LSI Using 0. 25-µmCMOS/SIMOX

    Yusuke OHTOMO  Sadayuki YASUDA  Masafumi NOGAWA  Jun-ichi INOUE  Kimihiro YAMAKOSHI  Hirotoshi SAWADA  Masayuki INO  Shigeki HINO  Yasuhiro SATO  Yuichiro TAKEI  Takumi WATANABE  Ken TAKEYA  

     
    PAPER-Network

      Vol:
    E81-C No:5
      Page(s):
    737-745

    The switch LSI described here takes advantage of the special characteristics of fully-depleted CMOS/SIMOX devicesthat is, source/drain capacitances and threshold voltages that are lower than those of conventional bulk CMOS devicesto boost the I/O bit rate. The double-edge triggered MUX/DEMUX which uses a frame synchronization logic, and the active-pull-up I/O provide a 144-pin, 2. 5-Gbps/pin interface on the chip. The 220-kgate rerouting banyan switching network with 110-kbit RAM operates at an internal clock frequency of 312 MHz. The CMOS/SIMOX LSI consumes 8. 4 W when operating with a 2-V power supply, and has four times the throughput of conventional one-chip ATM switch LSIs.

  • Fault-Tolerant Hypercubes with Small Degree

    Toshinori YAMADA  Shuichi UENO  

     
    PAPER

      Vol:
    E81-A No:5
      Page(s):
    807-813

    For a given N-vertex graph H, a graph G obtained from H by adding t vertices and some edges is called a t-FT (t-fault-tolerant) graph for H if even after deleting any t vertices from G, the remaining graph contains H as a subgraph. For the n-dimensional cube Q(n) with N vertices, a t-FT graph with an optimal number O(tN+t2) of added edges and maximum degree of O(N+t), and a t-FT graph with O(tNlog N) added edges and maximum degree of O(tlog N) have been known. In this paper, we introduce some t-FT graphs for Q(n) with an optimal number O(tN+t2) of added edges and small maximum degree. In particular, we show a t-FT graph for Q(n) with 2ctN+ct2((logN)/C)C added edges and maximum degree of O(N/(logC/2N))+4ct.

  • A Neural-Greedy Combination Algorithm for Board-Level Routing in FPGA-Based Logic Emulation Systems

    Nobuo FUNABIKI  Junji KITAMICHI  

     
    PAPER

      Vol:
    E81-A No:5
      Page(s):
    866-872

    An approximation algorithm composed of a digital neural network (DNN) and a modified greedy algorithm (MGA) is presented for the board-level routing problem (BLRP) in a logic emulation system based on field-programmable gate arrays (FPGA's) in this paper. For a rapid prototyping of large scale digital systems, multiple FPGA's provide an efficient logic emulation system, where signals or nets between design partitions embedded on different FPGA's are connected through crossbars. The goal of BLRP, known to be NP-complete in general, is to find a net assignment to crossbars subject to the constraint that all the terminals of any net must be connected through a single crossbar while the number of I/O pins designated for each crossbar m is limited in an FPGA. In the proposed combination algorithm, DNN is applied for m = 1 and MGA is for m 2 in order to achieve the high solution quality. The DNN for the N-net-M-crossbar BLRP consists of N M digital neurons of binary outputs and range-limited non-negative integer inputs with integer parameters. The MGA is modified from the algorithm by Lin et al. The performance is verified through massive simulations, where our algorithm drastically improves the routing capability over the latest greedy algorithms.

3541-3560hit(4073hit)