We investigated the dependence of the desired echo return loss on frequency for various hands-free telecommunication conditions by subjective assessment. The desired echo return loss as a function of frequency (DERLf) is an important factor in the design and performance evaluation of a subband echo canceller, and it is a measure of what is considered an acceptable echo caused by electrical loss in the transmission line. The DERLf during single-talk was obtained as attenuated band-limited echo levels that subjects did not find objectionable when listening to the near-end speech and its band-limited echo under various hands-free telecommunication conditions. When we investigated the DERLf during double-talk, subjects also heard the speech in the far-end room from a loudspeaker. The echo was limited to a 250-Hz bandwidth assuming the use of a subband echo canceller. The test results showed that: (1) when the transmission delay was short (30 ms), the echo component around 2 to 3 kHz was the most objectionable to listeners; (2) as the transmission delay rose to 300 ms, the echo component around 1 kHz became the most objectionable; (3) when the room reverberation time was relatively long (about 500 ms), the echo component around 1 kHz was the most objectionable, even if the transmission delay was short; and (4) the DERLf during double-talk was about 5 to 10 dB lower than that during single-talk. Use of these DERLf values will enable the design of more efficient subband echo cancellers.

A semi-synchronous circuit is a circuit in which the clock is assumed to be distributed periodically to each individual register, though not necessarily to all registers simultaneously. In this paper, we propose an algorithm to achieve the target clock period by modifying a given target clock schedule as small as possible, where the realization cost of the target clock schedule is assumed to be minimum. The proposed algorithm iteratively improves a feasible clock schedule. The algorithm finds a set of registers that can reduce the cost by changing their clock timings with same amount, and changes the clock timing with optimal amount. Experiments show that the algorithm achieves the target clock period with fewer modifications.

In this paper, a new approach to adaptive direction-of-arrival (DOA) estimation based upon a database retrieval technique is proposed. In this method, angles and signal powers are quantized, and a set of true correlation vectors of the array antenna input vectors for various combinations of the quantized angles and signal powers is stored in a database. The k-d tree is then selected as the data structure to facilitate range searching. Estimated a correlation vector, range searching is performed to retrieve several correlation vectors close to it from the k-d tree. The DOA and the signal power are estimated by taking the weighted average of angles and powers associated with the retrieved correlation vectors. Unlike the other high-resolution methods, this method requires no eigenvalue computation, thus allowing a fast computation. It is shown through simulation results that the processing speed of the proposed method is much faster than that of the root-MUSIC that requires the eigenvalue decomposition.

DC-free error-correcting codes based on partition chain are presented in this paper. The partition chain can be constructed from code partition chain of Reed-Muller codes. The line coding parameters for the partition chain such as maximum runlength and running digital sum are obtained. The trellis and multilevel code structure can be used to design the DC-free error-correcting codes. Especially, by adopting DC-free trellis codes as constituent codes, DC-free turbo codes can be designed. As results, the presented DC-free error-correcting codes have good coding characteristics.

A novel SC (Switched-Capacitor) offset- and gain-compensated sample/hold circuit is presented. It is implemented by a new topology which reduces the effects due to the imperfections of op-amp. Simulation results indicate that the circuit achieves high accuracy without requiring high-quality components.

A method for determination of the location, shape, and material properties of a 3D object from measurements of the scattered field, when the object is successively illuminated by a number of incident fields is presented. This work extends the method previously developed for reconstructions of 2D permittivity and conductivity from electromagnetic measurements to the more complicated full-vector 3D electromagnetic inversion. Furthermore, a frequency hopping strategy to improve the resolution of the unknown objects when the frequency is raised, is underlined. Results of numerical experiments are presented to illustrate both strengths and weaknesses of the method.

A novel residue arithmetic algorithm using radix-2 signed-digit (SD) number representation is presented. By this representation, memoryless residue arithmetic circuits using SD adders can be implemented. Conventional residue arithmetic circuits have been designed using binary number arithmetic system, but the carry propagation arises which limits the speed of arithmetic operations in residue modules. In this paper, a p-digit radix-2 SD number system is introduced to simplify the residue operation. For a modulus m, 2p-1 m 2p+2p-1-1, in a residue number system (RNS), the modulo m addition is performed by using two p-digit SD adders, one for the addition and one for the residue operation. Thus, the modulo m addition time is independent of the word length of operands. When m=2p or m= 2p 1, the modulo m addition is implemented by using only one SD adder. Moreover, a modulo m multiplier is constructed using a binary modulo m SD adder tree, and the modulo m multiplication can be performed in a time proportional to log 2 p. The VHDL implementation method for the presented algorithm is also discussed. The design and simulation results of some residue arithmetic circuits show that high speed residue arithmetic circuits can be obtained by the presented algorithms.

This paper describes a new algorithm for configuring the array of adders used to add the partial products in a multiplier circuit. The new algorithm reduces not only the number of half adders in an adder tree, but also the number of operands passed to the block generating the final product in a multiplier. The arrays obtained with this algorithm are smaller than Wallace's ones and have fewer outputs than Dadda's arrays. We show some evaluation figures and preliminary simulation results of 4, 8 and 16-bit tree configurations.

In a typical indoor environment such as in a building, delay spread tends to be small, which causes frequency non-selective fading. Therefore resolvable paths at the RAKE receiver can not be obtained, and effective path diversity can not be achieved. This paper proposes an artificial path diversity system in which one or multiple sectors at the base station are pre-selected according to the channel conditions for transmitting data. Each sector's signal is delayed by several chips to create artificial paths which can then be combined by using a RAKE receiver at the mobile station creating a diversity effect for an indoor environment. Moreover, only pre-selected sector antennas transmit signals to reduce inefficient signal usage in the sectors whose paths are blocked by using all sectors, therefore the transmission power is used efficiently at the base station. As a result of sector selection, the better BER performance and the reduction of interference signals between different channels can be achieved by means of sector selection. The performance of the proposed system is analyzed and demonstrated by computer simulation in a Rayleigh and log-normal fading indoor environment.

In CDMA mobile system, network connection is constructed with orthogonal spreading codes assigned to each user in order to distinguish one from the other. The number of distinguishable codes and the process speed are different according to the orthogonal spreading factors which, in another literature, can be described as the tree structure. In this paper, we investigate methods to improve the quality of services (QoS) of communication, by changing the spreading factors of orthogonal spreading codes according to the number of users. We propose the effective method to reconstruct the tree structure of orthogonal spreading codes for supporting various data rates transmission in DS-CDMA mobile system. We compare spreading factors with and without the reconstruction and evaluate the effectiveness of the reconstruction method.

We introduce a high-level synthesis framework to automatically synthesize asynchronous circuits, especially speed-independent circuits, from a concurrent programming language called ALPEH. ALPEH is a high-level concurrent algorithmic specification that can model complex concurrent control flows, logical and arithmetic computations, and communications in easy way. This specification language has been developed to be translated into a Petri net. The major contribution of this paper is the generation of globally optimized control circuits during preserving neat formalism in the specification.

Most distributed systems are based on either the C/S (Client/Server) model or the P-to-P (Peer to Peer) model. In C/S based distributed systems, a client invokes a server and waits for the server reply. Because of this sequential nature, C/S based distributed systems can be implemented by the RPC (Remote Procedure Call) scheme. Most tools for developing distributed objects are based on the RPC scheme. Whereas, in P-to-P based distributed systems, each distributed objects work concurrently, by exchanging asynchronous messages, without waiting for the receiver's action. To implement these P-to-P distributed systems, the RPC scheme is not powerful enough, and the active object model using asynchronous messages is suitable. This paper explains the pure Java library CAPE for developing P-to-P based distributed active object systems.

This article addresses two issues. Firstly, the convergence property of conjugate gradient (CG) algorithm is investigated by a Chebyshev polynomial approximation. The analysis result shows that its convergence behaviour is affected by an acceleration term over the steepest descent (SD) algorithm. Secondly, a new CG algorithm is proposed in order to boost the tracking capability for time-varying parameters. The proposed algorithm based on re-initialising forgetting factor shows a fast tracking ability and a noise-immunity property when it encounters an unexpected parameter change. A fast tracking capability is verified through a computer simulation in a system identification problem.

In this paper, we present a low-power and area-efficient design method of embedded high-speed A/D converters for mixed analog-digital system LSI's. As the A/D converter topology, a 1.5 bit/stage interleaved pipeline A/D converter is employed, because the basic topology covers a wide range of specifications on the conversion frequency and the resolution. The design method determines the minimum DC supply current, the minimum device sizes and the minimum number of channels to meet the precision given by the specification. This paper also points out that the interleaved pipeline structure is very effective for low-power design of high-speed A/D converters whose sampling frequency is over 100 MHz.

We propose a new CALL (Computer-Assisted Language Learning) system for non-native learners of Japanese using speech recognition methods. The aim of the system is to help them develop natural pronunciation by automatically detecting their pronunciation errors and then providing effective feedback instruction. An automatic scoring method based on HMM log-likelihood is used to assess their pronunciation. Native speakers' scores are normalized by the mean and standard deviation for each phoneme and are used as threshold values to detect pronunciation errors. Unlike previous CALL systems, we not only detect pronunciation errors but also generate appropriate feedback to improve them. Especially for the feedback of consonants, we propose a novel method based on the classification of the place and manner of articulation. The effectiveness of our system is demonstrated with preliminary trials by several non-native speakers.

The aim of this study is to examine the effectiveness of various open-ended resonators. According to the required filter responses, the application to microwave filters based on presented open-ended resonators is systematically examined as well. First, the resonance property of the basic open-ended resonator is discussed based on even-and odd-mode analysis. The intrinsic property of a tapped open-ended resonator is also discussed here. Second, the basic properties of a stepped impedance resonator (SIR) and a loaded-element resonator are examined theoretically for improvement of spurious responses and the dual-passband response. The basic operations of these resonators are also explained based on even- and odd-mode analysis. Examples for filter applications based on presented resonators are also provided. We found that the intrinsic properties of the open-ended resonators are very useful for practical filter responses.

To enhance fault tolerance ability of the feedforward neural networks (NNs for short) implemented in hardware, we discuss the learning algorithm that converges without adding extra neurons and a large amount of extra learning time and cycles. Our algorithm modified from the standard backpropagation algorithm (SBPA for short) limits synaptic weights of neurons in range during learning phase. The upper and lower bounds of the weights are calculated according to the average and standard deviation of them. Then our algorithm reupdates any weight beyond the calculated range to the upper or lower bound. Since the above enables us to decrease the standard deviation of the weights, it is useful in enhancing fault tolerance. We apply NNs trained with other algorithms and our one to a character recognition problem. It is shown that our one is superior to other ones in reliability, extra learning time and/or extra learning cycles. Besides we clarify that our algorithm never degrades the generalization ability of NNs although it coerces the weights within the calculated range.

This paper investigates noise enhancement factors of a zero-forcing detector and a decision feedback detector for synchronous Multiple Input Multiple Output (MIMO) channels. It is first shown that the zero-forcing and decision feedback detectors can be implemented in a vector digital filter form, and the noise enhancement factors with the detectors can easily be calculated by using the vector digital filter form. This paper then applies the zero-forcing and decision feedback detectors to the signal detection of a frequency-overlapped multicarrier signaling (FOMS) system. The normalized noise enhancement factor, which is given as a product of the noise enhancement and bandwidth reduction factors, is shown to be smaller with the decision feedback detector than the zero-forcing detector. Results of computer simulations conducted to evaluate bit error rate (BER) performances with the two detectors are also shown together with the BER performance with a conventional channel-by-channel detector.

We analyze the performance of soft handoff used as intergroup handoff in the fiber-optic cellular system. Performance is evaluated in view of blocking and handoff refused probability. The numerical results show that the smaller the handoff region or the more the channel, the larger the system capacity.

GSRI Pragmatic TCM, which is a Pragmatic Trellis Coded Modulation allowing bandwidth expansion, has been proposed. In [1], it is shown that this scheme can achieve higher performance than conventional Pragmatic TCM scheme. On the other hand, a real-time video multimedia communication is one of the possible applications for the third generation mobile communication systems. This video multimedia communication system needs a multiplexer which mixes various types of media such as video, voice and data into a single bitstream. ITU-T has standardized H.223 Annex A, B, C and D multimedia multiplexing protocols for low bit-rate mobile communications. This paper evaluates the performance of the GSRI Pragmatic TCM with an application of a mobile multimedia system using H.223 Annex D multiplexing scheme and MPEG-4 video coding.