Cha-Keon CHEONG Kiyoharu AIZAWA
This paper addresses a novel scheme for variable rate error correction coding with interleavered puncturing serially concatenated convolutional code. In order to obtain a variable coding rate, the bits of the outer coder are perforated with a given puncturing pattern, and randomly interleaved. The effect of interleavered puncturing on the overall coding performance is analyzed, and the upper bound to the bit error probability of the proposed coder is derived. Moreover, to evaluate the effectiveness of the proposed scheme some simulation results are presented with the iterative decoding procedure, in which the channel models of Rayleigh fading and additive white Gaussian noises are assumed.
LinLin HUANG Akinobu SHIMIZU Yoshihiro HAGIHARA Hidefumi KOBATAKE
Face detection from cluttered images is very challenging due to the wide variety of faces and the complexity of image backgrounds. In this paper, we propose a neural network based approach for locating frontal views of human faces in cluttered images. We use a radial basis function network (RBFN) for separation of face and non-face patterns, and the complexity of RBFN is reduced by principal component analysis (PCA). The influence of the number of hidden units and the configuration of basis functions on the detection performance was investigated. To further improve the performance, we integrate the distance from feature subspace into the RBFN. The proposed method has achieved high detection rate and low false positive rate on testing a large number of images.
Sung Cheol CHANG Dan Keun SUNG
A dynamic pre-allocated connection (DPC) scheme is proposed to support fast handoff and to effectively utilize wireline links in a multi-connection call environment. Handoff can be quickly executed in real-time with reduced connection overhead, since the proposed scheme uses pre-allocated switched virtual connections (PSVCs). This dynamic resource management scheme increases link utilization due to statistical multiplexing effects. A path-loop elimination algorithm can be applied to remove duplicate resource usages. The DPC scheme in an environment of multi-connection calls is analyzed to obtain three probabilities; 1) new multi-connection call blocking probability, 2) multi-connection handoff call blocking probability, and 3) fast handoff failure probability.
The effects of noisy estimates of fading on turbo-coded modulation are studied in the presence of flat Rayleigh fading, and the channel capacity of the system is calculated to determine the limit above which no reliable transmission is guaranteed. This limit is then compared to the signal-to-noise ratio required for a turbo-coded modulation scheme to achieve a bit-error-rate of 10-5. Numerical results are obtained, especially for QAM signals. Our results show that even slightly noisy estimates significantly degrade the theoretical limits related to channel capacities, and that an effective use of capacity-approaching codes can lower the sensitivity to noisy estimates, though noise that exceeds a certain threshold cannot be offset by the performance improvement associated with error-correcting capability.
Michinobu NAKAO Yoshikazu KIYOSHIGE Yasuo SATO Kazumi HATAYAMA Satoshi FUKUMOTO Kazuhiko IWASAKI
This paper presents a practical fault model for delay testing, called a multiple-threshold gate-delay fault model, to obtain high quality tests that guarantee the detection of delay faults for various extra-delays. Fault efficiencies for multiple thresholds of the extra-delay are introduced as a coverage metric that describes the quality of tests. Our approach guarantees that each gate-delay fault is tested on the path that is almost the longest one passing through the faulty line by using two-pattern tests with pattern-independent timing. We present the procedures of the path selection, fault simulation, and the test generation, where the path-status graph technique is used as not to rely on the enumeration of paths. Experimental results for benchmark circuits demonstrate that the proposed metric gives useful information that transition fault efficiency cannot, and that the proposed test generation can achieve high fault efficiencies for multiple-threshold gate-delay faults.
Kwang-yeol YOON Mitsuo TATEIBA Kazunori UCHIDA
The electromagnetic wave scattering from ocean-like lossy dielectric random rough surfaces is numerically analyzed by using FVTD method. We have investigated the problem of low-grazing-angle (LGA) scattering in order to gain a better understanding of experimental data for the microwave backscattering from ocean-like surfaces. It is indicated that the FVTD results are in good agreement with the experimental data.
Hidetoshi YOKOTA Akira IDOUE Toru HASEGAWA Toshihiko KATO
In the Mobile IP handoff procedure, mobile node movement is detected from advertisements of foreign agents that differ from previously received advertisement and the new "care-of" address is registered with the home agent. However, user packets are not forwarded to the new foreign agent until a registration is completed and this interruption may degrade the quality of service especially in real-time applications such as audio and video, or may lower the TCP throughput due to retransmission timeout. To tackle these issues, we propose a new low latency handoff method, where access points used in a wireless LAN environment and a dedicated MAC bridge are jointly used to alleviate packet loss without altering the Mobile IP specifications. In this paper, we present design architecture of the proposed method and evaluate its performance in an actual network environment to verify the effectiveness of our approach.
Kenichi ICHINO Takeshi ASAKAWA Satoshi FUKUMOTO Kazuhiko IWASAKI Seiji KAJIHARA
An n-detection testing for stuck-at faults can be used not only for delay fault testing but also for detection of unmodeled faults. We have developed a hybrid BIST circuit; that is, a method consisting of a shift register with partial rotation and a procedure that selects test vectors from ATPG ones. This testing method can perform at-speed testing with high stuck-at fault coverage. During the at-speed testing, a subset of the ATPG vectors is input by using a low-speed tester. Computer simulations on ISCAS'85, ISCAS'89, and ITC'99 circuits are conducted for n = 1, 2, 3, 5, 10, and 15. The simulation results show that the amount of test vectors can be reduced to ranging from 52.3% to 0.9% in comparison with that of the ATPG vectors. As a result, the proposed method can reduce the cost of at-speed testing.
Sheng-Bin HU Zhi-Min YUAN Wei ZHANG Bo LIU Lei WAN Rui XIAN
The interaction between slider, lubricant and disk surface is becoming the most crucial robustness concern of advanced data storage systems. This paper reports comparative studies among various techniques for the measurement of head-disk spacing. It is noticed that the triple harmonic method gives a reading much closer to the reading of the head-disk spacing obtained optically at on-track center case, comparing with the PW50 method. Specially prepared disks with different carbon overcoat thickness (6.5 nm, 11 nm, 16 nm and 22 nm) were also used to study the reliability and repeatability of the triple harmonic method.
Kazuhiro NOMURA Koji NAKAMAE Hiromu FUJIOKA
The EB tester line delay fault localization algorithm for combinational circuits is proposed where line delay fault probabilities are utilized to narrow fault candidates down to one efficiently. Probabilities for two main causes of line delay faults, defects of contact/vias along interconnections and crosstalk, are estimated through layout analysis. The algorithm was applied to 8 kinds of ISCAS'85 benchmark circuits to evaluate its performance where the guided probe (GP) diagnosis was used as the reference method. The proposed method can cut the number of probed lines to about 30% in average compared with those for the GP method. The total fault localization time was 31% of the time for the GP method and was 6% less than that of our previous method where the fault list generated in concurrent fault simulation is utilized.
Il-Young MOON Jae-Sung ROH Sung-Joon CHO
In this paper, we have analyzed transmission time for WAP (Wireless Application Protocol) over Bluetooth using a multi-slot segmentation scheme. In order for SAR to improve the transfer capability, the transmission of messages have been simulated using a fragmentation scheme that begins with the total package and incremental fragmentation for each layer using the WTP (Wireless Transaction Protocol) to define the resultant packet size and the level of fragmentation for each proceeding layer. The data is divided into individual packets at the baseband level. This scheme decreases transmission time of L2CAP (Logical Link Control And Adaptation Protocol) baseband packets by sending packets that span multiple slots. From the results, we were able to obtain packet transmission time and optimal WTP packet size for WAP over Bluetooth in a Rician fading channel.
We propose bit error rate (BER) evaluation methods for a trellis coded modulation (TCM) scheme over a Rayleigh fading channel by using importance sampling (IS). The simulation probability density function for AWGN and Rayleigh fading is separately designed. For efficient simulation of a system model with finite interleaver, frequency of the generation of fading sequences is reduced. The proposed method gives a good BER estimates over a Rayleigh fading channel.
Tadahiro FUJIMOTO Yoshio OHNO Kazunobu MURAOKA Norishige CHIBA
Interpolation surfaces, such as Bezier or B-spline surface, are usually used for representing smooth man-made objects and provide an excellent ability to control the shape of a surface by intuitively moving control points. In contrast, the fractal technique is used for creating various complex shapes, mainly of natural objects, that have self-similarity using simple procedures. We have proposed the "wrinkly surface (WR surface)" for combining the advantages of interpolation surfaces and fractals. In this paper, we propose the expansion of the construction scheme of the WR surface to irregular meshes. Control points of a WR surface are interpolated using the "Iterated Shuffle Transformation (IST)." Therefore, in order to achieve the expansion, we first generalize the IST on code spaces, and then propose multi-dimensional IST defined on geometric spaces. By creating various shape model examples, we demonstrate the usefulness of the WR surface as a modeling tool.
Load/unload techniques are widely used in mobile hard disk drives which have to endure external shocks frequently. ABS designs must consider both the load/unload performance and the shock resistance performance. Three ABS designs with different positions of the suction force center are studied in simulation. It is observed that when the position of the suction force center moves frontward, the anti-shock performance improves, but the unload performance degrades, and vice versa. A slider is not necessary to be designed to have its suction force center significantly behind of its geometric center, as the traditional load/unload sliders do. Instead, the suction force center can be designed near the geometric center if the hook limiter is used.
This paper deals with a mathematical formulation of the scattering from a periodic surface with finite extent. In a previous paper the scattered wave was shown to be represented by an extended Floquet form by use of the periodic nature of the surface. This paper gives a new interpretation of the extended Floquet form, which is understood as a sum of diffraction beams with diffraction orders. Then, the power flow of each diffraction beam and the relative power of diffraction are introduced. Next, on the basis of a physical assumption such that the wave scattering takes place only from the corrugated part of the surface, the amplitude functions are represented by the sampling theorem with unknown sample sequence. From the Dirichlet boundary condition, an equation for the sample sequence is derived and solved numerically to calculate the scattering cross section and optical theorem. Discussions are given on a hypothesis such that the relative power of diffracted beam becomes almost independent of the width of surface corrugation.
It has been established that the criteria for space-time convolutional code (STCC) are based on the maximization of the minimum rank and the minimum determinant of distance matrix over quasistatic flat Rayleigh fading channel. This letter presents a new criterion, i.e., modified trace criterion which maximizes both the minimum trace and the average trace of distance matrix for a new STCC. A new STCC is systematically searched so as to maximize the minimum trace and the average trace, and shown to be superior to other known codes in quasistatic flat Rayleigh fading channel.
Hiroshi TAKAHASHI Marong PHADOONGSIDHI Yoshinobu HIGAMI Kewal K. SALUJA Yuzo TAKAMATSU
In this paper we propose two diagnosis methods for crosstalk-induced pulse faults in sequential circuits using crosstalk fault simulation. These methods compare observed responses and simulated values at primary outputs to identify a set of suspected faults that are consistent with the observed responses. The first method is a restart-based method which determines the suspected fault list by using the knowledge about the first and last failures of the test sequence. The advantage of the restart-based method over a method using full simulation is its reduction of the number of simulated faults in a process of diagnosing faults. The second method is a resumption-based method which uses stored state information. The advantage of the resumption-based method over the restart-based method is its reduction of the CPU time for diagnosing the faults. The effectiveness of the proposed methods is evaluated by experiments conducted on ISCAS '89 benchmark circuits. From the experimental results we show that the number of suspected faults obtained by our methods is sufficiently small, and the resumption-based method is substantially faster than the restart-based method.
Hiroyuki YOTSUYANAGI Masaki HASHIZUME Takeomi TAMESADA
A procedure to remove redundancies in sequential circuits is proposed using strongly unreachable states, which are the states with no incoming transitions. Test generation is used to find undetectable faults related to two or more strongly unreachable states. Experimental results show the new procedure can find more redundancies of sequential circuits.
Kazuya SHIMIZU Takanori SHIRAI Masaya TAKAMURA Noriyoshi ITAZAKI Kozo KINOSHITA
In recent years, the domino logic has received much attention as a design technique of high-speed circuits. However, in the case of standard domino logic, only non-inverting functions are allowed. Then, the clock-delayed (CD) domino logic that provides any logic function is proposed in order to overcome such domino's drawback. In addition, domino circuits are more sensitive to circuit noise compared with static CMOS circuits. In particular, crosstalk causes critical problems. Therefore, we focus our attention on crosstalk faults in CD domino circuits. However, in CD domino circuits, there are faults that don't propagate faulty values to any primary output even though crosstalk pulses are generated. Then, we remove such faults from the target fault list by considering structures of CD domino circuits, and perform a fault simulation for the reduced target fault list using two kinds of fault simulation method together. We realize CD domino circuits in VHDL and perform the proposed fault simulation for the combinational part of some benchmark circuits of ISCAS'89 on a VHDL simulator. Fault coverage for random vectors was obtained for s27 to s1494 under the limitation of simulation time.
Masaki HASHIZUME Teppei TAKEDA Masahiro ICHIMIYA Hiroyuki YOTSUYANAGI Yukiya MIURA Kozo KINOSHITA
In this paper, a useful technique is proposed for realizing high speed IDDQ tests. By using the technique, load capacitors of the CMOS logic gates can be charged quickly, whose output logic values change from L to H by applying a test input vector to a circuit under test. The technique is applied to built-in IDDQ sensor design and external IDDQ sensor design. It is shown experimentally that high speed IDDQ tests can be realized by using the technique.