We have fabricated bi-epitaxial grain boundary junctions in YBa2Cu3O7δ (YBCO) thin films by using SrTiO3 (STO) seed layers on MgO(100) substrate. YBCO film growing over the STO seed layer has a different in-plane orientation from YBCO film without the seed layer, so artificial grain boundaries were created at the edge of the seed layer. The fabricated junctions have high Tc (up to 80 K), and constant-voltage current steps are observed in response to 12.1 GHz microwave radiation. Moreover, some of the junctions show characteristic current-voltage curves comprising not only an usual Josephson-like characteristic but also a low critical current due to the flux creep. This suggests that the two characteristic parts are likely to be connected in series at the junction region.

A new circuit design of Josephson ternary δ-gate composed of Josephson junction devices is presented. Mathematical theory for synthesizing, analyzing, and realizing any given function in ternary system using Josephson ternary δ-gate is introduced. The Josephson ternary δ-gate is realized using SQUID technique. Circuit simulation results using J-SPICE demonstrated the feasibility and the reliability operations of Josephson ternary δ-gate with very high performances for both speed and power consumption (max. propagation delay time44 ps and max. power consumption2.6µW). The Josephson ternary δ-gate forms a complete set (completeness) with the ternary constants (1, 0, 1). The number of SQUIDs that are needed to perform the operation of δ-gate is 6. Different design with less than 6 SQUIDs is not possible because it can not perform the operation of δ-gate. The advantages of Josephson ternary δ-gate compared with different Josephson logic circuits are as follows: The δ-gate has the property that a simple realization to any given ternary logic function as the building blocks can be achieved. The δ-gate has simple construction with small number of SQUIDs. The δ-gate can realize a large number of ternary functions with small number of input/output pins. The performances of δ-gate is very high, very low power consumption and ultra high speed switching operation.

A network-topology-independent static task allocation strategy has been designed and implemented for massively parallel computers. For mapping a task graph to a processor graph, this strategy evaluates several functions that represent some intuitively feasible properties or the graphs. They include the connectivity with the allocated nodes, distance from the median of a graph, connectivity with candidate nodes, and the number of candidate nodes within a distance. Several greedy strategies are defined to guide the mapping process, utilizing the indicated function values. An allocation system has been designed and implemented based on the allocation strategy. In experiments we have defined about 1000 nodes in task graphs with regular and irregular topologies, and the same order of processors with mesh, tree, and hypercube topologies. The results are summarized as follows. 1) The system can yield 4.0 times better total communication costs than an arbitrary allocation. 2) It is difficult to select a single strategy capable of providing the best solutions for a wide range of task-processor combinations. 3) Comparison with hypercube-topology-dependent research indicates that our topology-independent allocator produces better results than the dependent ones. 4) The order of computaion time of the allocator is experimentally proved to be O (n2) where n represents the number of tasks.

The threshold characteristics of mutually coupled SQUIDs (Superconducting Quantum Interference Devices) have been analytically and numerically investigated. The mutually coupled SQUIDs investigated is composed of an rf-SQUID and a dc-SQUID. Here, the rf-SQUID is a flux quantum generator and the dc-SQUID is a flux detector. The linearization method substituting sin-1x by (π/2)x (1x1) is found valid when it is applied to the mutually coupled SQUIDs, because it is possible to obtain the superconducting regions analytically. By computer implementation of linearization method, we found this method is very effective and very quick compared to the ordinary methods. We report the internal flux on an rf-SQUID, the threshold of a dc-SQUID, and that of mutually coupled SQUIDs obtained by Lagrange multiplier formulation and linearization. The features of the threshold characteristics of the mutually coupled SQUIDs with various parameters are also reported. The discontinuous behavior of threshold of the mutually coupled SQUIDs are attractive for digital applications. We suggest three applications of the mutually coupled SQUIDs, that is, a logic gate for high-Tc superconductors (HTSs), a neuron device, and an A/D converter.

An estimation method of region is presented, in which a solution path of the so-called Newton type homotopy equation in guaranteed to exist, it is applied to a certain class of uniquely solvable nonlinear equations. The region can be estimated a posteriori, and its upper bound also can be estimated a priori.

This paper proposes a compact high-speed ATM switching architecture that employs a novel arbitration method. The NN matrix shaped crosspoint switch is realized with D small switch blocks (SSBs). The number of crosspoints and address comparators is reduced from N2 to (N/D)2. Each block contains N/D input lines and N/D output lines. The association between output lines and output ports is logically changed each cell period. This arrangement permits each input port to be connected to N/D output ports in each cell period. Output-line contention control is realized block-by-block so high-speed operation is realized. The traffic characteristics of the proposed switch architecture are analyzed using computer simulations. According to the simulation results, the cell loss rate of 10-8 is achieved with only 100-cell input and output-buffers under the heavy random load of 0.9 for any size switch. The proposed ATM switching architecture can construct the Gbit/s high-speed ATM switch fabric needed for B-ISDN.

This paper describes the learning performance of the deterministic Boltzmann machine (DBM), which is a promising neural network model suitable for analog LSI implementation. (i) A new learning procedure suitable for LSI implementation is proposed. This is fully-on-line learning in which different sample patterns are presented in consecutive clamped and free phases and the weights are modified in each phase. This procedure is implemented without extra memories for learning operation, and reduces the chip area and power consumption for learning by 50 percent. (ii) Learning in a layer-type DBM with one output unit has characteristic local minima which reduce the effective number of available hidden units. Effective methods to avoid reaching these local minima are proposed. (iii) Although DBM learning is not suitable for mapping problems with analog target values, it is useful for analog data discrimination problems.

A novel external clocking magnetic disk recording channel is proposed and examined. Timing not only for data recovery but for recording is given by a bit clock which is synchronized with dedicated clock marks on patterned discrete track media. Jitter of the bit clock is 2.5 ns (rms), which is good enough for data rates up to about 20 Mbit/s. Using an MR/Inductive head and PRML (Partial Response Maximum Likelihood) signal processing, an error rate of 110-6 is obtained at linear density 3146 bit/mm.

To improve measurement accuracy and speed, a switched-capacitor capacitance measurement circuit with the vernier scale is developed. Its process consists of a coarse measurement by charge-balancing A-D conversion and a fine measurement by single-slope A-D conversion. a prototype using discrete components confirms the principles of operation.

The authors developed new measuring system (Holographic Pattern Measuring System [HPMS]), which is composed of both techniques of holography and graphic image processing, was used to measure the vibrations of a printed circuit board (PCB) due to operation of a mounted electromagnetic relay on it. The clear vibration patterns were obtained. By using pattern analysis processor, quantitative vibration patterns of the PCB surface were observed. Both the vibration patterns and displacements were changed by edge fixing way of the PCB.

We propose a continuous speech recognition algorithm utilizing island-driven A* search. Conventional left-to-right A* search is probable to lose the optimal solution from a finite stack if some obscurities appear at the start of an input speech. Proposed island-driven A* search proceeds searching forward and backward from the clearest part of an input speech, and thus can avoid to lose the optimal solution from a finite stack.

A method to analyze two-pattern test capabilities of autonomous test pattern generator (TPG) circuits for use in built-in self-testing are described. The TPG circuits considered here include arbitrary autonomous linear sequential circuits in which outputs are directly fed out from delay elements. Based on the transition matrix of a circuit, it is shown that the number of distinct transitions in a subspace of state variables can be obtained from rank of the submatrix. The two-pattern test capabilities of LFSRs, cellular automata, and their fast parallel implementation are investigated using the transition coverage as a metric. The relationships with dual circuits and reciprocal circuits are also mentioned.

In this letter, we study on the sensitivity to the electrical stimulus pulse for biomedical electronics for the purpose to make a tactile vision substitution system for binds. We derive the equivalent circuit of finger by measuring sensitive voltages with various touch condition and various DC voltage. And we consider to the sensitivity of finger against electrical stimulus pulse. In order to convert the sense of sight to tactile sense, we consider four types of touch condition and various types of pulse. It is shown that the sensitivity of finger to electrical stimulus pulse is determined by duty-ratio, frequency, hight of pulse and the type of touch condition. In the case that duty-ratio is about 20%, frequency is within about 60-300Hz and touch condition is A-4 type, the sensitive voltage becomes the lowest. With this result, a tactile vision substitution system can be developed and the system will be used to transfer various infomations to blinds without paper.

This paper describes a new method for the concurrent detection of faults in instruction level parallel (ILP) processors. This method uses the No OPeration (NOP) instruction slots that under branches, resource conflicts and some kind of data dependencies fill some of the pipelines (stages) in an ILP processor. NOPs are replaced by the copy of an effective instruction running in another pipeline. This allows the checking of the pipelines running the original instruction and its copy (ies), by the comparison of the outputs of their stages during the execution of the replicated instruction. We show some figures obtained for the application of this method to a two-pipeline superscalar processor.

This paper surveyed the research topics and results on nonlinear circuits and systems which have been achieved in Japan or by Japanese researchers (sometimes as co-authors) during the last 20 years. The particular emphasis is placed on the analysis of nonlinear resistive circuits and periodic dynamic circuits.

We analyze the mutual coupling between two microstrip antennas (MSAs) with the finite-difference time-domain (FDTD) method. It is suitable for substrates which have a complex configuration or include feed line structures. The mutual coupling between two MSAs on discontinuous orthogonal substrates is successfully calculated.

In this letter, the effectiveness of the quasi-TEM approximation is studied for the microstrip line including optically induced semiconductor plasma region. This approximation is considered to be efficient under several restrictions such as the upper limit of the microwave frequency and the plasma density.

In this paper, we present an efficient method for the fault simulation of the reconvergent fan-out stem. Our method minimizes the fault propagating region by analyzing the topology of the circuit, whose region is smaller than that of Tulip's. The efficiency of our method is illustrated by experimental results for a set of benchmark circuits.

This letter reports a high-sensitivity GaAs decision IC for ultra-high-speed optical transmission systems. The IC was designed using LSCFL (Low-power Source Coupled FET Logic) and fabricated with 0.2-µm-gate-length MESFETs with a cut-off frequency of 50GHz. The input voltage sensitivity was 35mV at 10Gbit/s. This is the highest sensitivity ever reported for a MESFET decision IC.

Reflection mode diffraction tomography is expected to reconstruct a higher resolution image than transmission mode. Its image reconstruction problem, however, in the many cases of practical uses becomes ill-posed one. In this paper, a new reconstruction method of limited angle reflection mode diffraction tomography using maximum entropy method is proposed. Results of simulation showed that the method was able to reconstruct the better quality images than IR method poposed by Kak, et al.