In this paper, we consider a nonparametric regression problem using a learning machine defined by a weighted sum of fixed basis functions, where the number of basis functions, or equivalently, the number of weights, is equal to the number of training data. For the learning machine, we propose a training scheme that is based on orthogonalization and thresholding. On the basis of the scheme, vectors of basis function outputs are orthogonalized and coefficients of the orthogonalized vectors are estimated instead of weights. The coefficient is set to zero if it is less than a predetermined threshold level assigned component-wise to each coefficient. We then obtain the resulting weight vector by transforming the thresholded coefficients. In this training scheme, we propose asymptotically reasonable threshold levels to distinguish contributed components from unnecessary ones. To see how this works in a simple case, we derive an upper bound for the generalization error of the training scheme with the given threshold levels. It tells us that an increase in the generalization error is of O(log n/n) when there is a sparse representation of a target function in an orthogonal domain. In implementing the training scheme, eigen-decomposition or the Gram–Schmidt procedure is employed for orthogonalization, and the corresponding training methods are referred to as OHTED and OHTGS. Furthermore, modified versions of OHTED and OHTGS, called OHTED2 and OHTGS2 respectively, are proposed for reduced estimation bias. On real benchmark datasets, OHTED2 and OHTGS2 are found to exhibit relatively good generalization performance. In addition, OHTGS2 is found to be obtain a sparse representation of a target function in terms of the basis functions.

In this paper, side information refinement methods for Wyner-Ziv video codec are presented. In the proposed method, each block of a Wyner-Ziv frame is separated into a predefined number of groups, and these groups are interleaved to be coded. The side information for the first group is generated by the motion compensated temporal interpolation using adjacent key frames only. Then, the side information for remaining groups is gradually refined using the knowledge of the already decoded signal of the current Wyner-Ziv frame. Based on this basic concept, two progressive side information refinement methods are proposed. One is the band-wise side information refinement (BW-SIR) method which is based on transform domain interleaving, while the other is the field-wise side information refinement (FW-SIR) method which is based on pixel domain interleaving. Simulation results show that the proposed methods improve the quality of the side information and rate-distortion performance compared to the conventional side information refinement methods.

This paper presents a new low-dropout (LDO) regulator with low-quiescent, high-drive and fast-transient performance. This is based on a new composite power transistor composed of a shunt feedback class-AB embedded gain stage and the application of dynamic-biasing schemes to both the error amplifier as well as the composite power transistor. The proposed LDO regulator has been simulated and validated using BSIM3 models and GLOBALFOUNDRIES 0.18-µm CMOS process. The simulation results have shown that the LDO regulator consumes 4.7 µA quiescent current at no load, regulating the output at 1 V from a minimum 1.2 V supply. It is able to deliver up to 450 mA load current with a dropout of 200 mV. It can be stabilized using a 4.7 µF output capacitor with a 0.1 Ω ESR resistor. The maximum transient output voltage is 64.6 mV on the basis of a load step change of 450 mA/10 ns under typical condition. The full load transient response is less than 350 ns.

Locally linear embedding (LLE) is a well-known method for nonlinear dimensionality reduction. The mathematical proof and experimental results presented in this paper show that the neighborhood sizes in LLE must be smaller than the dimensions of input data spaces, otherwise LLE would degenerate from a nonlinear method for dimensionality reduction into a linear method for dimensionality reduction. Furthermore, when the neighborhood sizes are larger than the dimensions of input data spaces, the solutions to LLE are not unique. In these cases, the addition of some regularization method is often proposed. The experimental results presented in this paper show that the regularization method is not robust. Too large or too small regularization parameters cannot unwrap S-curve. Although a moderate regularization parameters can unwrap S-curve, the relative distance in the input data will be distorted in unwrapping. Therefore, in order to make LLE play fully its advantage in nonlinear dimensionality reduction and avoid multiple solutions happening, the best way is to make sure that the neighborhood sizes are smaller than the dimensions of input data spaces.

Long Term Evolution (LTE) system, which is specified in the 3rd Generation Partnership Project (3GPP) Release 8 and employs downlink multiple input multiple output (MIMO) transmission, is drawing attention as a promising next generation cellular mobile radio system due to its high spectral efficiency compared to the current High-Speed Packet Access (HSPA) system. The authors performed a field trial of an LTE system that complies with 3GPP Release 8 in Kitakyushu-city, Fukuoka, Japan, as a specified ubiquitous district project promoted by the Ministry of Internal Affairs and Communications of Japan. This paper first summarizes the field trial. Next, it describes the overview of the field trial system and reports the field experiment results on the downlink 22 MIMO wireless transmission. Finally, it compares the field experimental results to laboratory experimental results obtained with a hardware channel simulator using the channel model based on Recommendation ITU-R P.1816.

Silicon Mach-Zehnder interferometric (MZI) waveguide modulator incorporating the n-channel junction field-effect transistor (JFET) as a signal modulation unit was designed, fabricated, and analyzed. The proposed MZI with JFET was designed to operate based on the plasma dispersion effect in the infrared wavelength of 1550 nm. The three different modulation lengths (ML) of 500, 1000, and 2000 µm while keeping the overall MZI length constant at 1.5 cm were set as a general design rule for these 10 µm-wide MZIs under study. When the JFET was operated in an active mode by injecting approximately 50 mA current (Is) to achieve a π phase shift, the modulation efficiency of the device was measured to be η = π /(Is· L) 40π/A-mm. The temporal and frequency response measurements also demonstrate that the respectively rise and fall times measured using a high-speed photoreceiver were in the neighborhood of 8.5 and 7.5 µsec and the 3 dB roll-off frequency (f3 dB) measured was in the excess of 400 kHz.

This paper proposes a new method that reduces the computational cost of the phase-only correlation (POC)-based methods for displacement estimation in old film sequences. Conventional POC-based methods calculate all the points of the POC and only use the highest peak of the POC and its neighboring points to estimate the displacement with subpixel accuracy. Our proposed method reduces the computational cost by calculating the POC in a small region, instead of all the points of the POC. The proposed method combines a displacement pre-estimation with a modified inverse discrete Fourier transform (IDFT). The displacement pre-estimation uses the 1-D POCs of frame projections to pre-estimate the displacement with pixel accuracy and chooses a small region in the POC including the desired points for displacement estimation. The modified IDFT is then used to calculate the points in this small region for displacement estimation. Experimental results show that use of the proposed method can effectively reduce the computational cost of the POC-based methods without compromising the accuracy.

It is an important problem to determine major collection times to meet the pause time goal for a generational garbage collector. From such a viewpoint, this paper proposes two stochastic models based on working schemes of a generational garbage collector: Garbage collections occur in a nonhomogeneous Poisson process, tenuring collection is made at a threshold level K, and major collection is made at time T or at Nth collection including minor and tenuring collections for the first model and at time T or at Nth collection including tenuring collections for the second model. Using the techniques of cumulative processes and reliability theory, expected cost rates are obtained, and optimal policies of major collection times which minimize them are discussed analytically and computed numerically.

This paper firstly analysis the coherent correlation, non-coherent accumulation detector used in weak satellite signal detection mathematically and statistically, and derives its single threshold based on the CFAR (constant false alarm rate). And then the paper improved the detector under the situation of more than one satellite existing with different signal power. Based on this new type of detector, a threshold calculation method is introduced considering the effect of near-far problem in the weak signal detection. Finally the method is verified and compared to the traditional single threshold with simulated data and collected intermediate frequency real data. The results show that this new threshold method can detect signal efficiently with lower false alarm possibility and larger detection possibility.

In this paper, a 65 nm 1.2 V 7-bit 1GSPS folding-interpolation A/D converter with a digitally self-calibrated vector generator is proposed. The folding rate is 2 and the interpolation rate is 8. A self-calibrated vector generation circuit with a feedback loop and a recursive digital code inspection is described. The circuit reduces the variation of the offset voltage caused by process mismatches, parasitic resistors, and parasitic capacitances. The chip has been fabricated with a 65 nm 1-poly 6-metal CMOS technology. The effective chip area is 0.87 mm2 and the power consumption is about 110 mW with a 1.2 V power supply. The measured SNDR is about 39.1 dB when the input frequency is 250 MHz at a 1 GHz sampling frequency. The measured SNDR is drastically improved in comparison with the same ADC without any calibration.

A loop-back WDM-PON based on a RSOA has lots of merits, however one-level of the upstream signal has downstream information under OOK modulation. These effects make difficult to define decision threshold and estimate BER. In order to solve this, we propose a mathematical model of remodulated OOK signal and experimentally demonstrate BER performance with the near optimum decision threshold achieved by the proposed model.

Trapping sets have been identified as one of the main factors causing error floors of low-density parity-check (LDPC) codes at high SNR values. By adding several new rows to the original parity-check matrix, a novel method is proposed to eliminate small trapping sets in the LDPC code's Tanner graph. Based on this parity-check matrix extension, we design new codes with low error floors from the original irregular LDPC codes. Simulation results show that the proposed method can lower the error floors of irregular LDPC codes significantly at high SNR values over AWGN channels.

We propose a subthreshold Static Random Access Memory (SRAM) circuit architecture with improved write ability. Even though the circuits can achieve ultra-low power dissipation in subthreshold digital circuits, the performance is significantly degraded with threshold voltage variations due to the fabrication process and temperature. Because the write operation of SRAM is prone to failure due to the unbalance of threshold voltages between the nMOSFET and pMOSFET, stable operation cannot be ensured. To achieve robust write operation of SRAM, we developed a compensation technique by using an adaptive voltage scaling technique that uses an on-chip threshold voltage monitoring circuit. The monitoring circuit detects the threshold voltage of a MOSFET with the on-chip circuit configuration. By using the monitoring voltage as a supply voltage for SRAM cells, write operation can be compensated without degrading cell stability. Monte Carlo simulations demonstrated that the proposed SRAM architecture exhibits a smaller write operation failure rate and write time variation than a conventional 6T SRAM.

This paper proposes a system called Neary that detects conversational fields based on similarity of auditory situation among users. The similarity of auditory situation between each pair of the users is measured by the similarity of frequency property of sound captured by head-worn microphones of the individual users. Neary is implemented with a simple algorithm and runs on portable PCs. Experimental result shows Neary can successfully distinguish groups of conversations and track dynamic changes of them. This paper also presents two examples of Neary deployment to detect user contexts during experience sharing in touring at the zoo and attending an academic conference.

This paper presents an improved version of multi-stage threshold decoding with a difference register (MTD-DR) for self-orthogonal convolutional codes (SOCCs). An approximate lower bound on the bit error rate (BER) with the maximum likelihood (ML) decoding is also given. MTD-DR is shown to achieve an approximate lower bound of ML decoding performance at the higher Eb/N0. The code with larger minimum Hamming distance reduces the BER in error floor, but the BER in waterfall shifts to the higher Eb/N0. This paper gives a decoding scheme that improves the BER in both directions, waterfall and error floor. In the waterfall region, a 2-step decoding (2SD) improves the coding gain of 0.40 dB for shorter codes (code length 4200) and of 0.55 dB for longer codes (code length 80000) compared to the conventional MTD-DR. The 2-step decoding that serially concatenates the parity check (PC) decoding improves the BER in the error floor region. This paper gives an effective use of PC decoding, that further makes the BER 1/8 times compared to the ordinary use of PC decoding in the error floor region. Therefore, the 2SD with effective use of parity check decoding improves the BER in the waterfall and the error floor regions simultaneously.

An adaptive selective retransmission algorithm for video communications based on packet importance value is proposed. The algorithm can adaptively select the retransmission threshold in realtime and efficiently manage the retransmission process in heavy loaded networks while guaranteeing acceptable video quality at the receiver.

Low-density parity-check (LDPC) codes are typically designed to avoid the length-4 cycles to ensure acceptable levels of performance. However, the turbo equalization, which relies on an interaction between an inner code such as an LDPC code and a soft-output Viterbi algorithm (SOVA) detector, exhibits a performance degradation due to the pseudo cycles. In this paper, we propose an interleaved modified array code (IMAC) that can reduce the number of pseudo cycles, hence, improving the gains from the iterative processing technique. The modification is made on the existing array-based LDPC codes named modified array codes (MAC) by introducing an additional interleaving matrix to the parity-check matrix. Simulation results on the perpendicular magnetic recording channels (PMRC) demonstrate that the IMAC outperforms both the MAC and the previously proposed random interleave array (RIA) codes for the partial-response targets under consideration. In addition, a subblock-based encoder design is proposed to reduce the encoding complexity of the IMAC and when compared with the RIA code, the IMAC exhibits a lower encoding complexity, and still maintains a comparable level of the decoding complexity.

This paper presents a novel technique to realize Karnin et al.'s (k,n)-threshold schemes over binary field extensions as a software. Our realization uses the matrix representation of finite fields and matrix-vector multiplications, and enables rapid operations in software implementation. The theoretical evaluation and computer simulation reveal that our realization of Karnin et al.'s scheme achieves much faster processing time than the ordinary symbol oriented realization of the scheme. Further, we show that our realization has comparable performance to the existing exclusive-OR-based fast schemes of Fujii et al. and Kurihara et al.

We propose a new cone-type DRAM cell as a 1T DRAM cell. The superiority of cone shape is already reported, in that the electric field concentration effect encourages impact ionization phenomenon. So the device has improved DRAM characteristics compared with cylinder type 1T DRAM Cell (SGVC Cell). To confirm the memory operation of the cone-type DRAM cell, simulation works were carried out. Also, retention characteristic shows the device can be used practically.

We investigated the effects of various field plate and buried gate structures on the DC and small signal characteristics of 4H-silicon carbide (SiC) metal-semiconductor field-effect transistors (MESFETs). In comparison with the source-connected field plate, the gate-connected field plate exhibited superior frequency response while having similar DC characteristics. In order to further enhance the output power, dual field plates were employed in conjunction with a buried gate structure.