We study the high-frequency asymptotic analysis methods for the scattered fields by a cylindrically curved conducting surface excited by the incident wave on the curved surface from the convex side. We first derive the novel hybrid ray-mode solution for the scattered fields near the concave surface by solving a canonical problem formulated under the assumption that the cylindrically curved conducting surface possesses only one edge. Then by applying the ray tracing technique and the idea of Keller's GTD (Geometrical Theory of Diffraction), the solutions derived for the canonical problem are extended to account for the problem of the radiation from and the scattering by the other edge of the cylindrically curved surface. We confirm the validity of the novel asymptotic representations proposed in the present study by comparing both with the numerical results obtained from the method of moment and the experimental results performed in the anechoic chamber.

For ID-based cryptography, not only pairing but also scalar multiplication must be efficiently computable. In this paper, we propose a scalar multiplication method on the circumstances that we work at Ate pairing with Barreto-Naehrig (BN) curve. Note that the parameters of BN curve are given by a certain integer, namely mother parameter. Adhering the authors' previous policy that we execute scalar multiplication on subfield-twisted curve (Fp2) instead of doing on the original curve E(Fp12), we at first show sextic twisted subfield Frobenius mapping (ST-SFM) in (Fp2). On BN curves, note is identified with the scalar multiplication by p. However a scalar is always smaller than the order r of BN curve for Ate pairing, so ST-SFM does not directly applicable to the above circumstances. We then exploit the expressions of the curve order r and the characteristic p by the mother parameter to derive some radices such that they are expressed as a polynomial of p. Thus, a scalar multiplication [s] can be written by the series of ST-SFMs . In combination with the binary method or multi-exponentiation technique, this paper shows that the proposed method runs about twice or more faster than plain binary method.

In this paper, we investigate the transitional dynamics and quasi-periodic solution appearing after the Saddle-Node (SN) bifurcation of a periodic solution in an inductor-coupled asymmetrical van der Pol oscillators with hard-type nonlinearity. In particular, we elucidate, by investigating global bifurcation of unstable manifold (UM) of saddles, that transitional dynamics and quasi-periodic solution after the SN bifurcation appear based on different structure of UM.

In this paper, a multiplication algorithm in extension field Fpm is proposed. Different from the previous works, the proposed algorithm can be applied for an arbitrary pair of characteristic p and extension degree m only except for the case when 4p divides m(p-1) and m is an even number. As written in the title, when p>m, 4p does not divide m(p-1). The proposed algorithm is derived by modifying cyclic vector multiplication algorithm (CVMA). We adopt a special class of Gauss period normal bases. At first in this paper, it is formulated as an algorithm and the calculation cost of the modified algorithm is evaluated. Then, compared to those of the previous works, some experimental results are shown. Finally, it is shown that the proposed algorithm is sufficient practical when extension degree m is small.

The sub-threshold R-MOSFET resistor structure which enables tuning range extension below the threshold voltage in the MOSFET with moderate to weak inversion operation is analyzed in detail. The principal operation of the sub-threshold resistor is briefly described. The analysis of its characteristic based on approximations of a general MOS equation valid for all regions is given along with discussion on design implication and consideration. Experiments and simulations are provided to validate the theoretical analysis and design, and to verify the feasibility at a supply voltage as low as 0.5 V using a low-threshold devices in a 1.8-V 0.18 µm CMOS process.

To improve product yield in high-product-mix semiconductor manufacturing, it is important to estimate the systematic yield inherent to each product and to extract problematic products that have low systematic yields. We propose a simplified and available yield model using a critical area analysis. This model enables the extraction of problematic products by the relationship between actual yields and the short sensitivities of the products. Furthermore, we present an enterprise-wide yield management system using this model and some useful applications. As a result, the system increases the efficiency of the yield management and enhancement dramatically.

The design of multi-branch optical waveguides having 3 or more output ports is not so easy as that of 2-output branches because some innovative geometry is required to realize equal power splitting. All previous studies take the same approach in which they first introduce innovative geometries and then adjust the structural parameters for equal splitting. On the other hand, we propose quite a different method where distribution of refractive index is calculated from an ideal field distribution which is synthesized artificially. The method is extended to design 3-D 4-branch waveguides. It is exemplified that 4-branch waveguides with low-loss and equal splitting can be realized by the proposed method.

A single chip NFC transceiver with Dual Antenna structure supporting not only NFC active and passive mode but also 13.56 MHz RFID reader and tag mode is designed and fabricated. The proposed NFC transceiver can operate as a RFID tag even without external power supply thanks to a dual antenna structure for initiator and target. The area increment due to additional target antenna is negligible because the target antenna is constructed by using a shielding layer of the initiator antenna.

The control of the organic field-effect transistor characteristics is necessary to produce the integrated circuits using organic semiconductors. Variations in the poly (3-hexylthiophene) field-effect transistor characteristics upon post-treatment such as thermal treatment and voltage treatment in N2 atmosphere have been investigated. The controllability and reproducibility of the threshold voltage and mobility were achieved as a result of the post-treatments.

Threshold Inverter Quantization (TIQ) technique has been gaining its importance in high speed flash A/D converters due to its fast data conversion speed. It eliminates the need of resistor ladders for reference voltages generation which requires substantial power consumption. The key to TIQ comparators design is to generate 2n - 1 different sized TIQ comparators for an n-bit A/D converter. This paper presents a highly efficient TIQ comparator design methodology based on an analytical model as well as SPICE simulation experimental model. One can find any sets of TIQ comparators efficiently using the proposed method. A 6-bit TIQ A/D converter has been designed in a 0.18 µm standard CMOS technology using the proposed method, and compared to the previous measured results in order to verify the proposed methodology.

The weakness of implementation for LDPC encoder is that conventional binary Matrix Vector Multiplier has many clock cycles which lead to limited throughput. In this letter in order to construct efficient architecture, we target on IEEE 802.16e LDPC encoders. Over the standard H matrices with Circulant Permutation Matrices, we propose semi-parallel architecture by using cyclic right shift registers and exclusive-OR instead of complex Matrix Vector Multipliers. Proposed efficient encoder for IEEE 802.16e LDPC satisfies compact size and high throughput.

Time-resolved microscopic optical second harmonic generation (TRM-SHG) imaging measurement revealed quantitatively the potential drop at the electrode contact of pentacene field effect transistors (FET). An activation of the SH signal at the edge of Ag-source electrode indicates the presence of large potential drop at pentacene-Ag contact during device operation, whereas negligible potential drop was observed at pentacene-Au contact. These findings agree with the injection characteristics of electrodes owing to the relationship between the work function of the metal and the HOMO level of pentacene.

In this paper, we propose a partially-parallel irregular LDPC decoder based on IEEE 802.11n standard targeting high throughput and small area applications. The design is based on a novel sum-delta message passing algorithm characterized as follows: (i) Decoding throughput is greatly improved by utilizing the difference value between the updated and the original value to remove redundant computations. (ii) Registers and memory are optimized to store only the frequently used messages to decrease the hardware cost. (iii) Techniques such as binary sorting, parallel column operation, high performance pipelining are used to further speed up the message passing procedure. The synthesis result in TSMC 0.18 CMOS technology demonstrates that for (648,324) irregular LDPC code, our decoder achieves 7.5X improvement in throughput, which reaches 402 Mbps at the frequency of 200 MHz, with 11% area reduction. The synthesis result also demonstrates the competitiveness to the fully-parallel regular LDPC decoders in terms of the tradeoff between throughput, area and power.

In many different bioelectronic applications silicon field-effect devices such as transistors or nanowires are used. Usually native or thermally grown silicon oxides serve as interfacing layer to the liquid. For an effective voltage to current conversion of the devices, the main demands for interface layers are low leakage current, low defect density, and high input capacitance. In this article we describe the fabrication and characterization of ultra-thin silicon oxide/high-κ material stacks for bioelectronics. A combination of ultra-thin silicon oxide and DyScO3 revealed the best results. This material stack is particularly interesting for future fabrication of field-effect devices for bioelectronic applications.

With the development of digital TV system, how to display the NTSC signal in digital TV system is a problem. De-interlacing is an algorithm to solve it. In previous papers, using motion compensation (MC) method for de-interlacing needs lots of computation complexity and it is not easy to implement in hardware. In this paper, a content adaptive de-interlacing algorithm is proposed. Our algorithm is based on the motion adaptive (MA) method which combines the advantages of intra-field and inter-field method. We propose a block type decision mechanism to predict the video content instead of a blind processing with MC method throughout the entire frame. Additionally, in intra-field method, we propose the edge-base adaptive weight average (EAWA) method to achieve a better performance and smooth the edge and stripe. In order to demonstrate our algorithm, we implement the de-interlacing system on the DSP platform with thorough complexity analysis. Compared to MC method, we not only achieve higher video quality in objective and subjective view, but also consume lower computation power. From the profiling on CPU run-time analysis, the proposed algorithm is only one-fifth of MC method. At the DSP demonstration board, the saving ratio is about 54% to 96%.

In this paper, we design and manufacture a flanged double ridged waveguide with a tapered section as a sample holder for measuring the electromagnetic shielding effectiveness (SE) of planar material in broadband frequency ranges up to 10 GHz. The proposed technique overcomes the limitations of the conventional ASTM D4935 test method at high frequencies. The simulation results for the designed sample holders agree well with the fabricated ones in consideration of the design specification of S11 < -20 dB within the frequency range of 1-10 GHz. To verify the proposed measurement apparatus, the measured SE data of the commercial shielding materials from 1 to 10 GHz were indirectly compared with those obtained from the ASTM D4935 from 30 MHz to 1 GHz. We observed that the SE data obtained by using both experimental techniques agree with each other.

We fabricated both thin film transistors (TFTs) and diodes using zinc oxide (ZnO) and pentacene, and investigated their basic characteristics. We found that field-effect mobility is influenced by the interface state between the semiconductor and dielectric layers. Furthermore, the complementary metal oxide semiconductor (CMOS) inverter using a p-channel pentacene field-effect transistor (FET) and an n-channel ZnO FET showed a relatively high voltage gain (8-12) by optimizing the device structure. The hybrid complementary inverters described here are expected for application in flexible displays, radio frequency identification cards (RFID) tags, and others.

In this paper, we propose an extension to GridFTP that optimizes its performance by dynamically adjusting the number of parallel TCP connections. GridFTP has been used as a data transfer protocol to effectively transfer a large volume of data in Grid computing. GridFTP supports a feature called parallel data transfer that improves throughput by establishing multiple TCP connections in parallel. However, for achieving high GridFTP throughput, the number of TCP connections should be optimized based on the network status. In this paper, we propose an automatic parallelism tuning mechanism called GridFTP-APT (GridFTP with Automatic Parallelism Tuning) that adjusts the number of parallel TCP connections according to information available to the Grid middleware. Through simulations, we demonstrate that GridFTP-APT significantly improves the performance of GridFTP in various network environments.

Block-based SSTA analyzes the timing variation of a chip caused by process variations effectively. However, block-based SSTA cannot identify critical nodes, nodes that highly influence the timing yield of a chip, used as the effective guidance of timing yield optimization. In this paper, we propose a new timing criticality to identify those nodes, referred to as the timing yield criticality (TYC). The proposed TYC is defined as the change in the timing yield, which is induced by the change in the mean arrival time at a node. For efficiency, we estimate the TYC through linear approximation instead of propagating the changed arrival time at a node to its fanouts. In experiments using the ISCAS 85 benchmark circuits, the proposed method estimated TYCs with the expense of 9.8% of the runtime for the exact computation. The proposed method identified the node that gives the greatest effect on the timing yield in all benchmark circuits, except C6288, while existing methods did not identify that for any circuit. In addition, the proposed method identified 98.4% of the critical nodes in the top 1% in the effect on the timing yield, while existing methods identified only about 10%.

One-dimensional photonic crystal (PC) with alternating layers of TiO2 and SiO2 was fabricated with spin coating and low temperature baking, resulting in a successful tuning of the PC stop band so as to block the amplified spontaneous emission (ASE) of a π-conjugate polymer film. Single PC as a substrate, not a cavity with two PC's, of the polymer film was sufficient to shift the tangential ASE to the energy at PC stop band edge, indicating that the tangential ASE propagating along the interface was modulated by its evanescent-field tail in the PC, which opens the new pathway for low-threshold coherent luminescence from an ultrathin π-conjugate polymer film with ultimate mode volume.