We present an economical and fault-tolerant load balancing strategy (EFTLBS) based on an operator replication mechanism and a load shedding method, that fully utilizes the network resources to realize continuous and highly-available data stream processing without dynamic operator migration over wide area networks. In this paper, we first design an economical operator distribution (EOD) plan based on a bin-packing model under the constraints of each stream bandwidth as well as each server's CPU capacity. Next, we devise super-operator (SO) that load balances multi-degree operator replicas. Moreover, for improving the fault-tolerance of the system, we color the SOs based on a coloring bin-packing (CBP) model that assigns peer operator replicas to different servers. To minimize the effects of input rate bursts upon the system, we take advantage of a load shedding method while keeping the QoS guarantees made by the system based on the SO scheme and the CBP model. Finally, we substantiate the utility of our work through experiments on ns-3.

A novel half mode elliptic substrate integrated waveguide (HMESIW) filter with bypass coupling substrate integrated circular cavity (BCSICC) is proposed and fabricated by using standard PCB technology. Due to the use of an elliptical waveguide cavity, the tolerance sensitivity of the filter is reduced. The filter optimizing procedure is therefore simplified. The measured results demonstrate its superior performance in tolerance sensitivity and show good agreements with the simulation results.

As supercomputers increase in size, the mean time between failures (MTBF) of a system becomes shorter, and the reliability problem of supercomputers becomes more and more serious. MPI is currently the de facto standard used to build high-performance applications, and researches on the fault tolerance methods of MPI are always hot topics. However, due to the characteristics of MPI programs, most current checkpointing methods for MPI programs need to modify the MPI library (even operating system), or implement a complicated protocol by logging lots of messages. In this paper, we carry forward the idea of Application-Level Checkpointing (ALC). Based on the general fact that programmers are familiar with the communication characteristics of applications, we have developed BC-ALC, a new portable blocking coordinated ALC for MPI programs. BC-ALC neither modifies the MPI library (even operating system) nor logs any message. It implements coordination only by the Barrier operations instead of any complicated protocol. Furthermore, in order to reduce the cost of fault-tolerance, we reduce the synchronization range of the barrier, and design WBC-ALC, a weak blocking coordinated ALC utilizing group synchronization instead of global synchronization based on the communication relationship between processes. We also propose a fault-tolerance framework developed on top of WBC-ALC and discuss an implementation of it. Experimental results on NPB3.3-MPI benchmarks validate BC-ALC and WBC-ALC, and show that compared with BC-ALC, the average coordination time and the average backup time of a single checkpoint in WBC-ALC are reduced by 44.5% and 5.7% respectively.

524,288 NbN-based Josephson junctions were integrated to produce a programmable Josephson voltage standard (PJVS) on a die of 15 mm 15 mm, and the PJVS circuit was cooled to 10 K using a cryocooler and operated with a current margin of about 1.0 mA. Although an output voltage of 10 V was required for a voltage standard, the circuit was designed to generate the maximum output voltage of 17 V because it was difficult to avoid a reduction of the output voltage due to defects. Although a perfect chip without any defect was rarely fabricated, the high voltage chip that generated at least 10 V was fabricated with the fabrication yield of larger than 30%. The fabrication yield was also improved by optimizing the film growth conditions to reduce the film stress and the number of particles. Applications for a secondary voltage standard and an ac Josephson voltage standard are also described.

MapReduce is a parallel processing framework for large scale data. In the reduce phase, MapReduce employs the hash scheme in order to distribute data sharing the same key across cluster nodes. However, this approach is not robust for the skewed data distribution. In this paper, we propose a skew-tolerant key distribution method for MapReduce. The proposed method assigns keys to cluster nodes balancing their workloads. We implemented our proposed method on Hadoop. Through experiments, we evaluate the performance of the proposed method in comparison with the conventional method.

Soft error has become an increasingly significant concern in modern micro-processor design, it is reported that the instruction-level temporal redundancy in out-of-order cores suffers an performance degradation up to 45%. In this work, we propose a fault tolerant architecture with fast error correcting codes (such as the two-dimensional code) based on double execution. Experimental results show that our scheme can gain back IPC loss between 9.1% and 10.2%, with an average around 9.2% compared with the conventional double execution architecture.

The metallic waveguide is one of many effective media for millimeter- and submillimeter-waves because of the advantage of its low-loss nature. This paper describes the fabrication method of PTFE-filled waveguide components with the use of the SR (synchrotron radiation) direct etching process of PTFE, sputter deposition of metal, and electroplating. PTFE is known as a difficult material to process with high precision. However, it has been reported that PTFE microstructures can be fabricated by the direct exposure to SR. First, an iris-coupled waveguide BPF with 5-stage Chebyshev response is designed and fabricated for the Q-band. It is demonstrated that the present process is applicable for the fabrication of the practical components inclusive of narrow patterns. Then, a cruciform 3 dB coupler with air-filled posts is designed and fabricated for the Q-band. Directivity and matched state of the coupler can be realized by “holes” in the dielectric material. The measurement results are also shown.

Phase synchronization is a crucial problem in Bistatic Synthetic Aperture Radar (BiSAR). As phase synchronization error and Doppler phase have nearly the same form, Doppler Centroid (DC) cannot be estimated with traditional method in BiSAR. A DC estimation method is proposed through phase-interferometry of Dual-channel direct signal. Through phase interferometry, phase synchronization error can be counteracted while Doppler phase is reserved and DC can be estimated from the reserved phase.

This paper considers the normalization of Miller functions for computing “point-evaluation” pairings on an elliptic curve E over a finite field Fq, where the characteristic of Fq is neither 2 nor 3. It is shown that the normalized Miller functions for computing point-evaluation pairings on G2G1 when (i) the embedding degree k is even, or (ii) 3|k and E/Fq(q ≡ (1 mod 3)) is a curve of the form Y2=X3+b. Thus, there is no need to consider the normalization for computing pairings on many pairing-friendly elliptic curves.

This paper presents an interconnect resilient (IR) methodology with maximal interconnect fault tolerance, yield, and reliability for both single and multiple interconnect faults under stuck-at and open fault models. By exploiting multiple routes inherent in an interconnect structure, this method can tolerate faulty connections by efficiently finding alternative paths. The proposed approach is compatible with previous interconnect detection and diagnosis methods under oscillation ring schemes, and together they can be applied to implement a robust interconnect structure that may still provide correct communication even under multiple link faults in Network-on-Chips (NoCs). With such knowledge, designers can significantly improve interconnect reliability by augmenting vulnerable interconnect structures in NoCs. As a result, the experimental results show that alternative paths in NoCs can be found for almost all paths. Hence, the proposed method provides a good way to achieve fault tolerance and reliability/yield improvement.

We propose a transfer gate phase coupler for a low-power multi-phase oscillator (MPOSC). The phase coupler is an nMOS transfer gate, which does not waste charge to the ground and thus achieves low power. The proposed MPOSC can set the number of outputs to an arbitrary number. The test circuit in a 180-nm process and a 65-nm process exhibits 20 phases, including 90 different angles. The designs in a 180-nm CMOS process and a 65-nm CMOS process were fabricated to confirm its process scalability; in the respective designs, we observed 36.6% and 38.3% improvements in a power-delay products, compared with the conventional MPOSCs using inverters and nMOS latches. In a 65-nm process, the measured DNL and 3σ period jitter are, respectively, less than 1.22 and 5.82 ps. The power is 284 µW at 1.85 GHz.

As an application of the direct sequence spread spectrum (SS) communication system, there is an M-ary bi-orthogonal SS communication system. In its system, several spreading sequences (bi-orthogonal sequences) are used in a code shift keying basis. Hence, design of the spreading code synchronization system has been an issue in the M-ary bi-orthogonal SS systems. In this paper, the authors focus on a code tracking system using a differential detector and a Delay Lock Loop (DLL). They investigate a tracking performance of their code tracking system by theoretical analysis. In addition, a multi-stage interference canceler is applied to the M-ary bi-orthogonal SS system. As the result, it is shown that the tracking performance of the theoretical analysis is almost the same as that of computer simulations in a multi-user environment. It is also shown that the multi-stage interference canceler is effective in improvement of the BER performance.

We fabricated solution-processed organic complementary inverters based on α,ω-bis(2-hexyldecyl)sexithiophene (BHD6T) for p-channel and C60-fused N-methylpyrrolidine-meta-dodecyl phenyl (C60MC12) for n-channel. The BHD6T and C60MC12 thin-film transistors showed high field-effect mobilities of 0.035 and 0.057 cm2/Vs, respectively. The complementary inverter with a supply voltage of 50 V exhibited inverting voltages of 26.8 V for forward and 27.0 V for backward sweeps and a high gain of 76.

In this study, we propose a one dimensional (1D) based successive generalized sidelobe canceller (GSC) structure for the implementation of 2D adaptive beamformers using a uniform rectangular antenna array (URA). The proposed approach takes advantage of the URA feature that the 2D spatial signature of the receive signal can be decomposed into an outer product of two 1D spatial signatures. The 1D spatial signatures lie in the column and the row spaces of the receive signal matrix, respectively. It follows that the interferers can be successively eliminated by two rounds of 1D-based GSC structure. As compared to the conventional 2D-GSC structure, computer simulations show that in addition to having significantly low computational complexity, the proposed adaptive approach possesses higher convergence rate.

We have previously proposed a howling canceller which cancels howling by using a cascade notch filter designed from a distance between a loudspeaker and a microphone. This method utilizes a pilot signal to estimate the distance. In this paper, we introduce two methods into the distance-based howling canceller to improve speech quality. The first one is an adaptive cascade notch filter which adaptively adjusts the nulls to eliminate howling and to keep speech components. The second one is a silent pilot signal whose frequencies exist in the ultrasonic band, and it is inaudible while on transmission. We implement the proposed howling canceller on a DSP to evaluate its capability. The experimental results show that the proposed howling canceller improves speech quality in comparison to the conventional one.

This letter proposes a novel technique for detecting a target signal buried in clutter using principal component analysis (PCA) for pulse-Doppler radar systems. The conventional detection algorithm is based on the fast Fourier transform-constant false alarm rate (FFT-CFAR) approaches. However, the detection task becomes extremely difficult when the Doppler spectrum of the target is completely buried in the spectrum of clutter. To enhance the detection probability in the above situations, the proposed method employs the PCA algorithm, which decomposes the target and clutter signals into uncorrelated components. The performances of the proposed method and the conventional FFT-CFAR based detection method are evaluated in terms of the receiver operating characteristics (ROC) for various signal-to-clutter ratio (SCR) cases. The results of numerical simulations show that the proposed method significantly enhances the detection probability compared with that obtained using the conventional FFT-CFAR method, especially for lower SCR situations.

Due to the lack of end-to-end paths between the communication source and destination in the Disruption Tolerant Network (DTN), its routing employs the store-carry-and-forward mechanism. In order to provide communication service in the DTN where there is only intermittent connectivity between nodes, a variety of epidemic-style routing algorithms have been proposed to achieve high message delivery probability at the cost of energy consumption. In this contribution, we investigate the problem of optimal multi-frame content transmission. By formulating the optimization problem with a Markov model, we derive the optimal policies under the two conditions of with and without energy constraint. We also investigate the performance of the proposed optimal policies through extensive numerical analyses, and conclude that the optimal policies give the best performance and the energy constraint critically degrades the system performance in the multi-frame content transmission.

In this study, the design and fabrication of a 110–140-GHz varistor mode frequency tripler made with four Schottky diodes pair are presented. Nonlinear simulations were performed to calculate the optimum diode embedding impedance and the required input power. A compact microstrip resonant cell (CMRC) filter was introduced for the first time in submillimeter multiplier, instead of the traditional low-and-high impedance microstrip filter. The shorter size and the wider stop band of the CMRC filter improved the performance of the tripler. The tripler exhibited the best conversion efficiency of 5.2% at 129 GHz and peak output power of 5.3 mW at 125 GHz. Furthermore, within the output bandwidth from 110 to 140 GHz, the conversion efficiency was greater than 1.5%.

We propose a flexible and scalable architecture for a network controller platform used for OpenFlow. The OpenFlow technology was proposed as a means for researchers, network service creators, and others to easily design, test, and virtually deploy their innovative ideas in a large network infrastructure, which will accelerate research activities on Future Internet architectures. The technology enables the independent evolution of the network control plane and the data plane. Rather than having programmability within each network node, the separated OpenFlow controller provides network control through pluggable software. Our proposed network controller architecture will enable researchers to use their own software to control their own virtual networks. Flexibility and scalability were achieved by designing the network controller as a modularized and distributed system on a cluster of servers. Testing showed that a group of servers can efficiently cooperate to serve as a scalable OpenFlow controller. Testing using the nationwide JGN2plus network demonstrated that high-definition video can be delivered through OpenFlow-based point-to-point and point-to-multipoint paths.

We propose two types of active directional couplers to assure high TX cancellation: an asymmetric type and a symmetric type. For attaining low receiving through loss, coupling capacitors used in conventional couplers are replaced by amplifiers in the proposed active directional couplers. The asymmetric active directional coupler is composed of a small number of components and simple structure. The symmetric active directional coupler has wide-bandwidth TX cancellation. Measurement results show that receiving through loss of -5.3 dB and the TX cancellation of -67.6 dB are obtained in the asymmetric active directional coupler, and receiving through loss of -6.7 dB and the TX cancellation of -66.4 dB are obtained in the symmetric active directional coupler. Compared to the asymmetric active directional coupler, the symmetric active directional coupler has advantage of wider bandwidth of 1.25 MHz to reduce TX leakage of less than -55 dB. Both the proposed active directional couplers achieve high TX cancellation, and the symmetric active directional coupler can be applied in a UHF RFID system with 10-m communication range.