We have developed a hardware accelerator for Java platforms, integrated on a SuperH microprocessor core, using a 130-nm CMOS process. The Java accelerator, a bytecode translation unit (BTU), is tightly coupled with the CPU to share resources. The BTU supports 159 basic bytecodes and 5 or 6 optional bytecodes. It supports both connected device configuration (CDC) 1.0 and connected limited device configuration (CLDC) 1.0.4 technologies. The BTU corresponds to the dual-issued superscalar CPU and applies a new method, control-sharing. With this method, the BTU always grasps the pipeline status of the CPU, and the Java program is processed by both the BTU and the CPU. To implement this method, we developed some acceleration techniques: fast branch requests, enhanced CPU instructions, Java runtime exception detection hardware, and fewer overhead cycles of handover between the BTU and the CPU. In particular, the BTU can detect Java runtime exceptions in parallel with other processing, such as an array access. With previous methods, there is a disadvantage in that CPU efficiency decreases for Java-specific processing, such as array index bounds checking. The sample chip was fabricated in Renesas 130-nm, five-layer Cu, dual-vth low-power CMOS technology. The chip runs at 216 MHz and 1.2 V. The BTU has 75 kG. The benchmark on an evaluation board showed 6.55 embedded caffeine marks (ECM)/MHz on the CLDC 1.0.4 configuration, a tenfold speed increase without the BTU for roughly the same power consumption. In other words, power savings of 90 percent with the same performance were achieved.

In road-vehicle communication systems, the transmission rate between user terminals in the vehicle and the access points degrades due to changing path-loss and time-varying fading. In this paper, we used an inter-vehicle packet relay technique to improve channel quality in road-vehicle communication systems. We evaluated this method using numerical analysis to validate our method.

In this paper we study the problem of how to identify multiple disjoint paths that have the minimum total cost OPT and satisfy a delay bound D in a graph G. This problem has lots of applications in networking such as fault-tolerant quality of service (QoS) routing and network-flow load balancing. Recently, several approximation algorithms have been developed for this problem. Here, we propose a new approximation algorithm for it by using the Lagrangian Relaxation method. We then present a simple approximation algorithm for finding multiple link-disjoint paths that satisfy the delay constraints at a reasonable total cost. If the optimal solution under delay-bound D has a cost OPT, then our algorithm can find a solution whose delay is bounded by (1+)D and the cost is no more than (1+k)OPT. The time complexity of our algorithm is much better than the previous algorithms.

The extended version of spectral domain approach (ESDA) is applied to evaluate the scattering characteristics of discontinuities in coaxial line. Discontinuities may be in inner and/or outer conductor of coaxial line. This method secures the high accuracy by considering the singularities of fields near the conductor edge properly. The computational labor of the new method is far lighter than that of FEM, so that novel method is suitable for the time consuming iterative computation such as fitting procedure in material evaluation or optimization of antenna design.

Next generation free electron lasers aim to generate x-ray pulses with pulse durations down to 30 fs, and possibly even sub-fs. Synchronization of various stages of the accelerator and the probe laser system to the x-ray pulses with stability on the order of the pulse width is necessary to make maximal use of this capability. We are developing an optical timing synchronization system in order to meet this challenge. The scheme is based on generating a train of short optical pulses, with a precise repetition frequency, from a mode-locked laser oscillator and distributed via length-stabilized optical fibers to points requiring synchronization. The timing information is embedded in the repetition frequency and its harmonics. A significant advantage of the optical synchronization system is that multiple mode-locked Ti:sapphire seed oscillators typically present in an accelerator facility can be replaced by the master mode-locked fiber laser. In this paper, we briefly review progress on the development of the synchronization system and then discuss the implementation of this new possibility. Several technical issues related to this approach are analyzed.

When a cylindrically curved concave conducting surface is terminated abruptly at the edge, the whispering gallery (WG) mode propagating toward the edge direction is radiated into the free space from the aperture plane at the edge. In this paper, by applying the new analysis method, we shall derive a uniform geometrical theory of diffraction solution (UTD) for the electric-type WG mode radiation field applicable in the transition region near the geometrical boundaries produced by the incident modal ray on the edge of the curved surface. The UTD is represented by the summation of the solution for the geometrical ray converted from the modal ray of the WG mode and the solution for the uniform edge diffracted ray scattered at the cylindrically curved edge. By comparing with the reference solution obtained numerically from the integral representation of the radiation field, we will confirm the validity and the utility of the UTD proposed in this paper.

Authors have been working in particle accelerator wake field analysis by using the Time Domain Boundary Element Method (TDBEM). A stable TDBEM scheme was presented and good agreements with conventional wake field analysis of the FDTD method were obtained. On the other hand, the TDBEM scheme still contains difficulty of initial value setting on interior region problems for infinitely long accelerator beam pipe. To avoid this initial value setting, we adopted a numerical model of beam pipes with finite length and wall thickness on open scattering problems. But the use of such finite beam pipe models causes another problem of unwanted scattering fields at the beam pipe edge, and leads to the involvement of interior resonant solutions. This paper presents a modified TDBEM scheme, Scattered-field Time Domain Boundary Element Method (S-TDBEM) to treat the infinitely long beam pipe on interior region problems. It is shown that the S-TDBEM is able to avoid the excitation of the edge scattering fields and the involvement of numerical instabilities caused by interior resonance, which occur in the conventional TDBEM.

This paper proposes a jitter tolerant continuous-time sigma-delta A-D converter structure as well as its design method. This method transforms a conventionally designed sigma-delta A-D converter into a jitter tolerant one. Jitter tolerance is provided by the modified feedback signal paths and a consequently inserted digital LPF. This method is applicable independently of a system order and the other specifications.

Lightwave switching is discussed with a cascaded connection of optical couplers with light intensity control elements. By employing wavelength-selective amplifiers such as a waveguide-type Raman amplifier, all-optical wavelength-selective switching can be realized. We discuss analytically using coupled-mode theory that the lightwave switching is feasible by controlling the intensity of propagating lightwave. The switching operation is verified numerically using finite-difference beam-propagation method. As a result, the expected operation is realized and some characteristics involved with dependencies of wavelength and phase are also investigated. A preliminary experiment using attenuators, beam splitters and mirrors is also described to verify the switching operation with only light-intensity control in interferometers.

This paper presents a method for synthesizing a coherent 1-input 3-output optical delay-line circuit with N stages that is composed of 2(N + 1) directional couplers, N optical delay-lines, 2(N + 1) phase shifters and one external phase shifter with phase value φc . The path difference is equal to the delay time difference Δτ. Synthesis algorithm is based on the division of the transfer matrix into basic component transfer matrices and factorization is completed by repeated size-reduction. A set of recursion equations are also defined to obtain the unknown circuit parameters. In the developed method, it is shown that (13) optical delay-line circuit has the same transmission characteristics as finite impulse response (FIR) digital filters with complex expansion coefficients. Band-pass flat group delay type filter is considered as an example in this paper. It is also confirmed that developed (13) optical delay-line circuit can realize 100% power transmittance.

This paper introduces a new graph problem to find an Optimal Euler Circuit (OEC) in an Euler graph. OEC is defined as the Euler circuit that maximizes the sum of contiguous costs along it, where the contiguous cost is assigned for each of the two contiguous edges incident to a vertex. We prove that the OEC problem is NP-complete. A polynomial time algorithm will be presented for the case of a graph without vertex of degree greater than 4, and for the general case, a 1/4-approximation polynomial time algorithm will be proposed.

Multimedia Wavelength Division Multiple Access (M-WDMA) specially designed to accommodate multimedia traffic is a well-known media access control (MAC) protocol. This paper extensively analyzes the throughput of M-WDMA. Specifically, this analysis considers a wide range of network conditions including varying traffic loads, probabilistic occupancy of time segment, various traffic distribution patterns (TDPs) and channel sharing methods (CSMs) under both symmetric and asymmetric traffic load patterns (TLPs). Thus, the analytic behavior of M-WDMA can be investigated for designing a WDMA network managing multimedia traffic under practical environments.

We propose a Fault-Tolerant Object Group framework that provides group management and fault-tolerance services for consistency maintenance and state transparency as well. Through a virtual home-network simulation, we validate that the FTOG framework supports both of the reliability and the stability of the distributed home-network systems.

This paper proposes a Miller capacitor which has a wide input signal range. By discharging the charge of the capacitor connected between the input and output terminals of an amplifier before the output voltage of the amplifier exceeds its maximum range, the amplifier always operates in the active region and the Miller operation can be guaranteed. Thus a large value capacitor with a wide dynamic operation range can be realized using a small value capacitor. The Miller capacitor proposed in this paper is applied to a loop filter of phase locked loop (PLL) circuit that requires a large value capacitor to realize a low cutoff frequency. SPICE simulation of the PLL circuit using the Miller capacitor confirms the operation of the Miller capacitor and shows good performances that are similar to those obtained using a passive capacitor of a large value.

Reconfigurable devices are expected to be utilized in such mission-critical fields as space development and undersea cables, because system updates and pseudo-repair can be achieved remotely by reconfiguring. However, conventional reconfigurable devices suffer from memory-bit upset caused by charged particles in space which results in fatal system problems. In this paper, we propose an architecture of a fault-tolerant reconfigurable device. The proposed device is divided into "autonomous-repair cells" with embedded control circuits. The autonomous-repair cell proposed in this paper is based on error detection and correction (EDAC) and uses hardware and time redundancy. From evaluation, it is shown that the proposed architecture achieves sufficient reliability against configuration memory upset. Trade-offs between performance and cost are also analyzed.

We propose a voltage control scheme for 6T SRAM cells that makes a minimum operation voltage down to 0.3 V under DVS environment. A supply voltage to the memory cells and wordline drivers, bitline voltage, and body bias voltage of load pMOSFETs are controlled according to read and write operations, which secures operation margins even at a low operation voltage. A self-aligned timing control with a dummy wordline and its feedback is also introduced to guarantee stable operation in a wide range of the supply voltage. A measurement result of a 64-kb SRAM in a 90-nm process technology shows that a power reduction of 30% can be achieved at 100 MHz. In a 65-nm 64-Mb SRAM, a 74% power saving is expected at 1/6 of the maximum operating frequency. The performance penalty by the proposed scheme is less than 1%, and area overhead is 5.6%.

A novel two-dimensional (2D) beam scanning antenna array using composite right/left-handed (CRLH) leaky-wave antennas (LWAs) is proposed. The antenna array consists of a set of CRLH LWAs and a Butler matrix (BM) feeding network. The direction of the beam can be scanned two-dimensionally in one plane by changing frequency and in the other plane by switching the input ports of the BM. A four-element antenna array in the microstrip line configuration operating at 10.5 GHz is designed with the assistance of full-wave simulations based on the method of moment (MoM) and the finite-element method (FEM). The antenna array is fabricated and radiation characteristics are measured. The wide range 2D beam scanning operation with the angle from -30 deg to +25 deg in one plane by sweeping frequency from 10.25 GHz to 10.7 GHz and with four discrete angles of -46 deg, -15 deg, +10 deg, and +35 deg in the other plane by switching the input port is achieved.

As a result of the growth of sensor-enabled mobile devices, in recent years, users can utilize diverse digital contents everywhere and anytime. However, the interfaces of mobile applications are often unnatural due to limited computational capability, miniaturized input/output controls, and so on. To complement the poor user interface (UI) and fully utilize mobility as feature of mobile devices, we explore possibilities for a new UI of mobile devices. This paper describes the method for recognizing and analyzing a user's continuous action including the user's various gestures and postures. The application example we created is mobile game called AM-Fishing game on mobile devices that employ the accelerometer as the main interaction modality. The demonstration shows the evaluation for the system usability.

Multiple-input multiple-output (MIMO) systems using eigenbeam space division multiplexing (E-SDM) perform well and have increased capacities compared with those using conventional space division multiplexing (SDM). However, channel state information (CSI) is required at a transmitter, and the performance of E-SDM systems depends much on the accuracy of the CSI at a transmitter and a receiver. In time-varying fading environments, the channel change between the transmit weight determination time and the actual data transmission time causes the system performance to degrade. To compensate for the channel error, a linear extrapolation method has been proposed for a time division duplexing system. Unfortunately, the system performance still deteriorates as the maximum Doppler frequency increases. Here, two new techniques of channel extrapolation are proposed. One is second order extrapolation, and the other is exponential extrapolation. Also, we propose maximum Doppler frequency estimation methods for exponential extrapolation. Simulation results for 4tx 4rx MIMO systems showed that using the proposed techniques, E-SDM system performs better in a higher Doppler frequency region.

Most commercial Web sites dynamically generate their contents through a three-tier server architecture composed of a Web server, an application server, and a database server. In such an architecture, the database server easily becomes a bottleneck to the overall performance. In this paper, we propose WDBAccel, a high-performance database server accelerator that significantly improves the throughput of database processing. WDBAccel eliminates costly, complex query processing needed to obtain query results by reusing the results from previous queries for subsequent queries. This differentiates WDBAccel from other database cache systems, which employ traditional query processing. WDBAccel further improves its performance by fully utilizing main memory as the primary storage. This paper presents the design and implementation of the WDBAccel as well as the results of performance evaluation with a prototype.