Frequency dependent properties of accumulation-mode MOS varactors, which are key elements in many RF circuits, are dominated by Non-Quasi-Static (NQS) effects in the carrier transport. The circuit performances containing MOS varactors can hardly be reproduced without considering the NQS effect in MOS-varactor models. For the LC-VCO circuit as an example it is verified that frequency-tuning range and oscillation amplitude can be overestimated by over 20% and more than a factor 2, respectively, without inclusion of the NQS effect.

A data analysis technology of atomic force microscopy for atomically flat silicon surfaces has been developed. Atomically flat silicon surfaces composed of atomic terraces and steps are obtained on (100) orientation 200 mm diameter wafers by annealing in pure argon ambience at 1,200 for 30 minutes. Atomically flat silicon surfaces are lead to improve the MOS inversion layer mobility and current drivability of MOSFETs and to decrease the fluctuations in electrical characteristics of MOSFETs. It is important to realize the technology that evaluates the flatness and the uniformity of atomically flat silicon surfaces. The off direction angle is calculated by using two straight edge lines selected from measurement data. And the off angle is calculated from average atomic terrace width under assumption that height difference between neighboring terraces is equal to the step height, 0.135 nm, of (100) silicon surface. The analyzing of flatness of each terrace can be realized by converting the measurement data using the off direction angle and the off angle. And, the average roughness of each terrace is about 0.017-0.023 nm. Therefore, the roughness and the uniformity of each terrace can be evaluated by this proposed technique.

Almost all the existing secret sharing schemes are based on a single dealer. Maybe in some situations, the secret needs to be maintained by multiple dealers. In this paper, we proposed a novel secret sharing scheme based on the multi-dealer by means of Shamir's threshold scheme and T. Okamoto and S. Uchiyama's public-key cryptosystem. Multiple dealers can commonly maintain the secret and the secret can be dynamically renewed by any dealer. Meanwhile, the reusable secret shadows just needs to be distributed only once. In the secret updated phase, the dealer just needs to publish a little public information instead of redistributing the new secret shadows. Its security is based on the security of Shamir's threshold scheme and the intractability of factoring problem and discrete logarithm problem.

Frequency-domain equalization (FDE) has been studied for suppressing inter-symbol interference (ISI) due to frequency selective fading in single carrier systems. When a high-mobility terminal is assumed in the system, channel transition within an FDE block cannot be ignored. The ISI reduction performance of FDE degrades since the cyclicity of the channel matrix is lost. To solve this problem, a method of dividing the received data block into multiple subblocks has been proposed, where pseudo cyclic prefix (CP) processing is introduced to realize periodicity in each subblock. In this method, the performance is degraded by the inherently-inaccurate pseudo CP. In this paper, we study the application of frequency-domain turbo equalization (FDTE) to subblock processing for improving the accuracy of pseudo CP. The simulation results show that FDTE with subblock processing yields remarkable performance improvements.

In the Evolved UTRA (UMTS Terrestrial Radio Access) downlink, Orthogonal Frequency Division Multiplexing (OFDM) based radio access was adopted because of its inherent immunity to multipath interference and flexible accommodation of different spectrum arrangements. This paper presents the optimum adaptive modulation and channel coding (AMC) scheme when resource blocks (RBs) is simultaneously assigned to the same user when frequency and time domain channel-dependent scheduling is assumed in the downlink OFDMA radio access with single-antenna transmission. We start by presenting selection methods for the modulation and coding scheme (MCS) employing mutual information both for RB-common and RB-dependent modulation schemes. Simulation results show that, irrespective of the application of power adaptation to RB-dependent modulation, the improvement in the achievable throughput of the RB-dependent modulation scheme compared to that for the RB-common modulation scheme is slight, i.e., 4 to 5%. In addition, the number of required control signaling bits in the RB-dependent modulation scheme becomes greater than that for the RB-common modulation scheme. Therefore, we conclude that the RB-common modulation and channel coding rate scheme is preferred, when multiple RBs of the same coded stream are assigned to one user in the case of single-antenna transmission.

The 3GPP LTE-Advanced has been attracting much attention recently, where the channel bandwidth would be beyond the maximum bandwidth of LTE, 20 MHz. In LTE, single carrier-frequency division multiple access (SC-FDMA) was accepted as the uplink access scheme due to its advantage of very low cubic metric (CM). For LTE-A wideband transmission, multicarrier access would be more effective than single carrier access to make use of multi-user diversity and can maintain the physical channel structure of LTE, where the control information is transmitted on the edges of each 20 MHz. In this paper, we discuss the access schemes in bandwidth under 20 MHz as well as over 20 MHz. In the case of bandwidth under 20 MHz, we propose the access schemes allowing discontinuous resource allocation to enhance average throughput while maintaining cell-edge user throughput, that is, DFT-spread-OFDM with spectrum division control (SDC) and adaptive selection of SC-FDMA and OFDM (SC+OFDM). The number of discontinuous spectrums is denoted as spectrum division (SD). For DFT-S-OFDM, we define a parameter max SD as the upper limit of SD. We evaluate our proposed schemes in bandwidth under 20 MHz and find that SC+OFDM as well as SDC with common max SD or UE-specific max SD can improve average throughput while their cell-edge user throughput can approach that of SC-FDMA. In the case of bandwidth over 20 MHz, we consider key factors to decide a feasible access scheme for aggregating several 20 MHz-wide bands.

A lexicon-driven segmentation-recognition scheme on Bangla handwritten city-name recognition is proposed for Indian postal automation. In the proposed scheme, at first, binarization of the input document is done and then to take care of slanted handwriting of different individuals a slant correction technique is performed. Next, due to the script characteristics of Bangla, a water reservoir concept is applied to pre-segment the slant corrected city-names into possible primitive components (characters or its parts). Pre-segmented components of a city-name are then merged into possible characters to get the best city-name using the lexicon information. In order to merge these primitive components into characters and to find optimum character segmentation, dynamic programming (DP) is applied using total likelihood of the characters of a city-name as an objective function. To compute the likelihood of a character, Modified Quadratic Discriminant Function (MQDF) is used. The features used in the MQDF are mainly based on the directional features of the contour points of the components. We tested our system on 84 different Bangla city-names and 94.08% accuracy was obtained from the proposed system.

Dimensionality reduction is one of the important preprocessing steps in practical pattern recognition. SEmi-supervised Local Fisher discriminant analysis (SELF)--which is a semi-supervised and local extension of Fisher discriminant analysis--was shown to work excellently in experiments. However, when data dimensionality is very high, a naive use of SELF is prohibitive due to high computational costs and large memory requirement. In this paper, we introduce computational tricks for making SELF applicable to large-scale problems.

A 150 MS/s 10-bit MOS-inverter-based subranging analog-to-digital converter (ADC) dedicated to a high-speed low-power application is presented in this paper. A new time constant reduction technique is proposed in the multi-stage preamplifier design which aims to further increase the speed of the coarse ADC. A synchronized switch is introduced to minimize the sample-time mismatch in the interleaved architecture of fine ADCs. An internal pipelined scheme incorporating the double sampling and interleaving techniques in fine ADCs allows the ADC sample input signal to run on a consecutive clock, thus maximizing the throughput. The prototype ADC achieves 52 dB SNDR for a 10 MHz input frequency at 150 MS/s. Without calibration, the measured differential nonlinearity (DNL) is 0.5 LSB, while the integral nonlinearity (INL) is 0.9 LSB. The CMOS ADC is fabricated in a 0.35 µm CMOS technology, with an active area of 2.7 mm2, consuming only 178 mW from a single 3 V supply. Comparing technology normalized figure-of-merits, it achieves better power-speed efficiency than other similar types of ADCs.

This paper proposes a new selective encryption scheme and a key management scheme for layered access control of H.264/SVC. This scheme encrypts three domains in hierarchical layers using different keys: intra prediction modes, motion vector difference values and sign bits of texture data. The proposed scheme offers low computational complexity, low bit-overhead, and format compliance by utilizing the H.264/SVC structure. It provides a high encryption efficiency by encrypting domains selectively, according to each layer type in the enhancement-layer. It also provides confidentiality and implicit authentication using keys derived in the proposed key management scheme for encryption. Simulation results show the effectiveness of the proposed scheme.

Probabilistic model checking is an emerging verification technology for probabilistic analysis. Its use has been started not only in computer science but also in interdisciplinary fields. In this paper, we show that probabilistic model checking allows one to analyze the magnetic behaviors of the one-dimensional Ising model, which describes physical phenomena of magnets. The Ising model consists of elementary objects called spins and its dynamics is often represented as the Metropolis method. To analyze the Ising model with probabilistic model checking, we build Discrete Time Markov Chain (DTMC) models that represent the behavior of the Ising model. Two representative physical quantities, i.e., energy and magnetization, are focused on. To assess these quantities using model checking, we devise formulas in Probabilistic real time Computation Tree Logic (PCTL) that represent the quantities. To demonstrate the feasibility of the proposed approach, we show the results of an experiment using the PRISM model checker.

In this paper, we propose a simple nonlinear system which consists of a chaotic spiking oscillator and a controlling circuit to stabilize unknown periodic orbits. Our proposed system generates various stabilized unknown Unstable Periodic Orbits which are embedded on the chaotic attractor of the original chaotic spiking oscillator. The proposed system is simple and exhibits various bifurcation phenomena. The dynamics of the system is governed by 1-D piecewise linear return map. Therefore, the rigorous analysis can be performed. We provide conditions for stability and almost complete analysis for bifurcation and co-existence phenomena by using the 1-D return map. An implementation example of the controlled chaotic spiking oscillator is provided to confirm some theoretical results.

This paper experimentally investigates the effect of frequency error compensation provided by demodulation automatic frequency control (AFC) using the Synchronization Channel (SCH) in downlink OFDM radio access. The implemented OFDM receiver compensates for the frequency error caused by the difference in frequency between a base station (BS) and a user equipment (UE) using a time-division multiplexed SCH signal and that caused by the Doppler shift generated by the mobility of a user using reference signals with staggered multiplexing. Experimental results show that even when the standard oscillator frequency of the UE cannot be made to track the more accurate frequency of a BS, demodulation AFC can suppress the residual frequency error to a sufficiently low level, i.e., within 0.3 ppm, using the SCH so that the degradation in the block error rate of the physical broadcast channel control signals is slight, i.e., within approximately 0.1 dB, with respect to the case without frequency error for speeds greater than 350 km/h.

In this paper, we study and propose an inter-cell co-channel interference (CCI) mitigation method for pilot signals using cyclic shift Zadoff-Chu (CS-ZC) sequences for SC-FDMA-based uplink without tight scheduler coordination among cells. Firstly, we investigate the issue of severe detection performance degradation created by the lack of orthogonality among the pilot signals without alignment of the allocated frequency resource positions among cells when using the conventional CS-ZC sequences generation scheme. Secondly, we identify the primary factor causing the issue. Thirdly, we propose a frequency-dependent CS-ZC sequence generation scheme by allocating the same spectrum elements of the ZC sequence to the overlapped subcarriers among cells to mitigate the inter-cell CCI of the pilot signals without alignment of the frequency resource positions among cells. Finally, we confirm the validity of the proposal using uplink data BLER evaluation under a multipath fading condition by computer simulation compared to the conventional method, and show that the proposal achieves around 0.9 dB and 0.6 dB better performance at 10% BLER than the conventional method for 1 RB and 2 RBs frequency offsets in 3 RBs transmission bandwidth, respectively.

In the OTS/CafeOBJ method, software specifications are described in CafeOBJ executable formal specification language, and verification is done by giving scripts to the CafeOBJ system. The script is called a proof score. In this study, we propose a test case generator from an OTS/CafeOBJ specification together with a proof score. Our test case generator gives test cases by analyzing the proof score. The test cases are used to test whether an implementation satisfies the specification and the property verified by the proof score. Since a proof score involves important information for verifying a property, the generated test cases are also expected to be suitable to test the property.

The holding voltage of high-voltage devices under the snapback breakdown condition has been known to be much smaller than the power supply voltage. Such characteristics cause high-voltage ICs to be susceptible to the transient latch-up failure in the practical system applications, especially when these devices are used as the ESD power clamp circuit. A new latchup-free design of the ESD power clamp circuit with stacked-bipolar devices is proposed and successfully verified in a 0.35 µm BCD (Bipolar-CMOS-DMOS) process to achieve the desired ESD level. The total holding voltage of the stacked-bipolar devices in the snapback breakdown condition can be larger than the power supply voltage.

Finding an appropriate data transformation between two schemas has been an important problem. In this paper, assuming that an update script between original and updated DTDs is available, we consider inferring a transformation algorithm from the original DTD and the update script such that the algorithm transforms each document valid against the original DTD into a document valid against the updated DTD. We first show a transformation algorithm inferred from a DTD and an update script. We next show a sufficient condition under which the transformation algorithm inferred from a DTD d and an update script is unambiguous, i.e., for any document t valid against d, elements to be deleted/inserted can unambiguously be determined. Finally, we show a polynomial-time algorithm for testing the sufficient condition.

An on-chip power supply noise canceller with higher voltage supply and switching transistor is proposed and the effectiveness of the canceller is experimentally verified. The noise canceller is effective for nano-second order noise caused by circuit wakeup or step increase of frequency in frequency hopping. The principle of the noise canceller is to reduce the current flowing through the supply line of VDD by injecting additional current from the higher voltage supply, so that the voltage drop across the VDD supply line is reduced. As additional current flow from higher supply, switching transistor has to be turned off not to increase the power consumption. With turn-off time of 2L/R, this current can be turned off without inducting another droop due to the increase of current flowing through the power supply line. The measurement shows the canceller reduces 68% of the noise with load circuit equivalent to 530 k logic gates in 90-nm CMOS with 9% wire overhead, 1.5% area overhead, and 3% power overhead at 50 k wake-ups/s. Compared to passive noise reduction, proposed noise canceller reduces power supply noise by 64% without wire overhead and to achieve same noise reduction with passive method, 77 times more C or 45 times less L is required. Too large switching transistor results in saturated noise reduction effect and higher power consumption. A rule-of-thumb is to set the on-resistance to supply 100% of load current when turned-on.

A scheduling algorithm aims to minimize the overall execution time of the program by properly allocating and arranging the execution order of the tasks on the core processors such that the precedence constraints among the tasks are preserved. In this paper, we present a new scheduling algorithm by using geometry analysis of the Task Precedence Graph (TPG) based on A* search technique and uses a computationally efficient cost function for guiding the search with reduced complexity and pruning techniques to produce an optimal solution for the allocation/scheduling problem of a parallel application to parallel and multiprocessor architecture. The main goal of this work is to significantly reduce the search space and achieve the optimality or near optimal solution. We implemented the algorithm on general task graph problems that are processed on most of related search work and obtain the optimal scheduling with a small number of states. The proposed algorithm reduced the exhaustive search by at least 50% of search space. The viability and potential of the proposed algorithm is demonstrated by an illustrative example.

A new hierarchical isosurface reconstruction scheme from a set of tomographic cross sectional images is presented. From the input data, we construct a hierarchy of volume, called the volume pyramid, based on a 3D dilation filter. After extracting the base mesh from the volume at the coarsest level by the cell-boundary method, we iteratively fit the mesh to the isopoints representing the actual isosurface of the volume. The SWIS (Shrink-wrapped isosurface) algorithm is adopted in this process, and a mesh subdivision scheme is utilized to reconstruct fine detail of the isosurface. According to experiments, our method is proved to produce a hierarchical isosurface which can be utilized by various multiresolution algorithms such as interactive visualization and progressive transmission.