In this paper, we propose a multi-stage hybrid scheduling scheme for codebook-based precoding systems, which provides a framework to apply different scheduling criterions at different scheduling stages for selecting user equipment (UEs). Numerical simulation results show that the proposed scheme effectively fills the performance gap between maximum carrier-to-interference (Max C/I) power ratio and Proportional Fairness (PF) methods, and provides an important means at the media access control (MAC) layer to lever between aggregate cellular throughput and geometry-specific per-user fairness, in order to meet the requirements of more precise quality of service (QoS) provision for future mobile communication systems.

The very fast transients of micro-gap discharges driven by low voltage electrostatic discharging (ESDs) are investigated in the time domain. We previously developed a 12 GHz wideband measurement setup consisting of a distributed constant line system, however the observed transients due to micro-gap discharges had very fast rise times of 34 ps or less, which reached the limitation on our system. In this paper, we proposed a method for estimating wideband transients beyond the measurement limit by using the transmission loss of a high performance coaxial transmission line. The proposed method is validated by estimating an impulsive voltage waveform with rise/fall time of 16 ps from the waveform measured through a semi-rigid coaxial cable with a length of 10 m.

Channel scanning is an important aspect of seamless handovers since it is required in order to find a target point of attachment (PoA). However, channel scanning in single radio devices may cause severe service disruptions with the current PoA so that the provided QoS will be further degraded during a handover. In this letter, we propose a dynamic channel scanning algorithm that supports QoS. Simulation results show that the proposed mechanism reduces the service disruptions and provides the desired QoS to users during the scanning period.

Considering digital multimedia broadcasting (DMB) with reverse channels, we propose a novel scheduling algorithm for data dissemination as a combination of push and pull schemes. After collecting statistics of requests from clients, the server partitions the data items into hot and cold sets, according to the number of requests. The broadcast server schedules and broadcasts hot items periodically based on a push algorithm. On an empty slot between hot items scheduled, the server broadcasts a cold item based on an on-demand pull mechanism. Simulations show that our proposed algorithm achieves high successful response ratio with a response time small enough to be practical.

We address the problem of multiuser co-channel interference scheduling in multicell interference-limited networks. Our target is to optimize the network capacity under the SIR-balanced power control policy. Since it's difficult to optimize the original problem, we derive a new problem which maximizes the lower bound of the network capacity. Based on the analysis of this new problem, we propose an interference matched scheduling algorithm. This algorithm considers the caused co-channel interference and the channel conditions to schedule the "matched" users at the same time. We prove that this interference matched scheduling algorithm optimizes the lower bound of the network capacity for any arbitrary numbers of cells and users. Moreover, this scheduling method is low-complexity and can be implemented in a fully distributed fashion. Simulation results reveal that the performance of the proposed algorithm achieves near optimal capacity, even though it does not optimize the network capacity directly. Finally, the proposed algorithm holds a great gain over formerly proposed round robin and power matched scheduling method, especially when the scale of the network is large.

This paper presents a robust reduced order observer for a class of Lipschitz nonlinear systems with external disturbance. Sufficient conditions on the existence of the proposed observer are characterized by linear matrix inequalities. It is also shown that the proposed observer design can reduce the effect on the estimation error of external disturbance up to the prescribed level. Finally, a numerical example is provided to verify the proposed design method.

A high-speed and ultra-low-voltage divide-by-4/5 counter with dynamic floating input D flip-flop (DFIDFF) is presented in this paper. The proposed DFIDFF and control logic gates are merged to reduce effective capacitance of internal and external nodes, and increase the operating speed of divide-by-4/5 counter. The proposed divide-by-4/5 counter is fabricated in a 0.13-µm CMOS process. The measured maximum operating frequency and power consumption of the counter are 600 MHz and 8.35 µW at a 0.5 V supply voltage. HSPICE simulations demonstrate that the proposed counter (divide-by-4) reduces power-delay product (PDP) by 37%, 71%, and 57% from those of the TGFF counter, Yang's counter [1], and the E-TSPC counter [2], respectively.

In the deep-submicron era, interconnect delays are becoming one of the most important factors that can affect performance in the VLSI design. Many state-of-the-art research in high level synthesis try to consider the effect of interconnect delays. These research indeed achieve better performance compared with traditional ones which ignore interconnect delays. When applications contain large loops, however, there is still much room to improve the performance by exploiting the parallelism. In this paper, we, for the first time, propose a method to utilize pipelining techniques and take interconnect delays into account together so as to improve the quality of high level synthesis. The proposed method has the following two characteristics: 1) it separates the consideration of interconnect delay from computation delay, and allows concurrent data transfer and computation; 2) it belongs to modulo scheduling framework, in the sense that all iterations have identical schedules, and are initiated periodically. We evaluate our method from two different points of view. Firstly, we compare our method with an existing interconnect-aware high level synthesis that does not utilize pipelining techniques, and the experimental results show that our method can obtain about 3.4 times performance improvement on average. Secondly, we compare our method with an existing pipeline synthesis that does not consider interconnect delays, and the results show that our method can obtain about 1.5 times performance improvement on average. In addition, we also evaluate our proposed architecture and the experimental results demonstrate that it is better than existing architecture in [1].

The inflection S-shaped software reliability growth model (SRGM) proposed by Ohba (1984) is one of the well- known SRGMs. This paper deals with the optimal software release problem with regard to the expected software cost under this model based on the Bayesian approach. To reflect the effect of the learning experience for the updated software system, we consider several improvement factors to adjust the values of parameters characterizing the inflection S-shaped SRGM. Appropriate prior distributions are assumed for such factors and the expected total software cost is formulated. The optimal release time is shown to be finite and uniquely determined. Because of the flexibility of prior distributions, the proposed Bayesian methods may be applied in many different situations. Numerical results are presented on the basis of the real data.

Sanitizable signatures allow sanitizers to delete some pre-determined parts of a signed document without invalidating the signature. While ordinary sanitizable signatures allow verifiers to know how many subdocuments have been sanitized, invisibly sanitizable signatures do not leave any clue to the sanitized subdocuments; verifiers do not know whether or not sanitizing has been performed. Previous invisibly sanitizable signature scheme was constructed based on aggregate signature with pairings. In this article, we present the first invisibly sanitizable signature without using pairings. Our proposed scheme is secure under the RSA assumption.

A parallel multiplexing scheduling (PMS) scheme is proposed for distributed antenna systems (DAS), which greatly improves average system throughput due to multi-user diversity and multi-user multiplexing. However, PMS has poor fairness because of the use of the "best channel selection" criteria in the scheduler. Thus we present a parallel proportional fair scheduling (PPFS) scheme, which combines PMS with proportional fair scheduling (PFS) to achieve a tradeoff between average throughput and fairness. In PPFS, the "relative signal to noise ratio (SNR)" is employed as a metric to select the user instead of the "relative throughput" in the original PFS. And only partial channel state information (CSI) is fed back to the base station (BS) in PPFS. Moreover, there are multiple users selected to transmit simultaneously at each slot in PPFS, while only one user occupies all channel resources at each slot in PFS. Consequently, PPFS improves fairness performance of PMS greatly with a relatively small loss of average throughput compared to PFS.

Recent progress in scaled CMOS technologies can enhance signal bandwidth and clock frequency of analog-digital mixed VLSIs. However, the inevitable reduction of supply voltage causes a signal voltage mismatch between a non-scaled analog chip and a scaled A-D mixed chip. To overcome this problem, we present a Delta-Amplifier (DeltAMP) which can handle larger signal amplitude than the supply voltage. DeltaAMP folds a delta signal of an input voltage within a window using a virtual ground amplifier, modulation switches and comparators. For reconstruction of the folded delta signal to the ordinal signal, Analog-Time-Digital conversion (ATD) was also proposed, in which pulse-width analog information obtained at the comparators in DeltAMP was converted to a digital signal by counting. A test chip of DeltAMP with ATD was designed and fabricated using a 90 nm CMOS technology. A 2 Vpp input voltage range and 50 µW power consumption were achieved by the measurements with a 0.5 V supply. High accuracy of 62 dB SNR was obtained at signal bandwidth of 120 kHz.

To mitigate the asynchronous ICI (Inter-Cell Interference), SCM (Spatial Covariance Matrix) of the asynchronous ICI plus background noise should be accurately estimated for MIMO-OFDMA (Multiple-input Multiple-output-Orthogonal Frequency Division Multiple Access) system. Generally, it is assumed that the SCM of the asynchronous ICI plus background noise is estimated by using training symbols. However, it is difficult to measure the interference statistics for a long time and considering that training symbols are not appropriate for OFDMA system such as LTE (3GPP Long Term Evolution). Therefore, noise reduction method is required to improve the estimation accuracy. Although the conventional time-domain low-pass type weighting method can be effective for noise reduction, it causes significant estimation error due to the spectral leakage in practical OFDM system. Therefore, we propose a time-domain sinc type weighing method which can not only reduce noise effectively minimizing estimation error caused by the spectral leakage but also can be implemented using frequency-domain weighted moving average filter easily. We also consider the iterative CFR (Channel Frequency Response) and SCM estimation method which can effectively reduce the estimation error of both CFR and SCM, and improve the performance for LTE system. By using computer simulation, we show that the proposed method can provide up to 2.5 dB SIR (Signal to Interference Ratio) gain compared with the conventional method, and verify that the proposed method is attractive and suitable for implementation with stable operation.

In this paper, we analyze the extended real-time Polling Service (ertPS) algorithm in IEEE 802.16e systems, which is designed to support Voice-over-Internet-Protocol (VoIP) services with data packets of various sizes and silence suppression. The analysis uses a two-dimensional Markov Chain, where the grant size and the voice packet state are considered, and an approximation formula for the total throughput in the ertPS algorithm is derived. Next, to improve the performance of the ertPS algorithm, we propose an enhanced uplink resource allocation algorithm, called the e 2rtPS algorithm, for VoIP services in IEEE 802.16e systems. The e 2rtPS algorithm considers the queue status information and tries to alleviate the queue congestion as soon as possible by using remaining network resources. Numerical results are provided to show the accuracy of the approximation analysis for the ertPS algorithm and to verify the effectiveness of the e 2rtPS algorithm.

This paper develops a complete architecture for constant false alarm rate (CFAR) detection based on a goodness-of-fit (GOF) test. This architecture begins with a logarithmic amplifier, which transforms the background distribution, whether Weibull or lognormal into a location-scale (LS) one, some relevant properties of which are exploited to ensure CFAR. A GOF test is adopted at last to decide whether the samples under test belong to the background or are abnormal given the background and so should be declared to be a target of interest. The performance of this new CFAR scheme is investigated both in homogeneous and multiple interfering targets environment.

In wireless cellular networks, streaming of continuous media (with strict QoS requirements) over wireless links is challenging due to their inherent unreliability characterized by location-dependent, bursty errors. To address this challenge, we present a two-step scheduling algorithm for a base station to provide streaming of continuous media to wireless clients over the error-prone wireless links. The proposed algorithm is capable of minimizing the packet loss rate of individual clients in the presence of error bursts, by transmitting packets in the round-robin manner and also adopting a mechanism for channel prediction and swapping.

A delay-oriented packet scheduling scheme is proposed for downlink OFDMA networks with heterogeneous delay requirements. Using a novel packet utility concept, the proposed algorithm can exploit diversity from traffic characteristics and requirements to improve delay performance for delay sensitive traffics. Besides, the proposal also shows good ability in balancing fairness and efficiency. Simulation results show that our proposal outperforms existing delay-oriented scheduling schemes in terms of both delay performance and spectrum efficiency.

A novel DC-to-960 MHz impulse radio ultra-wideband (IR-UWB) transceiver based on threshold detection technique is developed. It features a digital pulse-shaping transmitter, a DC power-free pulse discriminator and an error-recovery phase-frequency detector. The developed transceiver in 90 nm CMOS achieves the lowest energy consumption of 2.2 pJ/bit transmitter and 1.9 pJ/bit receiver at 100 Mbps in the UWB transceivers.

We study the interaction of TCP and the proportional fair scheduling algorithm in wireless networks. We show that the additive increase and multiplicative decrease algorithm of TCP can favor bad channel users, which results in inefficient use of radio resources. To remedy the problem, a proportional queue management scheme is proposed. The effectiveness of the algorithm is shown by simulations.

In this paper, we have shown a major element occupying the large portion of software communications architecture (SCA)-based software defined radio (SDR) handheld embedded system and an important feature for implementing a high speed broadband radio to an SCA waveform through a couple of experiments. First, this paper identifies the main items possessing the large portion of SCA-based SDR handheld embedded system by the experiment on the target platform which is similar to a commercial mobile handheld system. Both the world interoperabillity for microwave access (WiMAX) and high speed downlink packet access (HSDPA) waveform software packages are used as an SCA waveform application. This paper also presents the results of the relative binary size distribution of SCA software resources for looking for the major elements making an SCA-based SDR handheld embedded system heavier. As a result, when focusing on the relative weight portion of SCA core framework (CF), the SCA CF takes 16% up and others have 84% out of the whole binary size distribution of SCA software resources. The results of the experiment give us notice that the weight portion of SCA CF is minor and compatible with the overall software binary size needs of an SCA-based SDR handheld embedded system, on the other hand, the practical problem on the lightweight is in a common object request broker architecture (CORBA) and extensible markup language (XML) parser resources. Second, this paper describes an important feature for implementing a high speed broadband radio to an SCA waveform and presents the performance evaluation results of the SCA port communication on both power PC (PPC) 405 and x86 processor platforms. The PPC 405 platform, which is similar to a commercial mobile handset, takes the value of average round trip time (RTT) with a maximum of thirty six millisecond. The x86 platform, however, which is analogous to a server platform, maintains stable micro-second resolution. From our experiments, we observe that rapid SCA port communication, sufficiently less than the frame length of high-speed broadband radios, should be provided for serving those radio services in a commercial handheld system based on the SCA.