This paper introduces the ensemble Monte Carlo (EMC) method to study the time behavior of single-electron-based logic gates. The method is then applied to a buffer-inverter gate and the results are examined. An analytical model for time behavior at the low-temperature limit is then introduced and its results are compared with those of the EMC. Finally, a compact model for the delay-error behavior of the buffer gate is introduced.

In this letter, we propose a Partially Observable Markov Decision Process (POMDP) based Distributed Adaptive Opportunistic Spectrum Access (DA-OSA) Strategy for Cognitive Ad Hoc Networks (CAHNs). In each slot, the source and destination choose a set of channels to sense and then decide the transmission channels based on the sensing results. In order to maximize the throughput for each link, we use the theories of sequential decision and optimal stopping to determine the optimal sensing channel set. Moreover, we also establish the myopic policy and exploit the monotonicity of the reward function that we use, which can be used to reduce the complexity of the sequential decision.

Although a large number of query processing algorithms in spatial network database (SNDB) have been studied, there exists little research on route-based queries. Since moving objects move only in spatial networks, route-based queries, like in-route nearest neighbor (IRNN), are essential for Location-based Service (LBS) and Telematics applications. However, the existing IRNN query processing algorithm has a problem in that it does not consider time and space constraints. Therefore, we, in this paper, propose IRNN query processing algorithms which take both time and space constraints into consideration. Finally, we show the effectiveness of our IRNN query processing algorithms considering time and space constraints by comparing them with the existing IRNN algorithm.

We introduce a “generalized small inverse problem (GSIP)” and present an algorithm for solving this problem. GSIP is formulated as finding small solutions of f(x0, x1, ..., xn)=x0 h(x1, ..., xn)+C=0 (mod ; M) for an n-variate polynomial h, non-zero integers C and M. Our algorithm is based on lattice-based Coppersmith technique. We provide a strategy for construction of a lattice basis for solving f=0, which is systematically transformed from a lattice basis for solving h=0. Then, we derive an upper bound such that the target problem can be solved in polynomial time in log M in an explicit form. Since GSIPs include some RSA-related problems, our algorithm is applicable to them. For example, the small key attacks by Boneh and Durfee are re-found automatically.

Digital RF solutions have been shown to be advantageous in various design aspects, such as accurate modeling, design reuse, and scaling when migrating to the next CMOS process node. Consequently, the majority of new low-cost and feature cell phones are now based on this approach. However, another equally important aspect of this approach to wireless transceiver SoC design, which is instrumental in allowing fast and low-cost productization, is in creating the inherent capability to assess performance and allow for low-cost built-in calibration and compensation, as well as characterization and final-testing. These internal capabilities can often rely solely on the SoCs existing processing resources, representing a zero cost adder, requiring only the development of the appropriate algorithms. This paper presents various examples of built-in measurements that have been demonstrated in wireless transceivers offered by Texas Instruments in recent years, based on the digital-RF processor (DRPTM) technology, and highlights the importance of the various types presented; built-in self-calibration and compensation, built-in self-characterization, and built-in self-testing (BiST). The accompanying statistical approach to the design and productization of such products is also discussed, and fundamental terms related with these, such as 'soft specifications', are defined.

Progress of roles and schemes of calibration techniques in data converters are reviewed. Correction techniques of matching error and nonlinearity in analog circuits have been developed by digital assist using high-density and low-power digital circuits. The roles of the calibration are not only to improve accuracy but also to reduce power dissipation and chip area. Among various calibration schemes, the background calibration has significant advantages to achieve robustness to fast ambient change. Firstly the nonlinearity calibrations for pipeline ADCs are reviewed. They have required new solutions for redundancy of the circuits, an error estimation algorithm and reference signals. Currently utilizing the calibration techniques, the performance of 100 Msps and 12 bit has been achieved with 10 mW power dissipation. Secondly the background calibrations of matching error in flash ADC and DAC with error feedback to the analog circuits are described. The flash ADC utilizes the comparator offset correction with successive approximation algorithm. The DAC adopts a self current matching scheme with an analog memory. Measured dissipation power of the ADC is 0.38 mW at 300 MHz clock. Effects of the background calibration to suppress crosstalk noise are also discussed.

This letter presents a new automatic musical genre classification method based on an informative song-level representation, in which the mutual information between the feature and the genre label is maximized. By efficiently combining distance-based indexing with informative features, the proposed method represents a song as one vector instead of complex statistical models. Experiments on an audio genre DB show that the proposed method can achieve the classification accuracy comparable or superior to the state-of-the-art results.

We study the transmission techniques in orthogonal frequency division multiplexing (OFDM) systems with imperfect channel state information at the transmitter (CSIT). We focus on the issue of utilizing the available CSIT by a single forward error control (FEC) code. We first analyze the system performance for the ideal coding case. We then develop a simple but efficient scheme for the practical coding case, which is based on joint FEC coding and linear precoding at the transmitter and iterative linear minimum-mean-square-error (LMMSE) detection at the receiver. Numerical results show that significant performances gains can be achieved by the proposed scheme.

Thus far, there have been many reports and publications on the algorithm for the efficient generation of a circle or an ellipse by the parametric method. In this parametric method, we compute a trigonometric function only at the time of setting the initial condition for generating graphics incrementally using the recurrence formula consisting of the arithmetical operations of addition, subtraction, and multiplication in the main loop. This means that the key to the faster generation of a circle or an ellipse is to reduce the number of multiplication operations. In the conventional methods, the numbers of multiplication operations required to generate a single point each for a circle and an ellipse are three and four, respectively. However, in this paper, we propose a method that makes it possible to generate a slanted ellipse by performing only two multiplication operations per point. The key to this is to use simultaneous recurrences. The proposed method allows a simpler initial setup than any of the conventional methods, thus performing the computation more efficiently. In addition, the new method proposed here causes no theoretical errors, with the rounding error being similar to or less than that of any conventional method.

A stacked structure consisting of ∼ 1 nm-thick MgO and ∼ 4 nm-thick HfO2 was formed on thermally grown SiO2/Si(100) by MOCVD using dipivaloymethanato (DPM) precursors, and the influences of N2 anneal on interfacial reaction and defect state density in this stacked structure were examined. The chemical bonding features of Mg atom were evaluated by using an Auger parameter independently of positive charge-up during XPS measurements. With Mg incorporation into HfO2, a slight decrease in the oxidation number of Mg was detectable. The result suggests that Mg atoms are incorporated preferentially near oxygen vacancies in the HfO2, which can be responsible for a reduction of the flat band voltage shifts observed from C-V characteristics.

Gate delay evaluation is always a vital concern for high-performance digital VLSI designs. As the feature size of VLSIs decreases to the nano-meter region, the work to obtain an accurate gate delay value becomes more difficult and time consuming than ever. The conventional methods usually use iterative algorithms to ensure the accuracy of the effective capacitance Ceff, which is usually used to compute the gate delay with interconnect loads and to capture the output signal shape of the real gate response. Accordingly, the efficiency is sacrificed. In this paper, an accurate and efficient approach is proposed for gate delay estimation. With the linear relationship of gate output time points and Ceff, a polynomial approximation is used to make the nonlinear effective capacitance equation be solved without iterative method. Compared to the conventional methods, the proposed method improves the efficiency of gate delay calculation. Meanwhile, experimental results show that the proposed method is in good agreement with SPICE results and the average error is 2.8%.

Frequency-domain equalization (FDE) based on minimum mean square error (MMSE) is considered as a promising equalization technique for a broadband single-carrier (SC) transmission. When a square-root Nyquist filter is used at a transmitter and receiver to limit the signal bandwidth, the presence of timing offset produces the inter-symbol interference (ISI) and degrades the bit error rate (BER) performance using MMSE-FDE. In this paper, we discuss the mechanism of the BER performance degradation in the presence of timing offset. Then, we propose joint MMSE-FDE & spectrum combining which can make use the excess bandwidth introduced by transmit filter to achieve larger frequency diversity gain while suppressing the negative effect of the timing offset.

Due to the reuse factor reduction, the attendant increase in co-channel interference (CCI) becomes the limiting factor in the performance of the orthogonal frequency division multiplexing (OFDM) based cellular systems. In the previous work, we proposed the least mean square-blind joint maximum likelihood sequence estimation (LMS-BJMLSE) algorithm, which is effective for CCI cancellation in OFDM systems with only one receive antenna. However, LMS-BJMLSE requires a long training sequence (TS) for channel estimation, which reduces the transmission efficiency. In this paper, we propose a subcarrier identification and interpolation algorithm, in which the subcarriers are divided into groups based on the coherence bandwidth, and the slowest converging subcarrier in each group is identified by exploiting the correlation between the mean-square error (MSE) produced by LMS and the mean-square deviation (MSD) of the desired channel estimate. The identified poor channel estimate is replaced by the interpolation result using the adjacent subcarriers' channel estimates. Simulation results demonstrate that the proposed algorithm can reduce the required training sequence dramatically for both the cases of single interference and dual interference. We also generalize LMS-BJMLSE from single antenna to receiver diversity, which is shown to provide a huge improvement.

Wireless body area network for sensing and monitoring of vital signs is the one of most rapidly growing wireless communication system and Ultra Wide-Band (UWB) is a favorable technology for wearable medical sensors. The wireless body area networks promise to revolutionize health monitoring. However, designers of such systems face a number of challenging tasks. Efficient transceiver design requires in-depth understanding of the propagation media which in this case is the human body surface. The human body is not an ideal medium for RF wave transmission; it is partially conductive and consists of materials of different dielectric constants, thickness and characteristic impedance. The results of the few measurement experiments in recent publications point to varying conclusions in the derived parameters of the channel model. As obtaining large amount of data for many scenarios and use-cases is difficult for this channel, a detailed simulation platform can be extremely beneficial in highlighting the propagation behavior of the body surface and determining the best scenarios for limited physical measurements. In this paper, an immersive visualization environment is presented, which is used as a scientific instrument that gives us the ability to observe three-dimensional RF propagation from wearable medical sensors around a human body. We have used this virtual environment to further study UWB channels over the surface of a human body. Parameters of a simple statistical path-loss model and their sensitivity to frequency and the location of the sensors on the body are discussed.

We have demonstrated high mobility MOS transistors on high quality epitaxial SiGe films selectively grown on Si (100) substrates. The hole mobility enhancement afforded intrinsically by the SiGe channel (60%) is further increased by an optimized Si cap (40%) process, resulting in a combined ∼100% enhancement over Si channels. Surface orientation, channel direction, and uniaxial strain technologies for SiGe channels CMOS further enhance transistor performances. On a (110) surface, the hole mobility of SiGe pMOS is greater on a (110) surface than on a (100) surface. Both electron and hole mobility on SiGe (110) surfaces are further enhanced in a <110> channel direction with appropriate uniaxial channel strain. We finally address low drive current issue of Ge-based nMOSFET. The poor electron transport property is primarily attributed to the intrinsically low density of state and high conductivity effective masses. Results are supported by interface trap density (Dit) and specific contact resistivity (ρc).

Admission control is a procedure to guarantee a given level of Quality of Service (QoS) by accepting or rejecting arrival connection requests. There are many studies on backlog or loss rate evaluation formulas for admission control at a single node. However, there are few studies on end-to-end evaluation formulas suitable for admission control. In a previous paper, the authors proposed a new stochastic network calculus for many flows using an approach taken from large deviations techniques and obtained asymptotic end-to-end evaluation formulas for output burstiness and backlog. In this paper, we apply this stochastic network calculus to a heterogeneous tandem network with many forwarding flows and cross traffic flows constrained by leaky buckets, and obtain a simple evaluation formula for the end-to-end backlog. In this formula, the end-to-end backlog can be evaluated by the traffic load at the bottle neck node. This result leads us to a natural extension of the evaluation formula for a single node.

A novel NMOS Electrostatic Discharge (ESD) clamp circuit is proposed for a 0.35 µm Bipolar-CMOS-DMOS (BCD) process. The proposed ESD clamp has a non-snapback characteristic because of gate-coupled effect. This proposed ESD clamp circuit is developed without additional components made possible by replacing a capacitor with an isolated parasitic capacitor. The result of the proposed ESD clamp circuit is measured by 100 ns Transmission Line Pulse (TLP) system. From the measurement, it was observed that the proposed ESD clamp has approximately 40% lower triggering voltage compared to the conventional gate-grounded NMOS ESD clamp. This is achieved without degradation of the other ESD design key parameter. The proposed ESD clamp also has high robustness characteristics compared to the conventional RC-triggered NMOS ESD clamp circuit.

In this paper, we propose a novel iterative transmit/receive equalization technique for single-carrier (SC) block transmission in a severe frequency-selective fading channel. Iterative frequency-domain inter-symbol interference (ISI) cancellation (FDIC) is introduced to the previously proposed joint iterative transmit/receive frequency-domain equalization (FDE) based on the minimum mean square error (MMSE) criterion. 1-tap FDE is employed at the transmitter. At the receiver, a 1-tap FDE and FDIC are jointly used and they are updated in an iterative manner. The transmit FDE weight is derived based on the MMSE criterion by taking into account the reduction of residual ISI in the receiver. To derive the weight, the transmitter assumes that the receiver can partially reduce the residual ISI after the FDIC. We conduct a computer simulation to investigate the achievable bit error rate (BER) performance to confirm the effectiveness of our proposed technique.

We propose the collective electron tunneling model in the electron injection process between the Nano Dots (NDs) and the two-dimensional electron gas (2DEG). We report the collective motion of electrons between the 2DEG and the NDs based on the measurement of the Si-ND floating gate structure in the previous studies. However, the origin of this collective motion has not been revealed yet. We evaluate the proposed tunneling model by the model calculation. We reveal that our proposed model reproduces the collective motion of electrons. The insight obtained by our model shows new viewpoints for designing future nano-electronic devices.

Recently, the 3-dimensional (3-D) vertical Floating Gate (FG) type NAND flash memory cell arrays with the Extended Sidewall Control Gate (ESCG) was proposed [7]. Using this novel structure, we successfully implemented superior program speed, read current, and less interference characteristics, by the high Control Gate (CG) coupling ratio with less interference capacitance and highly electrical inverted S/D technique. However, the process stability of the ESCG structure has not been sufficiently confirmed such as the variations of the physical dimensions. In this paper, we intensively investigated the electrical dependency according to the physical dimensions of ESCG, such as the line and spacing of ESCG and the thickness of barrier oxide. Using the 2-dimentional (2-D) TCAD simulations, we compared the basic characteristics of the FG type flash cell operation, in the aspect of program speed, read current, and interference effect. Finally, we check the process window and suggest the optimum target of the ESCG structure for reliable flash cell operation. From above all, we confirmed that this 3-dimensional vertical FG NAND flash memory cell arrays using the ESCG structure is the most attractive candidate for terabit 3-D vertical NAND flash cell array.