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6261-6280hit(21534hit)

  • A 4–10 bit, 0.4–1 V Power Supply, Power Scalable Asynchronous SAR-ADC in 40 nm-CMOS with Wide Supply Voltage Range SAR Controller

    Akira SHIKATA  Ryota SEKIMOTO  Kentaro YOSHIOKA  Tadahiro KURODA  Hiroki ISHIKURO  

     
    PAPER

      Vol:
    E96-A No:2
      Page(s):
    443-452

    This paper presents a wide range in supply voltage, resolution, and sampling rate asynchronous successive approximation register (SAR) analog-to-digital converter (ADC). The proposed differential flip-flop in SAR logic and high efficiency wide range delay element extend the flexibility of speed and resolution tradeoff. The ADC fabricated in 40 nm CMOS process covers 4–10 bit resolution and 0.4–1 V power supply range. The ADC achieved 49.8 dB SNDR and the peak FoM of 3.4 fJ/conv. with 160 kS/sec at 0.4 V single power supply voltage. At 10 bit mode and 1 V operation, up to 10 MS/s, the FoM is below 10 fJ/conv. while keeping ENOB of 8.7 bit.

  • Adaptive Analog-to-Information Converter Design with Limited Random Sequence Modulation

    Chao ZHANG  Jialuo XIAO  

     
    PAPER

      Vol:
    E96-A No:2
      Page(s):
    469-476

    Compressive sensing enables quite lower sampling rate compared with Nyquist sampling. As long as the signal is sparsity in some basis, the random sampling with CS can be employed. In order to make CS applied in the practice, the Analog to Information Converter (AIC) should be involved. Based on the Limited Random Sequence (LRS) modulation, the AIC with LRS can be designed with high performance according to the fixed sparsity. However, if the sparsity of the signal varies with time, the original AIC with LRS is not efficient. In this paper, the adaptive AIC which adapts its scheme of LRS according to the variation of the sparsity is proposed and the prototype system is designed. Due to the adaption of the AIC with the scheme of LRS, the sampling rate can be further reduced. The simulation results confirm the performance of the proposed adaptive AIC scheme. The prototype system can successfully fulfil the random sampling and adapt to the variation of sparsity, which verify and consolidate the validity and feasibility for the future implementation of adaptive AIC on chip.

  • Dynamic and Safe Path Planning Based on Support Vector Machine among Multi Moving Obstacles for Autonomous Vehicles

    Quoc Huy DO  Seiichi MITA  Hossein Tehrani Nik NEJAD  Long HAN  

     
    PAPER-Artificial Intelligence, Data Mining

      Vol:
    E96-D No:2
      Page(s):
    314-328

    We propose a practical local and global path-planning algorithm for an autonomous vehicle or a car-like robot in an unknown semi-structured (or unstructured) environment, where obstacles are detected online by the vehicle's sensors. The algorithm utilizes a probabilistic method based on particle filters to estimate the dynamic obstacles' locations, a support vector machine to provide the critical points and Bezier curves to smooth the generated path. The generated path safely travels through various static and moving obstacles and satisfies the vehicle's movement constraints. The algorithm is implemented and verified on simulation software. Simulation results demonstrate the effectiveness of the proposed method in complicated scenarios that posit the existence of multi moving objects.

  • On the Asymptotic Optimality of Fixed Rate Scheduling in Fading Multiuser Wideband OFDM Networks

    Xiangyu GAO  Yuesheng ZHU  

     
    LETTER-Fundamental Theories for Communications

      Vol:
    E96-B No:2
      Page(s):
    632-634

    In this letter, we prove that for fading multiuser orthogonal frequency division multiplexing networks, a simple fixed rate scheduling scheme with only 1 bit channel state information feedback is capable of achieving the optimal performance in the wideband limit. This result indicates that the complexities of both the feedback and channel coding schemes can be reduced with nearly no system performance penalty in wideband wireless communication environments.

  • RF Front-End and Complex BPF for Reconfigurable Low-IF Receiver

    Hsiao-Chin CHEN  Shu-Wei CHANG  Bo-Rong TU  

     
    PAPER-Microwaves, Millimeter-Waves

      Vol:
    E96-C No:2
      Page(s):
    251-261

    A LNA, an RF front-end and a 6th–order complex BPF for reconfigurable low-IF receivers are demonstrated in this work. Due to the noise cancellation, the two-stage LNA presents a low NF of 2.8 to 3.3 dB from 0.8 to 6 GHz. Moreover, the LNA delivers two kinds of gain curves with IIP3 of -2.6 dBm by employing the capacitive degeneration and the resistive gain-curve shaping in the second stage. The flicker noise corner frequency of the down-converter has been considered and the measured fC of the RF front-end is 200 kHz. The RF front-end also provides two kinds of gain curves. For the low-frequency mode, the conversion gain is 28.831.1 dB from 800 MHz to 2.4 GHz. For the high-frequency mode, the conversion gain is 26.827.4 dB from 3 to 5 GHz. The complex BPF is realized with gm-C LPFs by shifting the low-pass frequency response. With variable transconductances and capacitors, a fixed ratio of the centre frequency to the bandwidth (2) is achieved by varying the bandwidth and the centre frequency of the LPF simultaneously. The complex BPF has a variable bandwidth from 200 kHz to 6.4 MHz while achieving an image rejection of 44 dB.

  • An 8-Bit 100-kS/s CMOS Single-Ended SA ADC for 88 Point EEG/MEG Acquisition System

    Ji-Hun EO  Yeon-Ho JEONG  Young-Chan JANG  

     
    PAPER

      Vol:
    E96-A No:2
      Page(s):
    453-458

    An 8-bit 100-kS/s successive approximation (SA) analog-to-digital converter (ADC) is proposed for measuring EEG and MEG signals in an 88 point. The architectures of a SA ADC with a single-ended analog input and a split-capacitor-based digital-to-analog converter (SC-DAC) are used to reduce the power consumption and chip area of the entire ADC. The proposed SA ADC uses a time-domain comparator that has an input offset self-calibration circuit. It also includes a serial output interface to support a daisy channel that reduces the number of channels for the multi-point sensor interface. It is designed by using a 0.35-µm 1-poly 6-metal CMOS process with a 3.3 V supply to implement together with a conventional analog circuit such as a low-noise-amplifier. The measured DNL and INL of the SA ADC are +0.63/-0.46 and +0.46/-0.51 LSB, respectively. The SNDR is 48.39 dB for a 1.11 kHz analog input signal at a sampling rate of 100 kS/s. The power consumption and core area are 38.71 µW and 0.059 mm2, respectively.

  • A Low Complexity H.264/AVC Deblocking Filter with Simplified Filtering Boundary Strength Decision

    Luong Pham VAN  Hoyoung LEE  Jaehwan KIM  Byeungwoo JEON  

     
    PAPER-Digital Signal Processing

      Vol:
    E96-A No:2
      Page(s):
    562-572

    Blocking artifacts are introduced in many block-based coding systems, and its reduction can significantly improve the subjective quality of compressed video. The H.264/AVC uses an in-loop deblocking filter to remove the blocking artifacts. The filter considers some coding conditions in its adaptive deblocking filtering such as coded block pattern (CBP), motion vector, macroblock type, etc. for inter-predicted blocks, however, it does not consider much for intra-coded blocks. In this paper, we utilize the human visual system (HVS) characteristic and the local characteristic of image blocks to modify the boundary strength (BS) of the intra-deblocking filter in order to gain improvement in the subjective quality and also to reduce the complexity in filtering intra coded slices. In addition, we propose a low-complexity deblocking method which utilizes the correlation between vertical and horizontal boundaries of a block in inter coded slices. Experimental results show that our proposed method achieves not only significant gain in the subjective quality but also some PSNR gain, and reduces the computational complexity of the deblocking filter by 36.23% on average.

  • Differentiating Contention Window for Fairness of Uplink and Downlink in Error-Prone IEEE 802.11 WLAN

    Kyungkoo JUN  

     
    LETTER-Wireless Communication Technologies

      Vol:
    E96-B No:2
      Page(s):
    660-663

    This paper proposes a scheme for fairness between uplink and downlink in error-prone 802.11 DCF WLANs by differentiating the contention window of AP. While existing schemes consider only collision, the proposed scheme takes into account packet error due to poor channel condition, too. Instead of complex analytical models based on Markov chain processes, a simpler model based on mean value analysis is proposed. It works on 802.11 DCF and so avoids being dependent on TXOP which lacks applicability. A performance evaluation shows that the proposed method can achieve fairness even in error-prone environments without decrease of total throughput when compared with existing schemes.

  • Acceleration of Deep Packet Inspection Using a Multi-Byte Processing Prefilter

    Hyejeong HONG  Sungho KANG  

     
    LETTER-Internet

      Vol:
    E96-B No:2
      Page(s):
    643-646

    Fast string matching is essential for deep packet inspection (DPI). Traditional string matchers cannot keep up with the continuous increases in data rates due to their natural speed limits. We add a multi-byte processing prefilter to the traditional string matcher to detect target patterns on a multiple character basis. The proposed winnowing prefilter significantly reduces the number of identity blocks, thereby reducing the memory requirements.

  • A Low-Cost, Distributed and Conflict-Aware Measurement Method for Overlay Network Services Utilizing Local Information Exchange

    Tien Hoang DINH  Go HASEGAWA  Masayuki MURATA  

     
    PAPER

      Vol:
    E96-B No:2
      Page(s):
    459-469

    Measuring network resource information, including available bandwidth, propagation delay, and packet loss ratio, is an important task for efficient operation of overlay network services. Although measurement accuracy can be enhanced by frequent measurements, performing measurements with high frequency can cause measurement conflict problem that increases the network load and degrades measurement accuracy. In this paper, we propose a low-cost, distributed and conflict-aware measurement method that reduces measurement conflicts while maintaining high measurement accuracy. The main idea is that the overlay node exchanges the route information and the measurement results with its neighboring overlay nodes while decreasing the measurement frequency. This means our method trades the overhead of conducting measurements for the overhead of information exchange to enhance measurement accuracy. Simulation results show that the relative error in the measurement results of our method can be decreased by half compared with the existing method when the total measurement overheads of both methods are equal. We also confirm that exchanging measurement results contributes more to the enhancement of measurement accuracy than performing measurements.

  • Statistical Approaches to Excitation Modeling in HMM-Based Speech Synthesis

    June Sig SUNG  Doo Hwa HONG  Hyun Woo KOO  Nam Soo KIM  

     
    LETTER-Speech and Hearing

      Vol:
    E96-D No:2
      Page(s):
    379-382

    In our previous study, we proposed the waveform interpolation (WI) approach to model the excitation signals for hidden Markov model (HMM)-based speech synthesis. This letter presents several techniques to improve excitation modeling within the WI framework. We propose both the time domain and frequency domain zero padding techniques to reduce the spectral distortion inherent in the synthesized excitation signal. Furthermore, we apply non-negative matrix factorization (NMF) to obtain a low-dimensional representation of the excitation signals. From a number of experiments, including a subjective listening test, the proposed method has been found to enhance the performance of the conventional excitation modeling techniques.

  • Generation of Millimeter Waves with Fine Frequency Tunability Using Mach-Zehnder-Modulator-Based Flat Comb Generator

    Isao MOROHASHI  Yoshihisa IRIMAJIRI  Takahide SAKAMOTO  Tetsuya KAWANISHI  Motoaki YASUI  Iwao HOSAKO  

     
    PAPER

      Vol:
    E96-C No:2
      Page(s):
    192-196

    We propose a method of the precise frequency tuning in millimeter wave (MMW) generation using a Mach-Zehnder-modulator-based flat comb generator (MZ-FCG). The MZ-FCG generates a flat comb signal where the comb spacing is exactly the same as the frequency of a radio-frequency signal driving the MZ-FCG. Two modes are extracted from the comb signal by using optical filters. One of them was modulated by a phase modulator, creating precisely frequency-controllable sidebands. In the experiment, typical phase modulation was used. By photomixing of the extracted two modes using a high-speed photodiode, MMW signals with precisely frequency-controllable sidebands are generated. By changing the modulation frequency, the frequency of MMW signals can be continuously tuned. In this scheme, there are two methods for the frequency tuning of MMW signals; one is a coarse adjustment which corresponds to the comb spacing, and the other is fine tuning by the phase-modulation. It was demonstrated that the intensity fluctuation of the upper sideband of the modulated MMW signal was less than 1 dB, and the frequency fluctuation was less than the measurement resolution (300 Hz).

  • The Number of Isolated Nodes in a Wireless Network with a Generic Probabilistic Channel Model

    Chao-Min SU  Chih-Wei YI  Peng-Jun WAN  

     
    PAPER-Terrestrial Wireless Communication/Broadcasting Technologies

      Vol:
    E96-B No:2
      Page(s):
    595-604

    A wireless node is called isolated if it has no links to other nodes. The number of isolated nodes in a wireless network is an important connectivity index. However, most previous works on analytically determining the number of isolated nodes were not based on practical channel models. In this work, we study this problem using a generic probabilistic channel model that can capture the behaviors of the most widely used channel models, including the disk graph model, the Bernoulli link model, the Gaussian white noise model, the Rayleigh fading model, and the Nakagami fading model. We derive the expected number of isolated nodes and further prove that their distribution asymptotically follows a Poisson distribution. We also conjecture that the nonexistence of isolated nodes asymptotically implies the connectivity of the network, and that the probability of connectivity follows the Gumbel function.

  • Pedestrian Imaging Using UWB Doppler Radar Interferometry

    Kenshi SAHO  Takuya SAKAMOTO  Toru SATO  Kenichi INOUE  Takeshi FUKUDA  

     
    PAPER-Sensing

      Vol:
    E96-B No:2
      Page(s):
    613-623

    The imaging of humans using radar is promising for surveillance systems. Although conventional radar systems detect the presence or position of intruders, it is difficult to acquire shape and motion details because the resolution is insufficient. This paper presents a high-resolution human imaging algorithm for an ultra-wideband (UWB) Doppler radar. The proposed algorithm estimates three-dimensional human images using interferometry and, using velocity information, rejects false images created by the interference of body parts. Experiments verify that our proposed algorithm achieves adequate pedestrian imaging. In addition, accurate shape and motion parameters are extracted from the estimated images.

  • Device-Parameter Estimation through IDDQ Signatures

    Michihiro SHINTANI  Takashi SATO  

     
    PAPER-Dependable Computing

      Vol:
    E96-D No:2
      Page(s):
    303-313

    We propose a novel technique for the estimation of device-parameters suitable for postfabrication performance compensation and adaptive delay testing, which are effective means to improve the yield and reliability of LSIs. The proposed technique is based on Bayes' theorem, in which the device-parameters of a chip, such as the threshold voltage of transistors, are estimated by current signatures obtained in a regular IDDQ testing framework. Neither additional circuit implementation nor additional measurement is required for the purpose of parameter estimation. Numerical experiments demonstrate that the proposed technique can achieve 10-mV accuracy in threshold voltage estimations.

  • Low Complexity Logarithmic and Anti-Logarithmic Converters for Hybrid Number System Processors and DSP Applications

    Van-Phuc HOANG  Cong-Kha PHAM  

     
    PAPER-Digital Signal Processing

      Vol:
    E96-A No:2
      Page(s):
    584-590

    This paper presents an efficient approach for logarithmic and anti-logarithmic converters which can be used in the arithmetic unit of hybrid number system processors and logarithm/exponent function generators in DSP applications. By employing the novel quasi-symmetrical difference method with only the simple shift-add logic and the look-up table, the proposed approach can reduce the hardware area and improve the conversion speed significantly while achieve similar accuracy compared with the previous methods. The implementation results in both FPGA and 0.18-µm CMOS technology are also presented and discussed.

  • Optimal Control of Boolean Biological Networks Modeled by Petri Nets

    Koichi KOBAYASHI  Kunihiko HIRAISHI  

     
    PAPER-Systems and Control

      Vol:
    E96-A No:2
      Page(s):
    532-539

    A Boolean network model is one of the models of gene regulatory networks, and is widely used in analysis and control. Although a Boolean network is a class of discrete-time nonlinear systems and expresses the synchronous behavior, it is important to consider the asynchronous behavior. In this paper, using a Petri net, a new modeling method of asynchronous Boolean networks with control inputs is proposed. Furthermore, the optimal control problem of Petri nets expressing asynchronous Boolean networks is formulated, and is reduced to an integer programming problem. The proposed approach will provide us one of the mathematical bases of control methods for gene regulatory networks.

  • Reinforcement Learning of Optimal Supervisor for Discrete Event Systems with Different Preferences

    Koji KAJIWARA  Tatsushi YAMASAKI  

     
    PAPER-Concurrent Systems

      Vol:
    E96-A No:2
      Page(s):
    525-531

    In this paper, we propose an optimal supervisory control method for discrete event systems (DESs) that have different preferences. In our previous work, we proposed an optimal supervisory control method based on reinforcement learning. In this paper, we extend it and consider a system that consists of several local systems. This system is modeled by a decentralized DES (DDES) that consists of local DESs, and is supervised by a central supervisor. In addition, we consider that the supervisor and each local DES have their own preferences. Each preference is represented by a preference function. We introduce the new value function based on the preference functions. Then, we propose the learning method of the optimal supervisor based on reinforcement learning for the DDESs. The supervisor learns how to assign the control pattern so as to maximize the value function for the DDES. The proposed method shows the general framework of optimal supervisory control for the DDES that consists of several local systems with different preferences. We show the efficiency of the proposed method through a computer simulation.

  • User Scheduling Algorithms for Downlink MU-MIMO System Based on the SCSI

    Qiang SUN  Chen SUN  Shi JIN  Yuan ZHANG  Xiqi GAO  

     
    LETTER-Wireless Communication Technologies

      Vol:
    E96-B No:2
      Page(s):
    651-655

    In this paper, we investigate the user scheduling algorithms with statistical eigen-mode transmission (SET) for downlink multiuser multiple-input multiple-output (MU-MIMO) system by utilizing the statistical channel state information (SCSI). Given the objective of maximizing the ergodic achievable sum rate per group (EASRPG), our first proposal, the Munkres user assignment algorithm (MUAA), solves the optimal user grouping problem. Different from the conventional user grouping algorithm (e.g. max-min method), MUAA can efficiently solve the user assignment problem and acquire an optimal solution. However, some user groups of the optimal solution called “unfriendly” groups severely degrade the EASRPG by performing the multiuser SET (MU-SET) due to excessive inter-user interference. To overcome this obstacle, the MUAA with sequential iterative separation (MUAA-SIS) is proposed to find the “unfriendly” groups and switch from the MU-SET to the single-user SET. Finally, our numerical results show that MUAA-SIS offers a higher EASRPG.

  • Incorporation of Cycles and Inhibitory Arcs into the Timed Petri Net Model of Signaling Pathway

    Yuki MURAKAMI  Qi-Wei GE  Hiroshi MATSUNO  

     
    PAPER-Concurrent Systems

      Vol:
    E96-A No:2
      Page(s):
    514-524

    In our privious paper, we proposed an algorithm that determines delay times of a timed Petri net from the structural information of a signaling pathway, but Petri net structures containing cycles and inhibitory arcs were not considered. This paper provides conditions for cycle-contained Petri nets to have reasonable delay times. Furthermore, handling of inhibitory arcs are discussed in terms of the reaction rate of inhibitory interaction in signaling pathway, especially the conversion process of Petri net with inhibitory arc to the one without inhibitory arc is given.

6261-6280hit(21534hit)