The search functionality is under construction.
The search functionality is under construction.

Keyword Search Result

[Keyword] TE(21534hit)

8021-8040hit(21534hit)

  • EXIT Analysis for MAP-Based Joint Iterative Decoding of Separately Encoded Correlated Sources

    Kentaro KOBAYASHI  Takaya YAMAZATO  Masaaki KATAYAMA  

     
    LETTER

      Vol:
    E93-B No:12
      Page(s):
    3509-3513

    We develop a mathematical framework for the extrinsic information transfer (EXIT) analysis to assess the convergence behavior of maximum a posteriori (MAP)-based joint iterative decoding of correlated sources, which are separately encoded and transmitted over noisy channels. Unlike the previous work, our approach focuses on the case side information about the correlation is not perfectly given at the joint decoder but is extracted from decoder output and updated in an iterative manner. The presented framework provides a convenient way to compare between schemes. We show that it allows us to easily and accurately predict joint decoding gain and turbo cliff position.

  • On Communication and Interference Range of Multi-Gbps Millimeter-Wave WPAN System

    Chin-Sean SUM  Zhou LAN  Junyi WANG  Hiroshi HARADA  Shuzo KATO  

     
    LETTER

      Vol:
    E93-A No:12
      Page(s):
    2700-2703

    This paper investigates the communication range and interference range of millimeter-wave wireless personal area networks (WPAN) based on realistic system design. Firstly, the effective communication range of the millimeter-wave networks are calculated based on realistic physical (PHY) layer design and 60 GHz channel obtained from actual measurements. Secondly, an interference model is developed to facilitate the analysis of the impact of interferer-to-victim range on the victim link performance. It is found that system with BPSK modulation is able to support use cases with higher number of portable devices within a 3 m range, while system with 16QAM modulation is more suitable for fixed high speed data streaming devices within a shorter range of 1 m. Also, the interferer-to-victim range that causes no interference in all conditions is found to be approximately 40 m, while a 25 m range causes a typical bit error rate (BER) degradation of 1-digit (e.g. BER = 10-6 to 10-5).

  • Optimal Gaussian Kernel Parameter Selection for SVM Classifier

    Xu YANG  HuiLin XIONG  Xin YANG  

     
    PAPER-Pattern Recognition

      Vol:
    E93-D No:12
      Page(s):
    3352-3358

    The performance of the kernel-based learning algorithms, such as SVM, depends heavily on the proper choice of the kernel parameter. It is desirable for the kernel machines to work on the optimal kernel parameter that adapts well to the input data and the learning tasks. In this paper, we present a novel method for selecting Gaussian kernel parameter by maximizing a class separability criterion, which measures the data distribution in the kernel-induced feature space, and is invariant under any non-singular linear transformation. The experimental results show that both the class separability of the data in the kernel-induced feature space and the classification performance of the SVM classifier are improved by using the optimal kernel parameter.

  • A New Hybrid Method for Machine Transliteration

    Dong YANG  Paul DIXON  Sadaoki FURUI  

     
    PAPER-Natural Language Processing

      Vol:
    E93-D No:12
      Page(s):
    3377-3383

    This paper proposes a new hybrid method for machine transliteration. Our method is based on combining a newly proposed two-step conditional random field (CRF) method and the well-known joint source channel model (JSCM). The contributions of this paper are as follows: (1) A two-step CRF model for machine transliteration is proposed. The first CRF segments a character string of an input word into chunks and the second one converts each chunk into a character in the target language. (2) A joint optimization method of the two-step CRF model and a fast decoding algorithm are also proposed. Our experiments show that the joint optimization of the two-step CRF model works as well as or even better than the JSCM, and the fast decoding algorithm significantly decreases the decoding time. (3) A rapid development method based on a weighted finite state transducer (WFST) framework for the JSCM is proposed. (4) The combination of the proposed two-step CRF model and JSCM outperforms the state-of-the-art result in terms of top-1 accuracy.

  • Deafness Resilient MAC Protocol for Directional Communications

    Jacir Luiz BORDIM  Koji NAKANO  

     
    PAPER

      Vol:
    E93-D No:12
      Page(s):
    3243-3250

    It is known that wireless ad hoc networks employing omnidirectional communications suffer from poor network throughput due to inefficient spatial reuse. Although the use of directional communications is expected to provide significant improvements in this regard, the lack of efficient mechanisms to deal with deafness and hidden terminal problems makes it difficult to fully explore its benefits. The main contribution of this work is to propose a Medium Access Control (MAC) scheme which aims to lessen the effects of deafness and hidden terminal problems in directional communications without precluding spatial reuse. The simulation results have shown that the proposed directional MAC provides significant throughput improvement over both the IEEE802.11DCF MAC protocol and other prominent directional MAC protocols in both linear and grid topologies.

  • Wireless Distributed Network: For Flexible Networking and Radio Resource Management

    Seiichi SAMPEI  Kei SAKAGUCHI  Shinsuke IBI  Koji YAMAMOTO  

     
    INVITED PAPER

      Vol:
    E93-B No:12
      Page(s):
    3218-3227

    This paper proposes a concept for a new technical field called wireless distributed network (WDN) as a strategic technical field to enable flexible networking and radio resource management (RRM) to cope with dynamic variation of spatially distributed traffic demands. As the core technical subject areas for the WDN, this paper identifies distributed networking for flexible network creation, cooperative transmission and reception for flexible link creation, and dynamic spectrum access for flexible radio resource management, and explains their technical features and challenges for constructing the WDN. This paper also discusses some already being studied application fields as well as potential future directions of the WDN applications.

  • Gate Delay Estimation in STA under Dynamic Power Supply Noise

    Takaaki OKUMURA  Fumihiro MINAMI  Kenji SHIMAZAKI  Kimihiko KUWADA  Masanori HASHIMOTO  

     
    PAPER-Device and Circuit Modeling and Analysis

      Vol:
    E93-A No:12
      Page(s):
    2447-2455

    This paper presents a gate delay estimation method that takes into account dynamic power supply noise. We review STA based on static IR-drop analysis and a conventional method for dynamic noise waveform, and reveal their limitations and problems that originate from circuit structures and higher delay sensitivity to voltage in advanced technologies. We then propose a gate delay computation that overcomes the problems with iterative computations and consideration of input voltage drop. Evaluation results with various circuits and noise injection timings show that the proposed method estimates path delay fluctuation well within 1% error on average.

  • Register File Size Reduction through Instruction Pre-Execution Incorporating Value Prediction

    Yusuke TANAKA  Hideki ANDO  

     
    PAPER-Computer System

      Vol:
    E93-D No:12
      Page(s):
    3294-3305

    Two-step physical register deallocation (TSD) is an architectural scheme that enhances memory-level parallelism (MLP) by pre-executing instructions. Ideally, TSD allows exploitation of MLP under an unlimited number of physical registers, and consequently only a small register file is needed for MLP. In practice, however, the amount of MLP exploitable is limited, because there are cases where either 1) pre-execution is not performed; or 2) the timing of pre-execution is delayed. Both are due to data dependencies among the pre-executed instructions. This paper proposes the use of value prediction to solve these problems. This paper proposes the use of value prediction to solve these problems. Evaluation results using the SPECfp2000 benchmark confirm that the proposed scheme with value prediction for predicting addresses achieves equivalent IPC, with a smaller register file, to the previous TSD scheme. The reduction rate of the register file size is 21%.

  • Analyzing the On-State Power Dissipation in Stepped-Output Diode-Clamped Multi-Level Inverter

    Ehsan ESFANDIARI  Norman Bin MARIUN  Mohammad Hamiruce MARHABAN  Azmi ZAKARIA  

     
    PAPER-Electronic Circuits

      Vol:
    E93-C No:12
      Page(s):
    1670-1678

    In renewable power generators, because of high initial cost and duty cycle of systems, efficiency parameter has an important place. For this reason, line frequency controlled multilevel inverters are one of most proper choices for renewable power converters. Among these, diode-clamped multilevel inverter structures are one of most important and best efficient inverters. In this paper, a simple diode-clamped equivalent circuit for exploring the efficiency under resistive loads is proposed, and based on this simple circuit, the on-state power dissipation in improved and original diode-clamped multilevel inverter under resistive loads is analyzed. Then, comparative efficiency equations are extracted for inverters that use metal oxide semiconductor field-effect transistors (MOSFETs) and other p-n junction as switches. These equations enable us to have a better idea of conducting power dissipation in diode-clamped and help us to choose appropriate switches for having a lower on-state power dissipation. Some cases are studied and in the end it is proven that the calculated efficiency under resistive load is a boundary for inductive load with the same impedance in diode-clamped inverter with p-n junction switches. This means that calculating the efficiency under resistive loads enables us to approximately predict efficiency under inductive loads.

  • Optimal Configuration for Multiversion Real-Time Systems Using Slack Based Schedulability

    Sayuri TERADA  Toshimitsu USHIO  

     
    PAPER

      Vol:
    E93-A No:12
      Page(s):
    2709-2716

    In an embedded control system, control performances of each job depend on its latency and a control algorithm implemented in it. In order to adapt a job set to optimize control performances subject to schedulability, we design several types of control software for each job, which will be called versions, and select one version from them when the job is released. A real-time system where each job has several versions is called a multiversion real-time system. A benefit and a CPU utilization of a job depend on the versions. So, it is an important problem to select a version of each job so as to maximize the total benefit of the system subject to a schedulability condition. Such a problem will be called an optimal configuration problem. In this paper, we assume that each version is specified by the relative deadline, the execution time, and the benefit. We show that the optimal configuration problem is transformed to a maximum path length problem. We propose an optimal algorithm based on the forward dynamic programming. Moreover, we propose sub-optimal algorithms to reduce computation times. The efficiencies of the proposed algorithms are illustrated by simulations.

  • Proportional Fair Resource Allocation in Coordinated MIMO Networks with Interference Suppression

    Lei ZHONG  Yusheng JI  

     
    PAPER

      Vol:
    E93-B No:12
      Page(s):
    3489-3496

    The biggest challenge in multi-cell MIMO multiplexing systems is how to effectively suppress the other-cell interference (OCI) since the OCI severely decrease the system performance. Cooperation among cells is one of the most promising solutions to OCI problems. However, this solution suffers greatly from delay and overhead issues, which make it impractical. A coordinated MIMO system with a simplified cooperation between the base stations is a compromise between the theory and practice. We aim to devise an effective resource allocation algorithm based on a coordinated MIMO system that largely alleviates the OCI. In this paper, we propose a joint resource allocation algorithm incorporating intra-cell beamforming multiplexing and inter-cell interference suppression, which adaptively allocates the transmitting power and schedules users while achieving close to an optimal system throughput under proportional fairness consideration. We formulate this problem as a nonlinear combinational optimization problem, which is hard to solve. Then, we decouple the variables and transform it into a problem with convex sub-problems that can be solve but still need heavy computational complexity. In order to implement the algorithm in real-time scenarios, we reduce the computational complexity by assuming an equal power allocation utility to do user scheduling before the power allocation. Extensive simulation results show that the joint resource allocation algorithm can achieve a higher throughput and better fairness than the traditional method while maintains the proportional fairness. Moreover, the low-complexity algorithm obtains a better fairness and less computational complexity with only a slight loss in throughput.

  • Generalized Spot-Checking for Reliable Volunteer Computing

    Kan WATANABE  Masaru FUKUSHI  

     
    PAPER

      Vol:
    E93-D No:12
      Page(s):
    3164-3172

    While volunteer computing (VC) systems reach the most powerful computing platforms, they still have the problem of guaranteeing computational correctness, due to the inherent unreliability of volunteer participants. Spot-checking technique, which checks each participant by allocating spotter jobs, is a promising approach to the validation of computation results. The current spot-checking is based on the implicit assumption that participants never distinguish spotter jobs from normal ones; however generating such spotter jobs is still an open problem. Hence, in the real VC environment where the implicit assumption does not always hold, spot-checking-based methods such as well-known credibility-based voting become almost impossible to guarantee the computational correctness. In this paper, we generalize spot-checking by introducing the idea of imperfect checking. This generalization allows to guarantee the computational correctness under the situation that spot-checking is not fully-reliable and participants may distinguish spotter jobs. Moreover, we develop a generalized formula of the credibility, which enables credibility-based voting to utilize check-by-voting technique. Simulation results show that check-by-voting improves the performance of credibility-based voting, while guaranteeing the same level of computational correctness.

  • Resource-Aware Path Selection in Heterogeneous Self-Organizing Wireless Networks

    Bongjhin SHIN  Hoyoung CHOI  Daehyoung HONG  

     
    LETTER-Wireless Communication Technologies

      Vol:
    E93-B No:12
      Page(s):
    3647-3650

    We deal with a path selection problem for heterogeneous wireless networks integrated with Frequency Agile Access Points. Our goal is to find the minimum achievable amount of radio resources required to set up a transmission path. We propose to formulate the path selection approach as a minimum cost flow problem.

  • Cognitive Wireless Router System by Distributed Management of Heterogeneous Wireless Networks

    Kentaro ISHIZU  Homare MURAKAMI  Stanislav FILIN  Hiroshi HARADA  

     
    PAPER

      Vol:
    E93-B No:12
      Page(s):
    3311-3322

    Selections of radio access networks by terminals are currently not coordinated and utilizations of the radio resources are not balanced. As a result, radio resources on some radio systems are occupied even though others can afford. In this paper, in order to provide a framework to resolve this issue, Cognitive Wireless Router (CWR) system is proposed for distributed management and independent reconfiguration of heterogeneous wireless networks. The proposed system selects appropriate operational frequency bands and radio systems to connect to the Internet in corporation between the CWRs and a server and therefore can provide optimized wireless Internet access easily even in environments without wired networks. The developed prototype system reconfigures the radio devices to connect to the Internet in 27 seconds at most. It is revealed that this reconfiguration time can be shortened to less than 100 ms by elaborating its procedure. It is also clarified that network data speed required at the server to deal with 10,000 CWRs is only 4.1 Mbps.

  • A Decentralized Clustering Scheme for Dynamic Downlink Base Station Cooperation

    Sheng ZHOU  Jie GONG  Yunjian JIA  Zhisheng NIU  

     
    LETTER-Terrestrial Wireless Communication/Broadcasting Technologies

      Vol:
    E93-B No:12
      Page(s):
    3656-3659

    Base station (BS) cooperation is a promising technique to suppress co-channel interference for cellular networks. However, practical limitations constrain the scale of cooperation, thus the network is divided into small disjoint BS cooperation groups, namely clusters. A decentralized scheme for BS cluster formation is proposed based on efficient BS negotiations, of which the feedback overhead per user is nearly irrelevant to the network size, and the number of iteration rounds scales very slowly with the network size. Simulations show that our decentralized scheme provides significant sum-rate gain over static clustering and performs almost the same as the existing centralized approach. The proposed scheme is well suited for large-scale cellular networks due to its low overhead and complexity.

  • A Design Methodology for a DPA-Resistant Circuit with RSL Techniques

    Daisuke SUZUKI  Minoru SAEKI  Koichi SHIMIZU  Akashi SATOH  Tsutomu MATSUMOTO  

     
    PAPER-Logic Synthesis, Test and Verification

      Vol:
    E93-A No:12
      Page(s):
    2497-2508

    A design methodology of Random Switching Logic (RSL) using CMOS standard cell libraries is proposed to counter power analysis attacks against cryptographic hardware modules. The original RSL proposed in 2004 requires a unique RSL-gate for random data masking and glitch suppression to prevent secret information leakage through power traces. In contrast, our new methodology enables to use general logic gates supported by standard cell libraries. In order to evaluate its practical performance in hardware size and speed as well as resistance against power analysis attacks, an AES circuit with the RSL technique was implemented as a cryptographic LSI using 130-nm and 90-nm CMOS standard cell library. From the results of attack experiments that used a million traces, we confirmed that the RSL-AES circuit has very high DPA and CPA resistance thanks to the contributions of both the masking function and the glitch suppressing function.

  • Reduction of Area per Good Die for SoC Memory Built-In Self-Test

    Masayuki ARAI  Tatsuro ENDO  Kazuhiko IWASAKI  Michinobu NAKAO  Iwao SUZUKI  

     
    PAPER-Logic Synthesis, Test and Verification

      Vol:
    E93-A No:12
      Page(s):
    2463-2471

    To reduce the manufacturing cost of SoCs with many embedded SRAMs, we propose a scheme to reduce the area per good die for the SoC memory built-in self-test (MBIST). We first propose BIST hardware overhead reduction by application of an encoder-based comparator. For the repair of a faulty SRAM module with 2-D redundancy, we propose spare assignement algorithm. Based on an existing range-cheking-first algorithm (RCFA), we propose assign-all-row-RCFA (A-RCFA) which assign unused spare rows to faulty ones, in order to suppress the degradation of repair rate due to compressed fail location information output from the encoder-based comparator. Then, considering that an SoC has many SRAM modules, we propose a heuristic algorithm based on iterative improvement algorithm (IIA), which determines whether each SRAM should have a spare row or not, in order to minimize area per a good die. Experimental results on practical scale benchmark SoCs with more than 1,000 SRAM modules indicate that encoder-based comparators reduce hardware overhead by about 50% compared to traditional ones, and that combining the IIA-based algorithm for determining redundancy architecture with the encoder-based comparator effectively reduces the area per good die.

  • Selecting Help Messages by Using Robust Grammar Verification for Handling Out-of-Grammar Utterances in Spoken Dialogue Systems

    Kazunori KOMATANI  Yuichiro FUKUBAYASHI  Satoshi IKEDA  Tetsuya OGATA  Hiroshi G. OKUNO  

     
    PAPER-Speech and Hearing

      Vol:
    E93-D No:12
      Page(s):
    3359-3367

    We address the issue of out-of-grammar (OOG) utterances in spoken dialogue systems by generating help messages. Help message generation for OOG utterances is a challenge because language understanding based on automatic speech recognition (ASR) of OOG utterances is usually erroneous; important words are often misrecognized or missing from such utterances. Our grammar verification method uses a weighted finite-state transducer, to accurately identify the grammar rule that the user intended to use for the utterance, even if important words are missing from the ASR results. We then use a ranking algorithm, RankBoost, to rank help message candidates in order of likely usefulness. Its features include the grammar verification results and the utterance history representing the user's experience.

  • Coexistence of Dynamic Spectrum Access Based Heterogeneous Networks

    Chen SUN  Yohannes D. ALEMSEGED  HaNguyen TRAN  Hiroshi HARADA  

     
    PAPER

      Vol:
    E93-B No:12
      Page(s):
    3293-3301

    This paper addresses the coexistence issue of distributed heterogeneous networks where the network nodes are cognitive radio terminals. These nodes, operating as secondary users (SUs), might interfere with primary users (PUs) who are licensed to use a given frequency band. Further, due to the lack of coordination and the dissimilarity of the radio access technologies (RATs) among these wireless nodes, they might interfere with each other. To solve this coexistence problem, we propose an architecture that enables coordination among the distributed nodes. The architecture provides coexistence solutions and sends reconfiguration commands to SU networks. As an example, time sharing is considered as a solution. Further, the time slot allocation ratios and transmit powers are parameters encapsulated in the reconfiguration commands. The performance of the proposed scheme is evaluated in terms of the coexistence between PUs and SUs, as well as the coexistence among SUs. The former addresses the interference from SUs to PUs, whereas the latter addresses the sharing of an identified spectrum opportunity among heterogeneous SU networks for achieving an efficient spectrum usage. In this study, we first introduce a new parameter named as quality of coexistence (QoC), which is defined as the ratio between the quality of SU transmissions and the negative interference to PUs. In this study we assume that the SUs have multiple antennas and employ fixed transmit power control (fixed-TPC). By using the approximation to the distribution of a weighted sum of chi-square random variables (RVs), we develop an analytical model for the time slot allocation among SU networks. Using this analytical model, we obtain the optimal time slot allocation ratios as well as transmit powers of the SU networks by maximizing the QoC. This leads to an efficient spectrum usage among SUs and a minimized negative influence to the PUs. Results show that in a particular scenario the QoC can be increased by 30%.

  • Single-Event-Upset Tolerant RS Flip-Flop with Small Area

    Kazuteru NAMBA  Kengo NAKASHIMA  Hideo ITO  

     
    LETTER-Dependable Computing

      Vol:
    E93-D No:12
      Page(s):
    3407-3409

    This paper presents a construction of a single-event-upset (SEU) tolerant reset-set (RS) flip-flop (FF). The proposed RS-FF consists of four identical parts which form an interlocking feedback loop just like DICE. The area and average power consumption of the proposed RS-FFs are 1.101.48 and 1.201.63 times smaller than those of the conventional SEU tolerant RS-FFs, respectively.

8021-8040hit(21534hit)