In this paper, a novel model of Gaussian pulse propagation in optical fiber is proposed to comprehensively analyze the impact of Group Velocity Dispersion (GVD) on the performance of two-dimensional wavelength hopping/time spreading optical code division multiple access (2-D WH/TS OCDMA) systems. In addition, many noise and interferences, including multiple access interference (MAI), optical beating interference (OBI), and receiver's noise are included in the analysis. Besides, we propose to use the heterodyne detection receiver so that the receiver's sensitivity can be improved. Analytical results show that, under the impact of GVD, the number of supportable users is extremely decreased and the maximum transmission length (i.e. the length at which BER 10-9 can be maintained) is remarkably shortened in the case of normal single mode fiber (ITU-T G.652) is used. The main factor that limits the system performance is time skewing. In addition, we show how the impact of GVD is relieved by dispersion-shifted fiber (ITU-T G.653). For example, a system with 321 Gbit/s users can achieve a maximum transmission length of 111 km when transmitted optical power per bit is -5 dBm.

Previous approaches to question retrieval in community-based question answering rely on statistical translation techniques to match users' questions (queries) against collections of previously asked questions. This paper presents a simple but effective method for computing word relatedness to improve question retrieval based on word co-occurrence information directly extracted from question and answer archives. Experimental results show that the proposed approach significantly outperforms translation-based approaches.

Circuits utilizing advanced process technologies have to correctly account for device parameter variation to optimize its performance. In this paper, analytical formulas for evaluating path delay variation of Multi-Threshold CMOS (MTCMOS) circuits are proposed. The proposed formulas express path delay and its variation as functions of process parameters that are determined by fabrication technology (threshold voltage, carrier mobility, etc.) and the circuit parameters that are determined by circuit structure (equivalent load capacitance and the concurrently switching gates). Two procedures to obtain the circuit parameter sets necessary in the calculation of the proposed formulas are also defined. With the proposed formulas, calculation time of a path delay variation becomes three orders faster than that of Monte-Carlo simulation. The proposed formulas are suitably applied for efficient design of MTCMOS circuits considering process variation.

Climate change and/or pandemics are global life threatening concerns. For verifying and utilizing monitored data for solving to the Climate Change concerns, a network system based on device ID would be proposed. In this paper, we review the recent standardization initiatives in ITU-T, and propose an ID network that can be used to verify the solutions.

The binary exponential back-off mechanism is one of the basic elements that constitute the IEEE 802.11 protocol. The models of the back-off mechanism have been developed with the assumption that collisions occur only due to nodes within the carrier sensing range and the collision probability is constant in steady-state. However, the transmission collisions can occur due to hidden nodes and these tend to occur consecutively, contrary to the collisions due to nodes within the carrier sensing range. Consecutive collisions increase the back-off time exponentially, resulting in less frequent transmission attempts. Ignoring this collision characteristic in modeling the back-off mechanism can produce large errors in the performance analysis of networks. In this paper, we model the back-off process as a Markov renewal process by taking into account such consecutive collisions due to hidden nodes, and then compare this result with NS2 simulation results. According to the simulation results, the proposed model reduces the relative error in the attempt probability by more than 90% in the grid topology. We also propose a new collision model for a simple network considering consecutive collisions due to hidden nodes, and analyze the network under saturated traffic condition using the proposed models. The attempt and collision probabilities are estimated with high accuracy.

In this work, errors in a ferrite core permeability dispersion measurement using a microstrip line (MSL) method, where three kinds of MSL circuits are used, are evaluated by both an electromagnetic simulation technique and experiments. The computer simulated results have shown that although the measurement errors decrease according to the diameter of the winding wire which passes through a sample ferrite core becomes larger, that is the spacing between the wire and the core gets narrower, a certain amount of error still remains. In order to overcome this problem and improve the measurement accuracy, a metal pipe electrically connected to a ground plane for shielding is placed around the wire of the non-magnetic core circuit which is one of the three MSL circuits noted above.

We propose an MRAM macro architecture for SoCs to reduce their area size. The shared write-selection transistor (SWST) architecture is based on 2T1MTJ MRAM cell technology, which enables the same fast access time with a smaller cell area than that of 6T SRAMs. We designed a 4-Mb macro using the SWST architecture with a 0.15-µm CMOS process and a 0.24-µm MRAM process. The macro cell array consists of 81T64MTJ cell array elements, each storing 64 bits of data. The area size is reduced by more than 30%. By introducing a leakage-replication (LR) read scheme, a wide read margin on a test chip is accomplished and 50-ns access time is achieved with SPICE simulation. The 2T1MTJ macro and 81T64MTJ macro can be integrated into a single SoC.

With proliferation of smart handsets capable of mobile Internet, the severity of malware attacks targeting such handsets is rapidly increasing, thereby requiring effective countermeasure for them. However, existing signature-based solutions are not suitable for resource-poor handsets due to the excessive run-time overhead of matching against ever-increasing malware pattern database as well as the limitation of detecting well-known malware only. To overcome these drawbacks, we present a bio-inspired approach to discriminate malware (non-self) from normal programs (self) by replicating the processes of biological immune system. Our proposed approach achieves superior performance in terms of detecting 83.7% of new malware or their variants and scalable storage requirement that grows very slowly with inclusion of new malware, making it attractive for use with mobile handsets.

A PN junction current model for advanced MOSFETs is proposed and implemented into HiSIM2, a complete surface-potential-based MOSFET model. The model includes forward diode currents and reverse diode currents, and requires a total of 13 model parameters covering all bias conditions. Model simulation results reproduce measurements for different device geometries over a wide range of bias and temperature values.

In this paper we propose a novel RFID anti-collision technique that intelligently combines polling and random access schemes. These two fundamentally different medium access control protocols are coherently integrated in our design while functionally complementing each other. The polling mode is designed to enable fast collision-free identification for the tags that exist within reader's coverage across the sessions. In contrast, the random access mode attempts to read the tags uncovered by the polling mode. Our proposed technique is particularly suited for a class of RFID applications in which a stationary reader periodically attempts to identify the tags with slow mobility. Numerical results show that our proposed technique yields much faster identification time against the existing approaches under various operating conditions.

The end-to-end round trip time (RTT) is one of the most important communication characteristics for Internet applications. From the viewpoint of network operators, RTT may also become one of the important metrics to understand the network conditions. Given this background, we should know how a factor such as a network incident influences RTTs. It is obvious that two or more factors may interfere in the observed delay characteristics, because packet transmission delays in the Internet are strongly dependent on the time-variant condition of the network. In this paper, we propose a modeling method by using mixed distribution which enables us to express delay characteristic more accurately where two or more factors exist together. And, we also propose an inferring method of network behavior by decomposition of the mixed distribution based on modeling results. Furthermore, in experiments we investigate the influence caused by each network impact factor independently. Our proposed method can presume the events that occur in a network from the measurements of RTTs by using the decomposition of the mixed distribution.

This paper presents a deadbeat control scheme for linear systems with state constraints. The proposed controller increases the number of steps on-line for the deadbeat tracking performance, satisfying given admissible state constraints. LMI conditions are given to minimize the unavoidable step delay. The proposed schemes can be easily developed by using LMI approach, and are validated by numerical simulation.

A deep submicron semiconductor technology has increased process variations. This fact makes the estimate of the worst-case design margin difficult. In order to realize robust designs, we are investigating such a typical-case design methodology, which we call Constructive Timing Violation (CTV). In the CTV-based design, we can relax timing constraints. However, relaxing timing constraints might cause some timing errors. While we have applied the CTV-based design to a processor, unfortunately, the timing error recovery has serious impact on processor performance. In this paper, we investigate enhancement techniques of the CTV-based design. In addition, in order to accurately evaluate the CTV-based design, we build a co-simulation framework to consider circuit delay at the architectural level. From the co-simulation results, we find the performance penalty is significantly reduced by the enhancement techniques.

H.264 is the latest HDTV video compression standard, which provides a significant improvement in coding efficiency at the cost of huge computation complexity. After transform and quantization, if all the coefficients of the block's residue data are zero, this block is called all-zero block (AZB). Provided that an AZB can be detected early, the process of transform and quantization on an AZB can be skipped, which reduces significant redundant computations. In this paper, a theoretical analysis is performed for the sufficient condition for AZB detection. As a result, a partial sum of absolute difference (SAD) based 44 AZB detection algorithm is derived. And then, a hardware-oriented AZB detection algorithm is proposed by modifying the order of SAD calculation. Furthermore, a quantization parameter (QP) oriented 88 AZB detection algorithm is proposed according to the AZB's statistical analysis. Experimental results show that the proposed algorithm outperforms the previous methods in all cases and achieves major improvement of computation reduction in the range from 6.7% to 42.3% for 44 blocks, from 0.24% to 79.48% for 88 blocks. The computation reduction increases as QP increases.

This paper proposes a software-controllable variable line-size (SC-VLS) cache architecture for low power embedded systems. High bandwidth between logic and a DRAM is realized by means of advanced integrated technology. System-in-Silicon is one of the architectural frameworks to realize the high bandwidth. An ASIC and a specific SRAM are mounted onto a silicon interposer. Each chip is connected to the silicon interposer by eutectic solder bumps. In the framework, it is important to reduce the DRAM energy consumption. The specific DRAM needs a small cache memory to improve the performance. We exploit the cache to reduce the DRAM energy consumption. During application program executions, an adequate cache line size which produces the lowest cache miss ratio is varied because the amount of spatial locality of memory references changes. If we employ a large cache line size, we can expect the effect of prefetching. However, the DRAM energy consumption is larger than a small line size because of the huge number of banks are accessed. The SC-VLS cache is able to change a line size to an adequate one at runtime with a small area and power overheads. We analyze the adequate line size and insert line size change instructions at the beginning of each function of a target program before executing the program. In our evaluation, it is observed that the SC-VLS cache reduces the DRAM energy consumption up to 88%, compared to a conventional cache with fixed 256 B lines.

Tracking a large quantity of moving target tags simultaneously is essential for the localization and guidance of people in welfare facilities like hospitals and sanatoriums for the aged. The locating system using active RFID technology consists of a number of fixed RFID readers and tags carried by the target objects, or senior people. We compare the performances of several determination algorithms which use the power measurement of received signals emitted by the moving active RFID tags. This letter presents a study on the effect of collision in tracking large quantities of objects based on active RFID real time location system (RTLS). Traditional trilateration, fingerprinting, and well-known LANDMARC algorithm are evaluated and compared with varying number of moving tags through the SystemC-based computer simulation. From the simulation, we show the tradeoff relationship between the number of moving tags and estimation accuracy.

Arrayed waveguide grating (AWG) is a promising technology for constructing high-speed large-capacity WDM switches, because it can switch fast, is scalable to large size and consumes little power. To take the full advantage of high-speed AWG, the routing control of a massive AWG-based switch should be as simple as possible. In this paper, we focus on the self-routing design of AWG-based switches with O(1) constant routing complexity and propose a novel construction of self-routing AWG switches that can guarantee the attractive nonblocking property for both the wavelength-to-wavelength and wavelength-to-fiber request models. We also fully analyze the proposed design in terms of its blocking property, hardware cost and crosstalk performance and compare it against traditional designs. It is expected that the proposed construction will be useful for the design and all-optical implementation of future ultra high-speed optical packet/burst switches.

Radiation of a Hertzian dipole placed within a cylindrical cavity with narrow slots is investigated. Narrow axial and transverse slots are considered. Scattered fields are expanded in terms of eigenfunctions and boundary conditions are enforced to obtain a set of simultaneous equations. Computations are performed to check the validity of the formulation.

The goal of personal-style handwriting synthesis is to produce texts in the same style as an individual writer by analyzing the writer's samples of handwriting. The difficulty of handwriting synthesis is that the output should have the characteristics of the person's handwriting as well as looking natural, based on a limited number of available examples. We develop a synthesis algorithm which produces handwriting that exhibits naturalness based on the probabilistic character model.

In this letter, we propose a new multi-step maximum likelihood predictor with a finite impulse response (FIR) structure for discrete-time state-space signal models. This predictor is called a maximum likelihood FIR predictor (MLFP). The MLFP is linear with the most recent finite outputs and does not require a prior initial state information on a receding horizon. It is shown that the proposed MLFP possesses the unbiasedness property and the deadbeat property. Simulation study illustrates that the proposed MLFP is more robust against uncertainties and faster in convergence than the conventional multi-step Kalman predictor.