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[Keyword] TE(21534hit)

14241-14260hit(21534hit)

  • Feature Interaction Detection by Bounded Model Checking

    Tomoyuki YOKOGAWA  Tatsuhiro TSUCHIYA  Masahide NAKAMURA  Tohru KIKUNO  

     
    PAPER-Dependable Communication

      Vol:
    E86-D No:12
      Page(s):
    2579-2587

    Feature interaction is the term used in telephony systems to refer to inconsistent conflict between multiple communication services. Feature interaction is considered a major obstacle to developing reliable telephony systems and many approaches have been explored to resolve it. In this paper we present an automatic method for detecting latent feature interaction in service specifications. This method uses bounded model checking as its basis. The basic idea behind bounded model checking is to reduce the detection problem to the propositional satisfiability (SAT) decision problem. For asynchronous systems like telecommunication systems, however, traditional bounded model checking does not work well because resulting propositional formulas tend to become very large. We propose a new encoding scheme to overcome this problem and show the effectiveness through comparative experiments with traditional bounded model checking and other model checking methods.

  • Color Transfer between Images Based on Basic Color Category

    Youngha CHANG  Suguru SAITO  Masayuki NAKAJIMA  

     
    PAPER-Image Processing, Image Pattern Recognition

      Vol:
    E86-D No:12
      Page(s):
    2780-2785

    Usually, paintings are more appealing than photographic images. This is because paintings can incorporate styles based on the artist's subjective view of motif. This style can be distinguished by looking at elements such as motif, color, shape deformation and brush texture. In our work, we focus on the effect of "color" element and devise a method for transforming the color of an input photograph according to a reference painting. To do this, we consider basic color category concepts in the color transformation process. We assume that color transformations from one basic color category to another may cause peculiar feelings. Therefore, we restrict each color transformation within the same basic color category. For this, our algorithm first categorizes each pixel color of a photograph into one of eleven basic color categories. Next, for every pixel color of the photograph, the algorithm finds its corresponding color in the same category of a reference painting. Finally, the algorithm substitutes the pixel color with its corresponding color. In this way, we achieve large but natural color transformations of an image.

  • Analyzing the Impact of Data Errors in Safety-Critical Control Systems

    Orjan ASKERDAL  Magnus GAFVERT  Martin HILLER  Neeraj SURI  

     
    PAPER-Verification and Dependability Analysis

      Vol:
    E86-D No:12
      Page(s):
    2623-2633

    Computers are increasingly used for implementing control algorithms in safety-critical embedded applications, such as engine control, braking control and flight surface control. Consequently, computer errors can have severe impact on the safety of such systems. Addressing the coupling of control performance with computer related errors, this paper develops a methodology for analyzing the impacts data errors have on control system dependability. The impact of a data error is measured as the resulting control error. We use maximum bounds on this measure as the criterion for control system failure (i.e., if the control error exceeds a certain threshold, the system has failed). In this paper we a) develop suitable models of computer faults for analysis of control level effects and related analysis methods, and b) apply traditional control theory analysis methods for understanding the impacts of data errors on system dependability. An automobile slip-control brake-system is used as an example showing the viability of our approach.

  • Mining Traversal Patterns on the Internet

    Tzung-Shi CHEN  

     
    PAPER-Databases

      Vol:
    E86-D No:12
      Page(s):
    2722-2730

    Mining traversal patterns on the Internet is one of critical issues for exploring the user access behaviors. In this paper, we propose a new data mining scheme for mining frequent trip traversal patterns on the Internet. First, we define a trip traversal as a historical contiguous sequence of web sites or web pages, which were surfed or visited on an information-providing system by one user. Next, we derive all of the maximal trip traversals by analyzing and filtering these collected trip traversals. For mining the large trip traversals from the maximal trip traversals, we present a data mining scheme integrated with the schemes presented in. Here, the extracted large trip traversals can be thought of as the realistic frequent browsed behaviors for most of users either on a web site or on an information-providing system, such as a proxy server. Finally, we implement and design a data mining system to explore the large trip traversal patterns in order to capture user access patterns to some proxy server.

  • A Low Cost Reconfigurable Architecture for a UMTS Receiver

    Ronny VELJANOVSKI  Aleksandar STOJCEVSKI  Jugdutt SINGH  Aladin ZAYEGH  Michael FAULKNER  

     
    PAPER

      Vol:
    E86-B No:12
      Page(s):
    3441-3451

    A novel reconfigurable architecture has been proposed for a mobile terminal receiver that can drastically reduce power dissipation dependant on adjacent channel interference. The proposed design can automatically scale the number of filter coefficients and word length respectively by monitoring the in-band and out-of-band powers. The new architecture performance was evaluated in a simulation UTRA-TDD environment because of the large near far problem caused by adjacent channel interference from adjacent mobiles and base stations. The UTRA-TDD downlink mode was examined statistically and results show that the reconfigurable architectures can save an average of up to 75% power dissipation respectively when compared to a fixed filter length of 57 and word length of 16 bits. This power saving only applies to the filter and ADC, not the whole receiver. This will prolong talk and standby time in a mobile terminal. The average number of taps and bits were calculated to be 14.98 and 10 respectively, for an outage of 97%.

  • A Robust Audio Watermarking Scheme Using Wavelet Modulation

    Bing JI  Fei YAN  De ZHANG  

     
    LETTER-Information Security

      Vol:
    E86-A No:12
      Page(s):
    3303-3305

    A novel audio watermarking based on wavelet modulation is presented. The watermark signals are constructed by M-band wavelet modulation that can increase redundancy to improve the detection performance. In order to maximize the watermarking strength within the perceptual constraints, the watermark signals synthesized from different subbands are separately masked using a frequency auditory model. CDMA technique is implemented to achieve watermarking capacity. Experimental results show that this method is very robust.

  • Multi-Mode Digital IF Downconverter for Software Radio Application

    Shiann-Shiun JENG  Shu-Ming CHANG  Bor-Shuh LAN  

     
    PAPER

      Vol:
    E86-B No:12
      Page(s):
    3498-3512

    The software-defined radio technique translates the traditional hardware radio platform to a flexible software radio platform that can support multiple air interface standards. This work proposes an efficient IF processing architecture based on software-defined radio for 2G GSM/IS-95 and 3G W-CDMA systems. Hardware complexity is estimated by fixed-point simulation. IF processing architecture should be highly flexible and minimally complex. Firstly, a carrier channel is selected from a wide frequency band using a high-resolution numerically controlled oscillator (NCO). Wide-range interpolation/decimation is performed by the cascaded integrator comb (CIC) filter that involves no multiplier nor stores filter coefficients. Both the desired narrowband and the desired wideband signals can be extracted. The look-up table (LUT), based on the distributed arithmetic (DA) algorithm is used to implement the finite impulse response (FIR) filter. Therefore, a small area and high speed can be achieved. The errors caused by truncation, quantization, rounding-off and overflow are predicted using a fixed-point simulation. These predictions will help to evaluate the word-length for VLSI implementation. Finally, ALTERA APEX20KE is used as a target device. One hundred thousand gates are used for the implementation. Thus, the proposed architecture has high processing flexibility and small area.

  • Moment Computations of Lumped Coupled RLC Trees with Applications to Estimating Crosstalk Noise

    Herng-Jer LEE  Chia-Chi CHU  Wu-Shiung FENG  

     
    PAPER-Parasitics and Noise

      Vol:
    E86-A No:12
      Page(s):
    2952-2964

    A novel method is presented to compute moments of high-speed VLSI interconnects, which are modeled as coupled RLC trees. Recursive formulae of moments of coupled RC trees are extended to those for coupled RLC trees by considering both self inductances and mutual inductances. Analytical formulae for voltage moments at each node are derived explicitly. The formulae can be efficiently used for estimating delay and crosstalk noise. The inductive crosstalk noise waveform can be accurately and efficiently estimated using the moment computation technique in conjunction with the projection-based order reduction method. Fundamental aspects of the proposed approach are described in details. Experimental results show the increased accuracy of the proposed method over that of the traditional ones.

  • An Alternative Test Generation for Path Delay Faults by Using Ni-Detection Test Sets

    Hiroshi TAKAHASHI  Kewal K. SALUJA  Yuzo TAKAMATSU  

     
    PAPER-Test

      Vol:
    E86-D No:12
      Page(s):
    2650-2658

    In this paper, we propose an alternative method that does not generate a test for each path delay fault directly to generate tests for path delay faults. The proposed method generates an N-propagation test-pair set by using an Ni-detection test set for single stuck-at faults. The N-propagation test-pair set is a set of vector pairs which contains N distinct vector pairs for every transition faults at a check point. Check points consist of primary inputs and fanout branches in a circuit. We do not target the path delay faults for test generation, instead, the N-propagation test-pair set is generated for the transition (both rising and falling) faults of check points in the circuit. After generating tests, tests are simulated to determine their effectiveness for singly testable path delay faults and robust path delay faults. Results of experiments on the ISCAS'85 benchmark circuits show that the N-propagation test-pair sets obtained by our method are effective in testing path delay faults.

  • A Three-tier Active Replication Protocol for Large Scale Distributed Systems

    Carlo MARCHETTI  Sara Tucci PIERGIOVANNI  Roberto BALDONI  

     
    PAPER-Dependable Software

      Vol:
    E86-D No:12
      Page(s):
    2544-2552

    The deployment of server replicas of a service across an asynchronous distributed system (e.g., Internet) is a real practical challenge. This target cannot be indeed achieved by classical software replication techniques (e.g., passive and active replication) as these techniques usually rely on group communication toolkits that require server replicas to run over a partially synchronous distributed system to solve the underlying agreement problem. This paper proposes a three-tier architecture for software replication that encapsulates the need of partial synchrony in a specific software component of a mid-tier to free replicas and clients from the need of underlying partial synchrony assumptions. Then we propose how to specialize the mid-tier in order to manage active replication of server replicas.

  • Implementation of Java Accelerator for High-Performance Embedded Systems

    Motoki KIMURA  Morgan Hirosuke MIKI  Takao ONOYE  Isao SHIRAKAWA  

     
    PAPER-Simulation Accelerator

      Vol:
    E86-A No:12
      Page(s):
    3079-3088

    A Java execution environment is implemented, in which a hardware engine is operated in parallel with an embedded processor. This pair of hardware facilities together with an additional software kernel are devised for existing embedded systems, so as to execute Java applications more efficiently in such a way that 39 instructions are added to the original Java Virtual Machine to implement the software kernel. The exploration of design parameters is also attempted to attain a low hardware cost and high performance. The proposed hardware engine of a 6-stage pipeline can be integrated in a single chip using 30 k gates together with the instruction and data cache memories. The proposed approach improves the execution speed by a factor of 5 in comparison with the J2ME software implementation.

  • The Overview of the New Generation Mobile Communication System and the Role of Software Defined Radio Technology

    Hiroshi HARADA  Masahiro KURODA  Hiroyuki MORIKAWA  Hiromitsu WAKANA  Fumiyuki ADACHI  

     
    INVITED PAPER

      Vol:
    E86-B No:12
      Page(s):
    3374-3384

    The Communications Research Laboratory (CRL) started a new project named the New Generation Mobile Network Project in April 2002. The target of this project is the development of new technologies to enable seamless and secure integration of various wireless access networks such as 3rd and 4th generation cellular, wireless LAN, high-speed mobile wireless, wired communications, and broadcasting networks. This paper presents an overview of CRL's new generation mobile communication system that is called The Multimedia Integrated Network by Radio Access Innovation Plus (MIRAI+), as well as details the role of Software Radio Technology (SDR) in MIRAI+.

  • Parasitic Capacitance Modeling for Non-Planar Interconnects in Liquid Crystal Displays

    Sadahiro TANI  Yoshihiro UCHIDA  Makoto FURUIE  Shuji TSUKIYAMA  BuYeol LEE  Shuji NISHI  Yasushi KUBOTA  Isao SHIRAKAWA  Shigeki IMAI  

     
    PAPER-Parasitics and Noise

      Vol:
    E86-A No:12
      Page(s):
    2923-2932

    The problem of calculating parasitic capacitances between two interconnects is investigated dedicatedly for liquid crystal displays, with the main focus put on the approximate expressions of the capacitances caused at the intersection and the parallel running of two interconnects. To derive simple and accurate approximate expressions, the interconnects in these structures are divided into a few basic coupling regions in such a way that the electro-magnetic field in each region can be calculated by a 2-D capacitance model. Then the capacitance in such a region is represented by a simple expression adjusted to the results computed by an electro-magnetic field solver. The total capacitance obtained by summing the capacitances in all regions is evaluated in comparison with the one obtained by using a 3-D field solver, resulting in a relative error of less than 5%.

  • Reliability of Athermal Fiber Bragg Grating Component with Negative Thermal Expansion Ceramic Substrate

    Satoru YOSHIHARA  Takahiro MATANO  Hiroshi OOSHIMA  Akihiko SAKAMOTO  

     
    LETTER-Optoelectronics

      Vol:
    E86-C No:12
      Page(s):
    2501-2503

    A negative thermal expansion ceramic substrate and an athermal fiber Bragg grating component with the substrate were subjected to reliability tests. We confirmed that the component has adequate durability for use as optical filters in the WDM system, under test conditions of damp heat, low temperature, mechanical shock and vibration. (50 words)

  • Interleaving-Based Multiple Access and Iterative Chip-by-Chip Multiuser Detection

    Wai Kong LEUNG  Lihai LIU  Li PING  

     
    LETTER-Wireless Communication Technology

      Vol:
    E86-B No:12
      Page(s):
    3634-3637

    This letter examines a very simple iterative chip-by-chip multiuser detection strategy for spread spectrum communication systems. An interleaving-based multiple-access transmission technique is employed to facilitate detection. The proposed scheme can achieve near single-user performance in situations with very large numbers of users while maintaining very low receiver complexity.

  • Crosstalk Noise Estimation for Generic RC Trees

    Masanori HASHIMOTO  Masao TAKAHASHI  Hidetoshi ONODERA  

     
    PAPER-Parasitics and Noise

      Vol:
    E86-A No:12
      Page(s):
    2965-2973

    We propose an estimation method of crosstalk noise for generic RC trees. The proposed method derives an analytic waveform of crosstalk noise in a 2-π equivalent circuit. The peak voltage is calculated from the closed-form expression. We also develop a transformation method from generic RC trees with branches into the 2-π model circuit. The proposed method can hence estimate crosstalk noise for any RC trees. Our estimation method is evaluated in a 0.13 µm technology. The peak noise of two partially-coupled interconnects is estimated with the average error of 11%. Our method transforms generic RC interconnects with branches into the 2-π model with 14% error on average.

  • A Dynamically Adaptive Hardware on Dynamically Reconfigurable Processor

    Hideharu AMANO  Akiya JOURAKU  Kenichiro ANJO  

     
    INVITED PAPER

      Vol:
    E86-B No:12
      Page(s):
    3385-3391

    A framework of dynamically adaptive hardware mechanism on multicontext reconfigurable devices is proposed, and as an example, an adaptive switching fabric is implemented on NEC's novel reconfigurable device DRP (Dynamically Reconfigurable Processor). In this switch, contexts for the full crossbar and alternative hadware modules, which provide larger bandwidth but can treat only a limited pattern of packet inputs, are prepared. Using the quick context switching functionality, a context for the full crossbar is replaced by alternative contexts according to the packet inputs pattern. If the context corresponding to requested alternative hadware modules is not inside the chip, it is loaded from outside chip to currently unused context memory, then replaced with the full size crossbar. If the traffic includes a lot of packets for specific destinations, a set of contexts frequently used in the traffic is gathered inside the chip like a working set stored in a cache. 4 4 mesh network connected with the proposed adaptive switches is simulated, and it appears that the latency between nodes is improved three times when the traffic between neighboring four nodes is dominant.

  • Cached Shortest-Path Tree: An Approach to Reduce the Influence of Intra-Domain Routing Instability

    Shu ZHANG  Katsuyoshi IIDA  Suguru YAMAGUCHI  

     
    PAPER-Network

      Vol:
    E86-B No:12
      Page(s):
    3590-3599

    Because most link-state routing protocols, such as OSPF and IS-IS, calculate routes using the Dijkstra algorithm, which poses scalability problems, implementors often introduce an artificial delay to reduce the number of route calculations. Although this delay directly affects IP packet forwarding, it can be acceptable when the network topology does not change often. However, when the topology of a network changes frequently, this delay can lead to a complete loss of IP reachability for the affected network prefixes during the unstable period. In this paper, we propose the Cached Shortest-path Tree (CST) approach, which speeds up intra-domain routing convergence without extra execution of the Dijkstra algorithm, even if the routing for a network is quite unstable. The basic idea of CST is to cache shortest-path trees (SPTs) of network topologies that appear frequently, and use these SPTs to instantly generate a routing table when the topology after a change matches one in the caches. CST depends on a characteristic that we found from an investigation of routing instability conducted on the WIDE Internet in Japan. That is, under unstable routing conditions, both frequently changing Link State Advertisements (LSAs) and their instances tend to be limited. At the end of this paper, we show CST's effectiveness by a trace-driven simulation.

  • Adaptability Check during Software Installation in Software Defined Radio

    Yasuo SUZUKI  Hiroshi HARADA  Kazuhiro UEHARA  Teruya FUJII  Yukio YOKOYAMA  Koji ODA  Ryoichi HIDAKA  

     
    PAPER

      Vol:
    E86-B No:12
      Page(s):
    3401-3407

    This paper presents the summarized achievements of "Study Group on Software Technology for Radio Equipment" held at TELEC from April 2000 to March 2003. The Study Group specified the essential issues on Software Defined Radio (SDR), and discussed desirable methods to evaluate conformity to technical regulations in radios that can change RF characteristics only by changing software. The biggest objective in SDR is to build the architecture to allow users to install software exclusively in the combination of hardware and software that have passed the certification test. The Study Group has reached a solution by introducing the idea of "tally." This paper explains the concept of tally, and proposes two types of systems to use tallies in checking adaptability in combinations of hardware and software.

  • Detection of Autosymmetry in Logic Functions Using Spectrum Technique

    Ryoji ISHIKAWA  Goro KODA  Kensuke SHIMIZU  

     
    PAPER-Computer System Element

      Vol:
    E86-D No:12
      Page(s):
    2691-2697

    The discrete nature of data in a functional domain can generally be replaced by the global nature of data in the spectrum domain. In this paper we propose a fast procedure to detect autosymmetric function as an application of the spectrum technique. The autosymmetric function differs from the usual symmetric function and strongly relates with EXOR-based representations. It is known that many practical logical networks are autosymmetric, and this nature allows a useful functional class to realize a compact network with EXOR gates. Our procedure is able to detect autosymmetric functions quickly by using spectral coefficients. In experiments, our technique can detect the autosymmetry of most networks with a small number of checks of the spectrum.

14241-14260hit(21534hit)