Break arcs are rotated with the radial magnetic field formed by a magnet embedded in the fixed contact. They are generated in a DC42 V resistive circuit. The circuit current when the contacts are closed varies from 5 A to 21 A. The strength of a radial magnetic field for rotating break arcs changes. Arc duration is investigated. Then rotational frequency, arc length and Lorentz force when the periodic rotation of break arcs starts are analyzed to investigate the conditions required to rotate break arcs. The following results are obtained. The arc length L when the rotational motion of the break arc starts is almost constant at a constant magnetic flux density with an increase in circuit current. The arc length L decreases with an increase in the magnetic flux density of the radial magnetic field. The rotational motion of break arcs starts when the arc length L reaches a certain value determined by magnetic flux density. Rotational frequency and Lorentz force increase linearly with an increase in circuit current.

We propose a polarization mode dispersion (PMD) design for high-speed wavelength-division multiplexing (WDM) backbone network systems based on field PMD measurements on installed optical fibers for long-term commercial use. Implementing a high-speed network system on an installed fiber requires measuring PMD, because the PMD characteristics of most installed fibers are unknown. For enhanced practicality, we must be able to precisely evaluate PMD characteristics precisely with just one measurement. To understand the statistical properties of measured PMD values, we use the Jones Matrix Eigenanalysis (JME) method to conduct long-term (12 months) PMD measurements on installed fibers. We statistically analyze the measurement results and confirm that the measured values match the theory that considers the accuracy of the measurement instrument. This enables a PMD design of desired outage probability based on PMD measurements of installed fibers. We also carry out a 43-Gb/s return-to-zero differential quadrature phase shift keying (RZ-DQPSK) signal transmission with high PMD fibers in order to confirm the effectiveness of our PMD design. The PMD values of the in-line amplifier transmission line are settled so as to meet the worst value of the design. We confirm that 43-Gb/s RZ-DQPSK signals are stably transmitted at the design value.

We demonstrate a single-channel 1.28 Tbit/s-525 km transmission using OTDM of subpicosecond DQPSK signals. In order to cope with transmission impairments due to time-varying higher-order PMD, which is one of the major limiting factors in such a long-haul ultrahigh-speed transmission, we newly developed an ultrafast time-domain optical Fourier transformation technique in a round-trip configuration. By applying this technique to subpicosecond pulses, transmission impairments were greatly reduced, and BER performance below FEC limit was obtained with increased system margin.

A novel approach for fast traffic classification for the high speed networks is proposed, which bases on the protocol behavior statistical features. The packet size and a new parameter named "Estimated Protocol Processing Time" are collected from the real data flows. Then a set of joint probability distributions is obtained to describe the protocol behaviors and classify the traffic. Comparing the parameters of an unknown flow with the pre-obtained joint distributions, we can judge which application protocol the unknown flow belongs to. Distinct from other methods based on traditional inter-arrival time, we use the "Estimated Protocol Processing Time" to reduce the location dependence and time dependence and obtain better results than traditional traffic classification method. Since there is no need for character string searching and parallel feature for hardware implementation with pipeline-mode data processing, the proposed approach can be easily deployed in the hardware for real-time classification in the high speed networks.

This paper presents a newly developed small-sized shaped beam base station antenna in order to reduce inter-sector interference for next generation high speed wireless data communication systems. The developed antenna realizes polarization diversity as a single small-sized antenna without decreasing the 3 dB main beamwidth compared with the conventional antenna by applying a newly designed beam shaping method. Furthermore, side sub-reflectors are newly installed in the radome to reduce the antenna beam gain in the direction toward the edge region neighboring the other sectors of the horizontal antenna pattern. By adopting this type of reflector, the diameter of the radome can be minimized at 0.65 λ, which is slightly longer than that of the conventional antenna. Both a computer simulation and a field measurement test based on an actual cellular network were conducted for the purpose of clarifying the validity of the shaped beam antenna. In the results, the CINR at the service area by the shaped beam antenna was 1 dB and 3.5 dB better than that of the conventional antenna at the median and 10% of CDF, respectively. The developed antenna will be expected to contribute to the enhancement of the quality of cellular radio systems in the future.

Break arcs are generated between pure silver electrical contacts in a DC high-voltage resistive circuit. The break arc is driven by the external magnetic field of a permanent magnet from horizontal direction of contacts. Electrical contacts are separated at constant opening speed at 75 mm/s. The maximum supply voltage is 300 V. The maximum circuit current when electrical contacts are closed is 20 A. The maximum output power of the supply is limited to 6.0 kW. The gap between the contacts and the magnet is defined as x. The gap is varied from 2.5 mm to 10.0 mm to change the magnetic flux density that affects the break arc. The break arc is observed with a high-speed camera. The effect of the magnetic field on the arc duration was examined. As a result, break arcs are successfully extinguished by the transverse magnetic field when the gap x is 2.5 mm. Then the length of the break arc just before lengthening of the break arc L and the Lorentz force that affects the break arc F are examined. The length L was almost constant for each gap x and independent of the circuit current I and the Lorentz force F. The break arc is driven by the magnetic field when the arc length reached a certain length that was determined by the strength of the magnetic flux density.

A monolithic modulator driver IC based on InP HBTs with a new circuit topology -- called a functional distributed circuit (FDC) -- for over 80-Gb/s optical transmission systems has been developed. The FDC topology includes a wide-band amplifier designed using a distributed circuit, a digital function designed using a lumped circuit, and broadband impedance matching between the lumped circuit and distributed circuit to enable both wider bandwidth and digital functions. The driver IC integrated with a 2:1 multiplexing function produces 2.6-Vp-p (differential output: 5.2 Vp-p) and 2.4- Vp-p (differential output: 4.8 Vp-p) output-voltage swings with less than 450-fs and 530-fs rms jitter at 80 Gb/s and 90 Gb/s, respectively. To the best of our knowledge, this is equivalent to the highest data rate operation yet reported for monolithic modulator drivers. When it was mounted in a module, the driver IC successfully achieved electro-optical modulation using a dual-drive LiNbO3 Mach-Zehnder modulator up to 90 Gb/s. These results indicate that the FDC has the potential to realize high-speed and functional ICs for over-80-Gb/s transmission systems.

This paper presents a Pulse-Width Modulation (PWM) pre-emphasis technique which utilizes time-domain information processing to increase the data rate for a given bandwidth of interconnection. The PWM pre-emphasis method does not change the pulse amplitude as for conventional FIR pre-emphasis, but instead exploits timing resolution. This fits well with recent CMOS technology trends toward higher switching speeds and lower supply voltage. We discuss multiple-valued data transmission based on time-domain pre-emphasis techniques in consideration of higher-order channel effects. Also, a new data-dependent adaptive time-domain pre-emphasis technique is proposed to compensate for the data-dependent jitter.

Noise coupling on the power distribution networks (PDN) or between PDN and signal traces is becoming one of the main challenges in designing above GHz high-speed digital circuits. Developing an efficient and accurate modeling method is essential to understand the noise coupling mechanism and then solve the problem afterwards. In addition, development of new noise mitigation technology is also important for future high-speed circuit systems. In this invited paper, a novel modeling methodology that is based on the physics-based equivalent circuit model will be introduced, and an example of multiple layer PCB circuits will be modeled and validated with good accuracy. Based on the periodic structure concept, several new electromagnetic bandgap structures (EBG), such as coplanar EBG, photonic crystal power layer (PCPL), and ground surface perturbation lattice (GSPL), will be introduced for the mitigation of power/ground noise. The trade/offs of all these structures will be discussed.

We investigated the effect of a high-speed power line communication (PLC) signal induced into a very high-speed digital subscriber line (VDSL) system by conductive coupling based on a network model. Four electronic devices with AC mains and telecommunication ports were modeled using a 4-port network, and the parameters of the network were obtained from measuring impedance and transmission loss. We evaluated the decoupling factor from the mains port to the telecommunication port of a VDSL modem using these parameters for the four electric and electronic devices. The results indicate that the mean value of the decoupling factor for the differential and common mode signals were more than 88 and 62 dB, respectively, in the frequency range of a PLC system. Taking the following parameters into consideration; decoupling factor Ld, the average transmission signal powers of VDSL and PLC, desired and undesired (DU) ratio, and transmission loss of a typical 300-m-long indoor telecommunication line, the VDSL system cannot be disturbed by the PLC signal induced into the VDSL modem from the AC mains port in normal installation.

This paper presents a CMOS signal detection circuit for 2.5 Gb/s serial data communication system over FR-4 backplane. This overcomes characteristics deviation of full-wave rectifier-based simple power detection circuits due to data pattern and temperature by using an edge detector and a sample-hold circuit.

The multilevel dual-channel (MLDC) not-AND (NAND) flash memories cell structures with asymmetrically-doped channel regions between the source and the drain were proposed to enhance read and program verifying speeds. The channel structure of the MLDC flash memories consisted of two different doping channel regions. The technical computer aided design simulation results showed that the designed MLDC NAND flash cell with asymmetrically-doped channel regions provided the high-speed multilevel reading with a wider current sensing margin and the high-speed program verifying due to the sensing of the discrete current levels. The proposed unique MLDC NAND flash memory device can be used to increase read and program verifying speed.

With the emergence of bandwidth-greedy application services, high-speed transport protocols are expected to effectively and aggressively use large amounts of bandwidth in current broadband and multimedia networks. However, when high-speed transport protocols compete with other standard TCP flows, they can occupy most of the available bandwidth leading to disruption of service. To deploy high-speed transport protocols on the Internet, such unfair situations must be improved. In this paper, therefore, we propose a method to improve fairness, called Kyushu-TCP (KTCP), which introduces a non-aggressive period in the congestion avoidance phase to give other standard TCP flows more chances of increasing their transmission rates. This method improves fairness in terms of the throughput by estimating the stably available bandwidth-delay product and adjusting its transmission rate based on this estimation. We show the effectiveness of the proposed method through simulations.

In this paper, new structure of Voltage-Mode MAX-MIN circuit are presented for nonlinear systems, fuzzy applications, neural network and etc. A differential pair with improved cascode current mirror is used to choose the desired input. The advantages of the proposed structure are high operating frequency, high precision, low power consumption, low area and simple expansion for multiple inputs by adding only three transistors for each extra input. The proposed circuit which is simulated by HSPICE in 0.35 µm CMOS process shows the total power consumption of 85 µW in 5 MHz operating frequency from a single 3.3-V supply. Also, the total area of the proposed circuit is about 420 µm2 for two input voltages, and would be negligibly increased for each extra input.

The paper introduces both high-speed transmission and quality of system to offer the Internet services on a HFC (Hybrid Fiber Coaxial) network. This utilizes modulating the phase and the amplitude to the signal of the IPMS (Internet Protocol Multicasting Service). An IP-cable transmitter, IP-cable modem, and IP-cable management servers that support 30-Mbps IPMS on the HFC were developed. The system provides a 21 Mbps HDTV transporting stream on a cable TV network. It can sustain a clear screen for a long time.

We investigate numerically the applicability of photonic crystal fiber (PCF) with a uniform air hole structure as a wide-band transmission medium. We show that accumulated dispersion over the PCF can be reduced effectively by optimizing the index profile of dispersion compensating fiber (DCF). We also show that a bandwidth of more than 300 nm will be available for 40 Gbit/s NRZ transmission by using the PCF as a transmission medium instead of conventional 1.3 µm zero-dispersion single-mode fiber (SMF).

Break arcs are generated between silver electrical contacts in a DC 42 V-10 A resistive circuit. Break arcs are driven by the radial magnetic field. The magnetic field is formed between the electrical contacts with a permanent magnet embedded in the cathode. The arc motion is taken with a high-speed camera and contact surfaces are observed after break operations. Experimental results with the magnet are compared with those without the magnet to confirm the effect of the embedded magnet. For break operations with the magnet following results are shown. Break arcs are rotationally driven by the radial magnetic field in the direction according to Lorentz force. The shortening effect of the arc duration is confirmed. The traces of the arc spots on the contact surfaces are ring-shaped, wide and uniform. This result shows the prevention effect of local erosion of electrical contacts. The rotational frequency of the break arc depends on the Lorentz force with the radial magnetic field.

We have developed InGaAs-based VCSELs operating around 1.1 µm for high-speed optical interconnections. By applying GaAsP barrier layers, temperature characteristics were considerably improved compared to GaAs barrier layers. As a result, 25 Gbps 100 error-free operation was achieved. These devices also exhibited high reliability. No degradation was observed over 3,000 hours under operation temperature of 150 and current density of 19 kA/cm2. We also developed VCSELs with tunnel junctions for higher speed operation. High modulation bandwidth of 24 GHz and a relaxation oscillation frequency of 27 GHz were achieved. 40 Gbps error-free operation was also demonstrated.

This paper investigates and analyzes the resistive averaging network and interpolation technique to estimate the power consumption of preamplifier arrays in a flash analog-to-digital converter (ADC). By comparing the relative power consumption of various configurations, flash ADC designers can select the most power efficient architecture when the operation speed and resolution of a flash ADC are specified. Based on the quantitative analysis, a compact 5-bit flash ADC is designed and fabricated in a 0.13-µm CMOS process. The proposed ADC consumes 180 mW from a 1.2-V supply and occupies 0.16-mm2 active area. Operating at 3.2 GS/s, the ENOB is 4.44 bit and ERBW 1.65 GHz. At 4.2 GS/s, the ENOB is 4.20 bit and ERBW 1.75 GHz. This ADC achieves FOMs of 2.59 and 2.80 pJ/conversion-step at 3.2 and 4.2 GS/s, respectively.

This paper proposes a low-voltage high-speed sample-and-hold (S/H) structure with excellent power efficiency. Based on the switched-opamp technique, an inverse-flip-around architecture which maximizes the feedback factor is employed in the proposed S/H. A skew-insensitive double-sampling mechanism is presented to increase the throughput by a factor of two while eliminating the timing mismatch associated with double-sampling circuits. Furthermore, a dual-input dual-output opamp is proposed to incorporate double-sampling into the switched-opamp based S/H. This opamp also removes the memory effect in double-sampling circuitry and features fast turn-on time to improve the speed performance in switched-opamp circuits. Simulation results using a 0.13-µm CMOS process model demonstrates the proposed S/H circuit has a total-harmonic-distortion of -67.3 dB up to 250 MSample/s and a 0.8 VPP input range at 0.8 V supply. The power consumption is 3.5 mW and the figure-of-merit is only 7.4 fJ/step.