A programmable clock generator, based on a phase-locked loop (PLL) circuit, has been developed with 0.5 µm CMOS triple-layer Al interconnection technology for use as an on-chip clock generator in a 300-MHz video signal processor. The PLL-based clock generator generates a clock signal whose frequency ranges from 50 to 350 MHz which is an integral multiple, from 2 to 16, of an external clock frequency. In order to achieve stable operation within this wide range, a voltage controlled oscillator (VCO) with selectable low VCO gain characteristics has been developed. Experimental results show that the clock generator generates a 297-MHz clock with a 27-MHz external clock, with jitter of 180 ps and power dissipation of 120 mW at 3.3-V power supply, and it can also oscillate up to 348 MHz with a 31.7-MHz external clock.

A 3.2 GHz, 50 mW, 1 V, GaAs clock pulse generator (CG) based on a phase-locked loop (PLL) circuit has been designed for use as an on-chip clock generator in future high speed processor LSIs. 0.5 µm GaAs MESFET and DCFL circuit technologies have been used for the CG, which consists of 224 MESFETs. An "enhanced charge-up current" inverter has been specially designed for a low power and high speed voltage controlled oscillator (VCO). In this new inverter, a voltage controlled dMESFET is combined in parallel with the load dMESFET of a conventional DCFL inverter. This voltage controlled dMESFET produces an additional charge-up current resulting in the new VCO obtaining a much higher oscillation frequency than that of a ring oscillator produced with a conventional inverter. With a single 1 V power supply (Vdd), SPICE calculation results showed that the VCO tuning range was 2.25 GHz to 3.65 GHz and that the average VCO gain was approximately 1.4 GHz/V in the range of a control voltage (Vc) from 0 to 1 V. Simulation also indicated that at a Vdd of 1 V the CG locked on a 50 MHz external clock and generated a 3.2 GHz internal clock (=50 MHz64). The jitter and power dissipation of the CG at 3.2 GHz oscillation and a Vdd of 1 V were less than 8.75 psec and 50 mW, respectively. The typical lock range was 2.90 GHz to 3.59 GHz which corresponded to a pull-in range of 45.3 MHz to 56.2 MHz.

OFDM (Orthogonal Frequency Division Multiplexing) is a useful digital modulation method for terrestrial digital broadcasting systems, both for digital TV broadcasting and digital audio broadcasting. OFDM is a kind of multicarrier modulation and shows excellent performance especially in multipath environments and in mobile reception. Other advantages are its resistance to interference signals and its suitability for digital signal processing. When each carrier of the OFDM signal is modulated with DQPSK, we call it DQPSK-OFDM. DQPSK-OFDM is a basic OFDM system, which is especially suitable for mobile reception. This paper describes how a DQPSK-OFDM system works and shows several experimental and simulation results. The experimental results mainly concern the performance of the DQPSK-OFDM system relative to various disturbances such as multipath (ghost) signals, nonlinearity of the channel, and interference from analog signals. The transmission characteristics of DQPSK-OFDM are investigated and the basic criteria for the system design of DQPSK-OFDM are discussed.

This paper presents a heuristic floorplanning method that improves the method proposed by Vijayan and Tsay. It is based on tentative insertion of constraints, that intentionally produces redundant constraints to make it possible to search in a wide range of solution space. The proposed method can reduce the total area of blocks with the removal and insertion of constraints on the critical path in both horizontal and vertical constraint graphs. Experimental results for MCNC benchmarks showed that the quality of solutions of the proposed method is better than [7],[8] by about 15% on average, and even for the large number of blocks, the proposed method keeps the high quality of solutions.

The Hyper Hospital" is a novel medical care system which will be constructed on an electronic information network. The human interface of the Hyper Hospital based on the modern virtual reality technology is expected to enhance patients' ability to heal by providing computer-supported on-line visual consultations. In order to investigate the effects and features of on-line visual consultations in the Hyper Hospital, we conducted an experiment to clarify the influence of electronic interviews on the talking behavior of interviewees in the context of simulated doctor-patient interactions. Four types of distant-confrontation interviews were made with voluntary subjects and their verbal and non-verbal responses were analyzed from the behavioral point of view. The types of interviews included three types of electronic media-mediated interviews and one of a live face to face interview. There was a tendency in the media-mediated interviews that both the latency and the duration of interviewees' utterances in answering questions increased when they were compared with those of live face to face interviews. These results suggest that the interviewee became more verbose or talkative in the media-mediated interviews than in the live interviews. However, the interviewee's psychological tension was generally augmented in the media-mediated interviews, which was suggested by the delay of the initiation of conversations as compared to the conventional face-to-face interviews. We also discuss the applicability of media-mediated interviews by an electronic doctor which we are studying as a functional unit of our Hyper Hospital, a network based virtual reality space for medical care.

In the modern hospital, the physical or chemical therapeutic procedure is regarded as paramount and psychological or spiritual care is quite frequently put aside. The goal of the Hyper Hospital" is to correct this. The Hyper Hospital is constructed in the computer based electronic network using an alternate reality system, such as the virtual reality system, as the human-machine-human interface. The nodes of the Hyper Hospital belong to a patient and also to a variety of medical care facilities; for example, the out patient office, the nursing care center, the medical examination unit, the operating theater, etc. The Hyper Hospital space consists of various kind of spaces including the alternate reality space owned and exclusively controlled by the patient himself or herself, and even the real space as well. Most of the physical contact, such as the visit to the out patient office by the patient, is actualized by the electronic connection of the patient private space and the public space of the hospital system. Prescription drugs, special care, and even the admission to the ward will be integrated into the distributed electronic network. To realize such a system, we need to solve many problems, such as the research on the network oriented architecture of the alternate reality, the development of human-machine interface particularly fitted to various disabilites, the study of the behavior of normal and diseased people, etc. The concept of the Hyper Hospital we are proposing is believed to be a new paradigm of the next generation of medical care.

This paper presents a new sort of multilayer piezoelectric ceramic transformer for switching regulated power supplies. This piezoelectric transformer operates in the second thickness extensional vibration mode. Its resonant frequency is higher than 1 MHz. First, numerical simulation was implemented using a distributed constant electromechanical equivalent circuit method. It was calculated that this piezoelectric transformer, which has higher than 200 mechanical quality factor Qm, could work with higher than 90% efficiency and in more than 20-W/cm3 high power density. Second, a trially fabricated transformer, which is 15 mm long, 15 mm wide and 2.2 mm thick, was examined. Modified PbTiO3 family ceramics were used for the piezoelectric transformer material, because of the large anisotropy between electromechanical coupling factors kt and kp. Obtained results indicate that the piezoelectric transformer has good resonant characteristics, with little spurious vibration, and exhibits 16-W/cm3 power density with high efficiency at 2 MHz. Moreover, a switching regulated power supply, applying the piezoelectric ceramic transformer, was built and examined.

Technology mapping algorithms for LUT (Look Up Table) based FPGAs have been proposed to transfer a Boolean network into logic-blocks. However, since those algorithms take no layout information into account, they do not always lead to excellent results. In this paper, a simultaneous technology mapping, placement and global routing algorithm for FPGAs, Maple, is presented. Maple is an extended version of a simultaneous placement and global routing algorithm for FPGAs, which is based on recursive partition of layout regions and block sets. Maple inherits its basic process and executes the technology mapping simultaneously in each recursive process. Therefore, the mapping can be done with the placement and global routing information. Experimental results for some benchmark circuits demonstrate its efficiency and effectiveness.

This paper proposes a new signaling technique which employs multilevel block codes in conjunction with phase/frequency modulation. The proposed scheme exhibits an increased minimum squared Euclidean distances (MSEDs) and outperforms other conventional schemes in terms of asymptotic coding gain and decoding complexity. The proposed scheme is also considered for non-constant amplitudes, which turned out to show even better performances at small modulation indices in some cases. Examples are given to demonstrate how to optimize the signal set for a given block code to maximize the coding gain.

A beam adaptive frame for finite-element beam-propagation analysis is proposed. The width of the frame can be adapted itself to either the guiding structure or the propagating beam in optical circuits, so the size of the computational window can be reduced.

This paper compares three typical system-sharing configurations for FTTH networks that provide narrowband and video distribution services and proposes a remote node locating strategy for each configuration. Two new evaluation factors, required land space and service provisioning effort, are included in the calculation, in addition to facility cost and maintenance effort. By considering these factors together, the total network cost is calculated and the sensitivity to the number of remote nodes is evaluated. Finally, the most economical system-sharing configuration is identified on the basis of the evaluations for two typical service areas in Japan, for both present and future cost environments.

A Trellis-Coded 8PSK (TCM) modem has been developed. This modem can transmit HDTV programs at a bit rate of 60Mbps over a satellite channel. In addition to Trellis coding, the (255, 235) Reed-Solomon code is adopted together with an interleaving technique to improve bit error performance. As a result, it has been confirmed that bit error rate of 10-10 is achievable at a carrier to noise ratio of around 8.5dB over a 30MHz Gaussian noise channel. This TCM modem is also designed to double as a DQPSK modem. We examined the performances of these two modulation methods in a nonlinear channel. It was found that TCM is less disturbed than DQPSK by nonlinear distortion due to TWT. In addition, a limiter amplifier cascaded to TWT improves DQPSK performance and disturbs TCM performance. However it was confirmed that TCM still has a coding gain of 3dB over DQPSK.

The graph bisection problem is to partition a given graph into two subgraphs with equal size with minimizing the cutsize. This problem is NP-hard, and hence several heuristic algorithms have been proposed. Among them, the Kernighan-Lin algorithm and the Fiduccia-Mattheyses algorithm are well known, and widely used in practical applications. Since those algorithms are iterative improvement algorithms, in which the current solution is iteratively improved by interchanging a pair of two nodes belonging to different subgraphs, or moving one node from one subgraph to the other, those algorithms tend to fall into a local optimum. In this paper, we present a heuristic algorithm based on subgraph migration to avoid falling into a local optimum. In this algorithm, an initial solution is given, and it is improved by moving a subgraph, which is effective to reduce the cutsize. The algorithm repeats this operation until no further improvement can be achieved. Finally, the balance of the bisection is restored by moving nodes to get a final solution. Experimental results show that the proposed algorithm gets better solutions than the Kernighan-Lin and Fiduccia-Mattheyses algorithms.

Mixed-signal LSIs promise to permit increased levels of integration, not only in voiceband but also in multi-GHz-band applications such as wireless communications and optical data links. This paper reviews the evolution of mixed-signal communications LSIs and discusses some of their design problems, including device noise and crosstalk noise. In the low-power and low-voltage designs emerging as new disciplines, the target supply voltage for voiceband LSIs is around 1 V, and even GHz-band circuits are approaching 2 V. MOS devices are expected to play an important role even in the frequency range over 100 MHz, in the area of wireless or optical communications circuits.

Processing elements (PEs) with a dynamically reconfigurable pipeline architecture allow the high-speed calculation of widely used neural model which is multi-layer perceptrons with the backpropagation (BP) learning rule. Its architecture that was proposed for a single chip is extended to multiprocessors' structure. Each PE holds an element of the synaptic weight matrix and the input vector. Multi-local buses, a swapping mechanism of the weight matrix and the input vector, and transfer commands between processor elements allow the implementation of neural networks larger than the physical PE array. Estimated peak performance by the measurement of single processor element is 21.2 MCPS in the evaluation phase and 8.0 MCUPS during the learning phase at a clock frequency of 50 MHz. In the model, multi-layer perceptrons with 768 neurons and 131072 synapses are trained by a BP learning rule. It corresponds to 1357 MCPS and 512 MCUPS with 64 processor elements and 32 neurons in each PE.

In this letter an SR-latch circuit using Hopfield neural networks is introduced. An energy function suited for a neural SR-latch circuit is defined for which the global convergence is guaranteed. We also demonstrate how to compose master-slave (M/S) SR- and JK-flip flops of novel SR-latch circuits, and further an asynchronous binary counter of M/S JK-flip flops. Computer simulations are included to illustrate how each presented circuit operates.

A new rate-controlled queueing discipline, called virtual rate-based queueing (VRBQ), is proposed for packet-switching nodes in connection-oriented, high-speed, wide-area networks. The VRBQ discipline is based on the virtual rate which has a value between the average and peak transmission rates. By choosing appropriate virtual rates, various requirements can be met regarding the performance and quality of services in integrated-service networks. As the worst-case performance guarantee, we determine the upper bounds of queueing delay when VRBQ is combined with an admission control mechanism, i.e., Dynamic Time Windows or Leaky Bucket. Simulation results demonstrate the fairness policy of VRBQ in comparison with other queueing disciplines, and the performance of sources controlled under different virtual rates.

This paper first proposes an object-oriented service network model, which is composed of application, server and resource object groups, from both viewpoints of rapid and smooth introduction and effective execution of the next generation IN services. The paper also, proposes a testbed system, which is referred to as "To-be-IN (Testbed on Object-oriented and B-ISDN Environment for IN)", for evaluating network architecture based on the proposed model. Using the testbed, several technical issues can be solved such as object-oriented realization of IN services, a provision of distribution transparent environment and a transition strategy from today's IN network. The testbed system is constructed on a currently available computing environment in which a distribution transparency mechanism is added. This system provides Service Creation Environment (SCE) for a purpose of achieving seamless software transfer from a development phase to an operation phase in the object-oriented service network model. The paper finally summarizes some results of an experimental implementation of the system.

In this paper, we developed the analytical method for the radiation field from a line current source placed in a stratified slab waveguide. This method is applicable to the analysis of excitation problem of inhomogeneous slab waveguide by increasing the number of layers. The numerical results are given for the cases of five layers, such as W and M type waveguides, and the inhomogeneous slab waveguide. The influence of guided and leaky modes on the radiation field are studied.

Transistor stuck–open faults in CMOS devices are such that they force combinational circuits to exhibit sequential behaviors. It has been proved that, in general, stuck–open faults can not be modeled as stuck–at faults and, therefore, a sequence of two consecutive test vectors is necessary to guarantee stuck–open fault detection. In this paper we propose a technique to modify CMOS circuits in such a way that any stuck–open fault in the circuit can be detected using only a single test pattern. The amount of additional logic required to achieve the goal is rather limited: Two pass transistors, one input line, and one inverter (or buffer) at the output of the circuit are sufficient to make stuck–open faults detectable by test patterns generated by usual stuck–at fault test generators.