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  • Approximation of Chaotic Behavior by Using Neural Network

    Itaru NAGAYAMA  Norio AKAMATSU  

     
    PAPER-Network Synthesis

      Vol:
    E77-D No:4
      Page(s):
    450-458

    In this paper, we show that the neural network can approximate the chaotic behavior in nonlinear dynamical system by experimental study. Chaotic neural activities have been reported in many respects including neural network field. On the contrary, can the neural network learn the chaotic behavior? There have been explored the neural network architecture for predicting successive elements of a sequence. Also there have been several studies related to learning algorithms for general recurrent neural networks. But they often require complicated procedure in time calculation. We use simple standard backpropagation for a kind of simple recurrent neural network. Two types of chaotic system, differential equation and difference equation, are examined to compare characteristics. In the experiments, Lorenz equation is used as an example of differential equation. One-dimensional logistic equation and Henon equation are used as examples of difference equation. As a result, we show the approximation ability of chaotic dynamics in difference equation, which is logistic equation and Henon equation, by neural network. To indicate the chaotic state, we use Lyapunov exponent which represents chaotic activity.

  • Highly Reliable Ultra-Thin Tantalum Oxide Capacitors for ULSI DRAMs

    Satoshi KAMIYAMA  Hiroshi SUZUKI  Pierre-Yves LESAICHERRE  Akihiko ISHITANI  

     
    PAPER-Device Technology

      Vol:
    E77-C No:3
      Page(s):
    379-384

    This paper describes the formation of ultra-thin tantalum oxide capacitors, using rapid thermal nitridation (RTN) of the storage-node polycrystalline-silicon surface prior to low-pressure chemical vapor deposition of tantalum oxide, using penta-ethoxy-tantalum [(Ta(OC2H5)5) and oxygen gas mixture. The films are annealed at 600-900 in dry O2 atmosphere. Densification of the as-deposited film by annealing in dry O2 is indispensable to the formation of highly reliable ultra-thin tantalum oxide capacitors. The RTN treatment reduces the SiO2 equivalent thickness and leakage current of the tantalum oxide film, and improves the time dependent dielectric breakdown characteristics of the film.

  • High Speed Electron Beam Cell Projection Exposure System

    Yoshihiko OKAMOTO  Norio SAITOU  Haruo YODA  Yoshio SAKITANI  

     
    PAPER-Process Technology

      Vol:
    E77-C No:3
      Page(s):
    445-452

    An electron beam cell projection system has been developed that can effectively expose the fine, demagnified resultant pattern of repeated and non-repeated patterns such as the 256 Mb DRAM on a semiconductor wafer. Particular attention was given to the beam shaping and deflecting optics, which has two stage deflectors for the cell projection beam selection as well as the beam sizing, and three stage deflectors for objective deflection. The cell mask with a rectangular aperture and multiple figure apertures is fabricated by modified Si wafer processes. A new exposure control data for the cell projection is proposed. This data is fitted for the combination of pattern data for the cell mask projection and pattern data for the variable rectangular shape beam within the divided units of the objective deflection. On this exposure system, selective exposure of the desired pattern becomes possible on the semiconductor wafer while a mounting stage of the wafer is being moved, even if the pattern exposure of the repeated and non-repeated patterns is to be carried out. The total overhead time for selecting a subset of multiple figures and a rectangular aperture of the cell mask is less than 5 seconds/wafer. The estimated throughput of this system is approximately 20 wafers/hour.

  • Performance Bounds for MLSE Equalization and Decoding with Repeat Request for Fading Dispersive Channels

    Hiroshi NOGAMI  Gordon L. STÜBER  

     
    PAPER-Information Theory and Coding Theory

      Vol:
    E77-A No:3
      Page(s):
    553-562

    Upper bounds on the bit error probability and repeat request probability, and lower bounds on the throughput are derived for a Hybrid-ARQ scheme that employs trellis-coded modulation on a fading dispersive channel. The receiver employs a modified Viterbi algorithm to perform joint maximum likelihood sequence estimation (MLSE) equalization and decoding. Retransmissions are generated by using the approach suggested by Yamamoto and Itoh. The analytical bounds are extended to trellis-coded modulation on fading dispersive channels with code combining. Comparison of the analytical bounds with simulation results shows that the analytical bounds are quite loose when diversity reception is not employed. However, no other analytical bounds exist in the literature for the trellis-coded Hybrid ARQ system studied in this paper. Therefore, the results presented in this paper can provide the basis for comparison with more sophisticated analytical bounds that may be derived in the future.

  • Optimization of Optical Parameters in KrF Excimer Laser Lithography for Quarter-Micron Lines Pattern

    Keiichiro TOUNAI  Kunihiko KASAMA  

     
    PAPER-Process Technology

      Vol:
    E77-C No:3
      Page(s):
    425-431

    Optical parameters of KrF excimer laser stepper are optimized for 0.25 µm level patterning by means of a light intensity simulation method. The light intensity simulation method is applied conventional and two modified illuminations (annular and 4-point) to improve the depth of focus (DOF) at 0.25 µm periodic lines and spaces pattern (L&S). Simulation results obtained are; (1) the DOF of conventional illumination is not sufficient even in the optimum condition (NA=0.5, σ=0.8), (2) more than 1.5 µm DOF could be achieved with an annular illumination, if present resist performance is improved slightly, and (3) wider DOF is obtained in the case of with 4-point illumination. However, the DOF is rather degraded in the specific sized (near double/triple sized) region and oblique pattern, therefore the application of this illumination is restricted into some specific mask layout pattern.

  • Broadband Communication Network Architecture for Distributed Computing Environments

    Akira CHUGO  Kazuo SAKAGAWA  Teruhisa NAKAMURA  Jun OGAWA  

     
    PAPER

      Vol:
    E77-B No:3
      Page(s):
    343-350

    It is important for distributed computing environments that communication networks are transparent to applications. This allows applications to make the best use of computer resources, To realize network transparency, communication platforms which support distributed computing environments should have a system configuration like an extension of a workstation's internal bus. Such communication platforms require high-speed communication paths, ability to handle different transmission speeds, high reliability, and scalability. This paper proposes a broadband distributed data network which satisfies the above requirements, and provides a distributed computing environment. Our system uses basic nodes called ATM-HUBs and ATM-Gateways (ATM-GWs) as its central components. The nodes consist of cell switch modules which can be made up of building blocks, ATM interface modules, and other functional modules. The switch module is connected to functional modules through a unified interface. The ATM-HUB in particular has conventional LAN interface modules. Using the conventional LAN interface and ATM interface module in an ATM-HUB, a wide variety of terminals, including conventional LAN terminals and ATM terminals, can be accommodated, so offering flexibility of communication modes to users. Furthermore, the use of star wiring around the ATM-HUB and media access control (MAC) address routing gives a higher transfer rate comparable to the speed of a physical transmission line for communication between ATM terminals, or between conventional LAN terminals.

  • LAN Internetworking through Broadband ISDN

    Masayuki MURATA  Hideo MIYAHARA  

     
    INVITED PAPER

      Vol:
    E77-B No:3
      Page(s):
    294-305

    A local area network (LAN) can now provide high-speed data communications in a local area environment to establish distributed processing among personal computers and workstations, and the need for interconnecting LANs, which are geographically distributed, is naturally arising. Asynchronous Transfer Mode (ATM) technology has been widely recognized as a promising way to provide the high-speed wide area networks (WAN) for Broadband Integrated Services Digital Network (B-ISDN), and the commercial service offerings are expected in the near future. The ATM network seems to have a capability as a backbone network for interconnecting LANs, and the LAN interconnection is expected to be the first service in ATM networks. However, there remain some technical challenges for this purpose; one of the main difficulties in LAN interconnection is the support of connectionless traffic by the ATM network, which is basically a connection-oriented network. Another one is the way of achieving the very high-speed data transmission over the ATM network. In this paper, we first discuss a LAN internetworking methodology based on the current technology. Then, the recent deployments of LAN interconnection methods through B-ISDN are reviewed.

  • Design Rule Relaxation Approach for High-Density DRAMs

    Takanori SAEKI  Eiichiro KAKEHASHI  Hidemitu MORI  Hiroki KOGA  Kenji NODA  Mamoru FUJITA  Hiroshi SUGAWARA  Kyoichi NAGATA  Shozo NISHIMOTO  Tatsunori MUROTANI  

     
    PAPER-Device Technology

      Vol:
    E77-C No:3
      Page(s):
    406-415

    A design rule relaxation approach is one of the most important requirements for high density DRAMs. The approach relaxes the design rule of a element in comparison with the memory cell size and provides high density DRAMs with the minimum development of a scaled-down MOS structure and a fine patterning lithography process. This paper describes two design rule relaxation approaches, a close-packed folded (CPF) bit-line cell array layout and a Boosted Dual Word-Line scheme. The CPF cell array provides 1.26 times wider active area pitch and maximum 1.5 times wider isolation width. The Boosted Dual Word-Line scheme provides 2n times wider 1st Al pitch on memory cell array, double word-line driver pitch and 1.5 times larger design rule for 1st Al and contacts under 1st Al. Especially wide design rule of the Boosted Dual Word-Line scheme provides several times depth of focus (DOF) for 1st Al wiring which gives several times higher storage node and larger capacitance for capacitor over bit-line (COB) stacked capacitor cells. These approaches are successfully implemented in a 4 Mb DRAM test chip with a 0.91.8 µm2 memory cell.

  • Influences of Magnesium and Zinc Contaminations on Dielectric Breakdown Strength of MOS Capacitors

    Makoto TAKIYAMA  Susumu OHTSUKA  Tadashi SAKON  Masaharu TACHIMORI  

     
    PAPER-Process Technology

      Vol:
    E77-C No:3
      Page(s):
    464-472

    The dielectric breakdown strength of thermally grown silicon dioxide films was studied for MOS capacitors fabricated on silicon wafers that were intentionally contaminated with magnesium and zinc. Most of magnesium was detected in the oxide film after oxidation. Zinc, some of which evaporated from the surface of wafers, was detected only in the oxide film. The mechanism of the dielectric degradation is dominated by formation of metal silicates, such as Mg2SiO4 (Forsterite) and Zn2SiO4 (Wilemite). The formation of metal silicates has no influence on the generation lifetime of minority carriers, however, it provides the flat-band voltage shift less than 0.3 eV, and forces to increase the density of deep surface states with the zinc contamination.

  • Automatic Color Segmentation Method Using a Neural Network Model for Stained Images

    Hironori OKII  Noriaki KANEKI  Hiroshi HARA  Koichi ONO  

     
    PAPER-Bio-Cybernetics

      Vol:
    E77-D No:3
      Page(s):
    343-350

    This paper describes a color segmentation method which is essential for automatic diagnosis of stained images. This method is applicable to the variance of input images using a three-layered neural network model. In this network, a back-propagation algorithm was used for learning, and the training data sets of RGB values were selected between the dark and bright images of normal mammary glands. Features of both normal mammary glands and breast cancer tissues stained with hematoxylin-eosin (HE) staining were segmented into three colors. Segmented results indicate that this network model can successfully extract features at various brightness levels and magnifications as long as HE staining is used. Thus, this color segmentation method can accommodate change in brightness levels as well as hue values of input images. Moreover, this method is effective to the variance of scaling and rotation of extracting targets.

  • Fast Algorithms for Minimum Covering Run Expression

    Supoj CHINVEERAPHAN  AbdelMalek B.C. ZIDOURI  Makoto SATO  

     
    PAPER-Image Processing, Computer Graphics and Pattern Recognition

      Vol:
    E77-D No:3
      Page(s):
    317-325

    The Minimum Covering Run (MCR) expression used for representing binary images has been proposed [1]-[3]. The MCR expression is an adaptation from horizontal and vertical run expression. In the expression, some horizontal and vertical runs are used together for representing binary images in which total number of them is minimized. It was shown that, sets of horizontal and vertical runs representing any binary image could be viewed as partite sets of a bipartite graph, then the MCR expression of binary images was found analogously by constructing a maximum matching as well as a minimum covering in the corresponding graph. In the original algorithm, the most efficient algorithm, proposed by Hopcroft, solving the graph-theoretical problems mentioned above, associated with the Rectangular Segment Analysis (RSA) was used for finding the MCR expression. However, the original algorithm still suffers from a long processing time. In this paper, we propose two new efficient MCR algorithms that are beneficial to a practical implementation. The new algorithms are composed of two main procedures; i.e., Partial Segment Analysis (PSA) and construction of a maximum matching. It is shown in this paper that the first procedure which is directly an improvement to the RSA, appoints well a lot of representative runs of the MCR expression in regions of text and line drawing. Due to the PSA, the new algorithms reduce the number of runs used in the technique of solving the matching problem in corresponding graphs so that satisfactory processing time can be obtained. To clarify the validity of new algorithms proposed in this paper, the experimental results show the comparative performance of the original and new algorithms in terms of processing time.

  • Bandwidth Allocation for Connectionless Service in Private Networks Based on ATM Technology

    Tetsuya YOKOTANI  Toshihiro SHIKAMA  

     
    PAPER

      Vol:
    E77-B No:3
      Page(s):
    386-395

    Connectionless service for LANs interconnection will be provided in ATM networks at an early stage of B-ISDN era. This service will be provided on connection oriented mode at ATM technology. To perform this service, ATM connections using the dedicated bandwidth for this service are established semi-permanently between the nodes accommodating LANs. On these ATM connections, connectionless service among LANs is provided. It is important for private networks to utilize this bandwidth efficiently for reducing communication cost. In this paper, the architecture to provide connectionless service in private networks is described. Next, the allocation schemes of the bandwidth for this service and their performance are considered. We discuss the following schemes and compare them. One scheme is to establish semi-permanent ATM connections between the nodes with LAN interfaces. The bandwidth for each connection is individually assigned between these nodes. In another scheme, CLSFs (Connection-Less Service Functions) are introduced for connectionless service and connections are established via CLSFs. We show the latter scheme is superior because it brings out the effectiveness of statistical multiplexing of ATM technology and it leads to the reduction of the allocated bandwidth.

  • Mixed Mode Circuit Simulation Using Dynamic Network Separation and Selective Trace

    Masakatsu NISHIGAKI  Nobuyuki TANAKA  Hideki ASAI  

     
    PAPER-Modeling and Simulation

      Vol:
    E77-A No:3
      Page(s):
    454-460

    For the efficient circuit simulation, several direct/relaxation-based mixed mode simulation techniques have been studied. This paper proposes the combination of selective trace, which is well-known in the logic simulation, with dynamic network separation. In the selective trace method, the time points to be analyzed are selected for each subcircuit. Since the separation technique enables the analysis of each subcircuit independently, it is possible to skip solving the latent subcircuits, according to selective trace. Selecting the time points in accordance with activity of each subcircuit is analogous to multirate numerical integration technique used in the waveform relaxation algorithm.

  • A Circuit Partitioning Approach for Parallel Circuit Simulation

    Tetsuro KAGE  Fumiyo KAWAFUJI  Junichi NIITSUMA  

     
    PAPER-Modeling and Simulation

      Vol:
    E77-A No:3
      Page(s):
    461-466

    We have studied a circuit partitioning approach in the view of parallel circuit simulation on a MIMD parallel computer. In parallel circuit simulation, a circuit is partitioned into equally sized subcircuits while minimizing the number of interconnection nodes. Besides circuit partitioning time should be short enough compared with the total simulation time. From the details of circuit simulation time, we found that balancing subcircuits is critical for low parallel processing, whereas minimizing the interconnection nodes is critical for highly parallel processing. Our circuit partitioning approach consists of four steps: Grouping transistors, initial partitioning the transistor-groups, minimizing the number of interconnection nodes, and balancing the subcircuits. It is based on an algorithmic approach, and can directly control the tradeoffs between balancing subcircuits and minimizing the interconnection nodes by adjusting the parameters. We partitioned a test circuit with 3277 transistors into 4, 9, ... , 64 subcircuits, and did parallel simulations using PARACS, our parallel circuit simulator, on an AP1000 parallel computer. The circuit partitioning time was short enough-less than 3 percent of the total simulation time. The highest performance of parallel analysis using 49 processors was 16 times that of a single processor, and that for total simulation was 9 times.

  • A Symbolic Analysis Method Using Signal Block Diagrams and Its Application to Bias Synthesis of Analog Circuits

    Hideyuki KAWAKITA  Seijiro MORIYAMA  

     
    PAPER-Computer Aided Design (CAD)

      Vol:
    E77-A No:3
      Page(s):
    502-509

    In this paper, an efficient and robust circuit parameter determination method suitable for analog circuit synthesis is presented. The method uses block diagram representation of circuits as implicit design knowledge. Circuit parameter determination is carried out by propagating known values along signal flow in the block diagram. The circuit parameter determination using signal propagation performs successfully when unknown circuit parameters can be solved in one way. However, when the block diagram involves implicit calculation, the propagation stops before all unknown parameters are determined. In order to cope with this problem, we introduced a method that employs a symbolic analysis technique combined with a numerical method. When the propagation of known values stops, one of unknown signals is selected, a unique symbol is assigned to the selected signal, and the signal propagation is restarted. This operation is repeated until there is no unknown signal. When the symbol propagation reaches the signal where the signal value is already set, one nonlinear equation for the signal is obtained by equating both signal values. It can be solved by a numerical method, such as Newton's method. The parameter determination method using procedural description is superior to the optimization based method because it is straightforward to incorporate design knowhow in the description. However, it is burdensome for designers to develop design procedures for each circuit to be synthesized. Because the block diagram based calculation method can be used as subroutine calls during the design procedure development, it simplifies the design procedural description and lowers the burden of designers. The method was applied to the element value determination of bias circuits to demonstrate its effectiveness.

  • ATM Transport with Dynamic Capacity Control for Interconnection of Private Networks

    Katsuyuki YAMAZAKI  Yasushi WAKAHARA  

     
    PAPER

      Vol:
    E77-B No:3
      Page(s):
    327-334

    This paper deals with methods for interconnection between two local private networks that are geographically separated. A scheme is first presented to chain low bit-rate physical circuits into one logical circuit, over which ATM cells are transmitted as if there is one circuit with a high bit-rate capacity. In particular, use of existing low bit-rate circuits, e.g., 384/1536 kbit/s PDH leased line services and N-ISDN switched channels, is considered. The paper discusses two methods to permit chaining of physical circuits, and identifies their advantages and applications. By using the ATM-based circuit-chaining method, dynamic capacity control of the interconnection is then introduced with the use of an ATM-based rate adaptation. This is intended to provide a flexible and cost-effective capacity control compared to the existing TDM-based control. It is also possible to realize non-stop operation of changing capacity by establishment and release of chained circuits, which will lead to high reliability and robustness of private networks. Finally, delay characteristics introduced by the method are evaluated based on a computer simulation which gives a short and acceptable delay.

  • Range Image Segmentation Using Multiple Markov Random Fields

    In Gook CHUN  Kyu Ho PARK  

     
    PAPER-Image Processing, Computer Graphics and Pattern Recognition

      Vol:
    E77-D No:3
      Page(s):
    306-316

    A method of range image segmentation using four Markov random field(MRF)s is described in this paper. MRFs are used in depth smoothing, gradient smoothing, edge detection and surface type labeling stage. First, range and its gradient images are smoothed preserving jump and roof edges respectively using line process concept one after another. Then jump and roof edges are extracted, combined and refined using penalizing undesirable edge patterns. Finally, curvatures are computed and the surface types are labeled according to the signs of principal curvatures. The surface type labels are refined using winner-takes-all layers in the stage. The final output is a set of regions with its exact surface type. The energy function is used in order to represent constraints of each stage and the minimum energy state is found using iterative method. Several experimental results show the generality of our approach and the execution speed of the proposed method is faster than that of a typical region merging method. This promises practical applications of our method.

  • Service Aspects of Future Private Networks

    Kensaku KINOSHITA  Toshihiko WAKAHARA  Katsuhiko HARUTA  Shozo KUMON  

     
    INVITED PAPER

      Vol:
    E77-B No:3
      Page(s):
    306-313

    This paper describes a future private network service and the system configurations for providing it. Technologies and service trends in local area and wide area networks are shown. As network services become more diversified and integrated, it becomes more difficult for users to use the networks effectively. This paper shows how this problem can be solved by using virtual network technology to attain seamless networking. It also presents the concept of group networking among many parties, which can be used as the basis for a virtual private network.

  • Temperature Adaptive Voltage Reference Network for Realizing a Transconductance with Low Temperature Sensitivity

    Rabin RAUT  

     
    LETTER-Integrated Electronics

      Vol:
    E77-C No:3
      Page(s):
    515-518

    A technique to realize a transconductance which is relatively insensitive over temperature variations is reported. Simulation results with MOS and bipolar transistors indicate substantial improvement in temperature insensitivity over a range exceeding 100 degrees Celsius. It should find useful applications in analog LSI/VLSI systems operating over a wide range of temperature.

  • Flexible Information Sharing and Handling System--Towards Knowledge Propagation--

    Yoshiaki SEKI  Toshihiko YAMAKAMI  Akihiro SHIMIZU  

     
    PAPER

      Vol:
    E77-B No:3
      Page(s):
    404-410

    The use of computers with private networks has accelerated the electronic storage of business information in office systems. With the rapid progress in processing capability and small sizing of the computer world, private networks are going to be more intelligent. The utilization of shared information is a key issue in modern organizations, in order to increase the productivity of white-collar workers. In the CSCW research field, it is said that informal and unstructured information is important in group work contexts but difficult to locate in a large organization. Many researchers are paying particular attention to the importance of support systems for such information. These kinds of information are called Organizational memory or Group Memory. Our research focuses on knowledge propagation with private networks in the organization. This means emphasis on the process; with which organized information or the ability to use information is circulated throughout the organization. Knowledge propagation has three issues: knowledge transmission, destination locating and source locating. To cope with these issues we developed FISH, which stands for Flexible Information Sharing and Handling system. FISH was designed to provide cooperative information sharing in a group work context and to explore knowledge propagation. FISH stores fragmental information as cards with multiple keywords and content. This paper discusses a three-layered model that describes computer supported knowledge transmission. Based on this model, three issues are discussed regarding knowledge propagation. FISH and its two-year experiment are described and knowledge propagation is explored based on the results of this experiment.

12201-12220hit(12654hit)