This paper addresses a noise matching problem for MIMO receiver with mutual coupling in the presence of signal and antenna noise coupling. The matching network in this paper is designed to maximize the system's ergodic capacity by means of minimizing the noise figure matrix. For reducing RF circuit complexity, low noise matching design without crossover elements of the matching circuit is derived for compact symmetrical 2$ imes$2 MIMO receiver system with mutually coupled antenna. Numerical simulation verifies our analytical results and demonstrates the superiority of the proposed matching method among feasible ones. The paper furthermore investigates the lossy matching circuit with the corresponding circuit parameters in a specific condition and the effect of practical matching circuit.

Cloud computing, a novel distributed paradigm to provide powerful computing capabilities, is usually adopted by developers and researchers to execute complicated IoT applications such as complex workflows. In this scenario, it is fundamentally important to make an effective and efficient workflow application scheduling and execution by fully utilizing the advantages of the cloud (as virtualization and elastic services). However, in the current stage, there is relatively few research for workflow scheduling in cloud environment, where they usually just bring the traditional methods directly into cloud. Without considering the features of cloud, it may raise two kinds of problems: (1) The traditional methods mainly focus on static resource provision, which will cause the waste of resources; (2) They usually ignore the performance fluctuation of virtual machines on the physical machines, therefore it will lead to the estimation error of task execution time. To address these problems, a novel mechanism which can estimate the probability distribution of subtask execution time based on background VM load series over physical machines is proposed. An elastic performance fluctuations-aware stochastic scheduling algorithm is introduced in this paper. The experiments show that our proposed algorithm can outperform the existing algorithms in several metrics and can relieve the influence of performance fluctuations brought by the dynamic nature of cloud.

With the advent of high speed links, online flow measurement for, e.g., flow round trip time (RTT), has become difficult due to the enormous demands placed on computational resources. Most existing measurement methods are designed to count the numbers of flows or sizes of flows, but we address the flow RTT measurement, which is an important QoS metric for network management and cannot be measured with existing measurement methods. We first adapt a standard Bloom Filter (BF) for the flow RTT distribution estimation. However, due to the existence of multipath routing and Syn flooding attacks, the standard BF does not perform well. We further design the double-deletion bloom filter (DDBF) scheme, which alleviates potential hash collisions of the standard BF by explicitly deleting used records and implicitly deleting out-of-date records. Because of these double deletion operations, the DDBF accurately estimates the RTT distribution of TCP flows with limited memory space, even with the appearance of multipath routing and Syn flooding attacks. Theoretical analysis indicates that the DDBF scheme achieves a higher accuracy with a constant and smaller amount of memory compared with the standard BF. In addition, we validate our scheme using real traces and demonstrate significant memory-savings without degrading accuracy.

This paper presents a novel filter to keep from over-smoothing the edges and corners and rectify the outliers in the flow field after each incremental computation step, which plays a key role during the process of estimating flow field. This filter works according to the spatial-temporal derivatives distance of the input image and velocity field distance, whose principle is more reasonable in filtering mechanism for optical flow than other existing nonlinear filters. Moreover, we regard the spatial-temporal derivatives as new powerful descriptions of different motion layers or regions and give a detailed explanation. Experimental results show that our proposed method achieves better performance.

Wireless body area networks (WBANs) have to work with low power and long lifetime to satisfy human biological safety requirements in e-health; therefore extremely low energy consumption is significant for WBANs. IEEE 802.15.6 standard has been published for wearable and implanted applications which provide communication technology requirements in WBANs. In this paper, the cross-layering optimization methodology is used to minimize the network energy consumption. Both the priority strategy and sleep mechanism in IEEE802.15.6 are considered. Macroscopic sleep model based on WBAN traffic priority and microscopic sleep model based on MAC structure are proposed. Then the network energy consumption optimization problem is solved by Lagrange dual method, the master problem are vertically decomposed into two sub problems in MAC and transport layers which are dealt with gradient method. Finally, a solution including self-adaption sleep mechanism and node rate controlling is proposed. The results of this paper indicate that the algorithm converges quickly and reduces the network energy consumption remarkably.

Since electromagnetic (EM) noise resulting from an arc discharge disturbs other electric devices, parameters on electromagnetic compatibility, as well as lifetime and reliability, are important properties for electrical contacts. To clarify the characteristics and the mechanism of the generation of the EM noise, the arc column and voltage fluctuations generated by slowly breaking contacts with external direct current (DC) magnetic field, up to 20,mT, was investigated experimentally using Ag$_{90.7{ m wt%}}$SnO$_{2,9.3{ m wt}%}$ material. Firstly the motion of the arc column is measured by high-speed camera. Secondary, the distribution of the motion of the arc and contact voltage are discussed. It was revealed that the contact voltage fluctuation in the arc duration is related to the arc column motion.

We present a new lower bound on the number of gates in reversible logic circuits that represent a given reversible logic function, in which the circuits are assumed to consist of general Toffoli gates and have no redundant input/output lines. We make a theoretical comparison of lower bounds, and prove that the proposed bound is better than the previous one. Moreover, experimental results for lower bounds on randomly-generated reversible logic functions and reversible benchmarks are given. The results also demonstrate that the proposed lower bound is better than the former one.

This letter proposes a wideband compact DC block design technique. This DC block has a wide pass-band and wide stop-band and transforms termination impedances. It comprises a pair of coupled lines on a defected ground structure (DGS) with capacitor loading. A periodic DGS pattern increases coupling, and, consequently, a wideband DC block design is allowed with a microstrip process on a high dielectric low height substrate. A DC block with equal termination impedances of 50,$Omega$ and another that transforms 50 into 30,$Omega$ are fabricated. The measured fractional bandwidths are 48% and 47%. The size of the DC block is 16.8$ imes$ 15,mm$^2(0.057lambda_0 imes 0.051lambda_0)$.

The data rate of VLSI interconnections has been increasing according to the demand for high-speed operation of semiconductors such as CPUs. To realize high performance VLSI systems, high-speed data communication has become an important factor. However, at high-speed data rates, it is difficult to achieve accurate communication without bit errors because of inter-symbol interference (ISI). This paper presents high-speed data communication techniques for VLSI systems using Tomlinson-Harashima Precoding (THP). Since THP can eliminate the ISI with limiting average and peak power of transmitter signaling, THP is suitable for implementing advanced low-voltage VLSI systems. In this paper, 4-PAM (Pulse amplitude modulation) with THP has been employed to achieve high-speed data communication in VLSI systems. Simulation results show that THP can remove the ISI without increasing peak and average power of a transmitter. Moreover, simulation results clarify that multiple-valued data communication is very effective to reduce implementation costs for realizing high-speed serial links.

This paper proposes a QoS-aware differential processing control (QADPC) scheme for OpenFlow-based mobile networks. QADPC classifies the input packets to the control plane by considering end terminal mobility and service type. Then, different capacities are assigned to each classified packet for prioritized processing. By means of Markov chains, QADPC is evaluated in terms of blocking probability and waiting time in the control plane. Analytical results demonstrate that QADPC offers high priority packets both lower blocking probability and less waiting time.

There have been many matching pursuit algorithms (MPAs) which handle the sparse signal recovery problem, called compressed sensing (CS). In the MPAs, the correlation step makes a dominant computational complexity. In this paper, we propose a new fast correlation method for the MPA when we use partial Fourier sensing matrices and partial Hadamard sensing matrices which are widely used as the sensing matrix in CS. The proposed correlation method can be applied to almost all MPAs without causing any degradation of their recovery performance. Also, the proposed correlation method can reduce the computational complexity of the MPAs well even though there are restrictions depending on a used MPA and parameters.

An integrated 2×28Gb/s dual-channel duobinary driver IC is presented. Each channel has integrated coding blocks, transforming a non-return-to-zero input signal into a 3-level electrical duobinary signal to achieve an optical duobinary modulation. To the best of our knowledge this is the fastest modulator driver including on-chip duobinary encoding and precoding. Moreover, it only consumes 652mW per channel at a differential output swing of 6Vpp.

A scalable low voltage signaling (SLVS) transmitter, with asymmetric impedance calibration, is proposed for mobile applications which require low power consumption. The voltage swing of the proposed SLVS transmitter is scalable from 40,mV to 440,mV. The proposed asymmetric impedance calibration asymmetrically controls the pull-up and pull-down drivers for the SLVS transmitter with an impedance of 50,$Omega$. This makes it possible to remove the additional regulator used to calibrate the impedance of an output driver by controlling the swing level of a pre-driver. It also maintains the common mode voltage at the center voltage level of the transmitted signal. The proposed SVLS transmitter is implemented using a 0.18-$mu $m 1-poly 6-metal CMOS process with a 1.2-V supply. The active area and power consumption of the transmitter are $250 imes 123 mu$ m$^{2}$ and 2.9,mW/Gb/s, respectively.

In this paper, the function expansion based topology optimization is employed to the automatic optimization of the waveguide dispersion property, and the optimum design of low-dispersion slow-light photonic crystal waveguides is demonstrated. In order to realize low-dispersion and large group index, an objective function to be optimized is expressed by the weighted sum of the objective functions for the desired group index and the low-dispersion property, and weighting coefficients are updated through the optimization process.

In conventional networks, service control function and network control function work independently. Therefore, stereotypical services are provided via fixed routes or selected routes in advance. Recently, advanced network services have been provided by assortment of distributed components at low cost. Furthermore, service platform, which unifies componentized network control and service control in order to provide advanced services with flexibility and stability, has attracted attention. In near future, network management system (NMS) is promising, which replies an answer quickly for such advanced service platforms when route setting is requested with some parameters: quality of service (QoS), source and destination addresses, cost (money) and so on. In addition, the NMS is required to provide routes exploiting functions such as path computation element (PCE) actually. This paper proposes scalable network architecture that can quickly reply an answer by pre-computing candidate routes when route setting is requested to a control unit like an Autonomous System (AS). Proposed architecture can manage network resources scalably, and answer the availability of the requested QoS-aware path settings instantaneously for the forthcoming service platform that finds an adequate combination of a server and a route. In the proposed method, hierarchical databases are established to manage the information related to optical network solution and their data are updated at fewer times by discretized states and their boundaries with some margin. Moreover, with multiple and overlapped overlay, it pre-computes multiple candidate routes with different characteristics like available bandwidth and the number of hops, latency, BER (bit error rate), before route set-up request comes. We present simulation results to verify the benefits of our proposed system. Then, we implement its prototype using OpenFlow, and evaluate its effectiveness in the experimental environment.

This paper considers uplink interleave division multiple access (IDMA), of which crucial requirement is the proper operability at a very low signal-to-interference-plus-noise power ratio (SINR) range. The primary objectives of this paper are threefold: (1) to demonstrate the achievability of near-capacity performance of bit interleaved coded modulation with iterative detection (BICM-ID) using very low rate single parity check and irregular repetition (SPC-IrR) codes at a very low SINR range, and hence the technique is effective in achieving excellent performance when it is applied for IDMA, (2) to propose a very simple multiuser detection (MUD) technique for the SPC-IrR BICM-ID IDMA which does not incur heavy per-iteration computational burden, and (3) to analyze the impacts of power allocation on the convergence property of MUD as well as on the rate region, by using the extrinsic information transfer (EXIT) chart. The SPC-IrR code parameters are optimized by using the EXIT-constrained binary switching algorithm (EBSA) at a very low SINR range. Simulation results show that the proposed technique can achieve excellent near-capacity performance with the bit error rate (BER) curves exhibiting very sharp threshold, which significantly influences the convergence property of MUD. Furthermore, this paper presents results of the rate region analysis of multiple access channel (MAC) in the cases of equal and unequal power allocation, as well as of a counterpart technique. The results of the MAC rate region analysis show that our proposed technique outperforms the counterpart technique.

We propose multi-core erbium-doped fiber amplifiers for next-generation optical amplifiers utilized by space-division multiplexing technologies. Multi-core erbium-doped fiber amplifiers were studied widely as a means for overcoming exponential growth of internet traffic in the backbone network. We consider two approaches to excitation of erbium irons; One is core-pumping scheme, the other is cladding-pumping scheme. For a core-pumping configuration, we evaluate its applicability to future ultra long-haul network. In addition, we demonstrate that cladding-pumping configuration will enable reduction of power consumption, size, and cost because one multimode pumping laser diode can excite several cores simultaneously embedded in a common cladding and amplify several signals passed through the multi-core erbium-doped fiber cores.

This letter proposes an efficient Two-stage Resource scheduling algorithm for cloud based Live Media Streaming system (TRLMS). It transforms the cloud-based resource scheduling problem to a min-cost flow problem in a graph, and solves it by an improved Successive Short Path (SSP) algorithm. Simulation results show that TRLMS can enhance user demand satisfaction by 17.1% than mean-based method, and its time complexity is much lower than original SSP algorithm.

A fully on-chip CMOS relaxation oscillator (ROSC) with a PVT variation compensation circuit is proposed in this paper. The circuit is based on a conventional ROSC and has a distinctive feature in the compensation circuit that compensates for comparator's non-idealities caused by not only offset voltage, but also delay time. Measurement results demonstrated that the circuit can generate a stable clock frequency of 6.66kHz. The current dissipation was 320nA at 1.0-V power supply. The measured line regulation and temperature coefficient were 0.98%/V and 56ppm/°C, respectively.

A 10-bit digital-to-analog converter (DAC) with a small area is proposed for data-driver integrated circuits of active-matrix liquid crystal display systems. The 10-bit DAC consists of a 7-bit resistor string, a 7-bit two-step decoder, a 2-bit logarithmic time interpolator, and a buffer amplifier. The proposed logarithmic time interpolation is achieved by controlling the charging time of a first-order low-pass filter composed of a resistor and a capacitor. The 7-bit two-step decoder that follows the 7-bit resistor string outputs an analog signal of the stepped wave with two voltage levels using the additional 1-bit digital code for the logarithmic time interpolation. The proposed 10-bit DAC is implemented using a 0.35-µm CMOS process and its supply voltage is scalable from 3.3V to 5.0V. The area of the proposed 10-bit logarithmic time interpolation DAC occupies 57% of that of the conventional 10-bit resistor-string DAC. The DNL and INL of the implemented 10-bit DAC are +0.29/-0.30 and +0.47/-0.36 LSB, respectively.