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161-180hit(3578hit)

  • Reconfigurable Neural Network Accelerator and Simulator for Model Implementation

    Yasuhiro NAKAHARA  Masato KIYAMA  Motoki AMAGASAKI  Qian ZHAO  Masahiro IIDA  

     
    PAPER

      Pubricized:
    2021/09/21
      Vol:
    E105-A No:3
      Page(s):
    448-458

    Low power consumption is important in edge artificial intelligence (AI) chips, where power supply is limited. Therefore, we propose reconfigurable neural network accelerator (ReNA), an AI chip that can process both a convolutional layer and fully connected layer with the same structure by reconfiguring the circuit. In addition, we developed tools for pre-evaluation of the performance when a deep neural network (DNN) model is implemented on ReNA. With this approach, we established the flow for the implementation of DNN models on ReNA and evaluated its power consumption. ReNA achieved 1.51TOPS/W in the convolutional layer and 1.38TOPS/W overall in a VGG16 model with a 70% pruning rate.

  • Weakly Byzantine Gathering with a Strong Team

    Jion HIROSE  Junya NAKAMURA  Fukuhito OOSHITA  Michiko INOUE  

     
    PAPER

      Pubricized:
    2021/10/11
      Vol:
    E105-D No:3
      Page(s):
    541-555

    We study the gathering problem requiring a team of mobile agents to gather at a single node in arbitrary networks. The team consists of k agents with unique identifiers (IDs), and f of them are weakly Byzantine agents, which behave arbitrarily except falsifying their identifiers. The agents move in synchronous rounds and cannot leave any information on nodes. If the number of nodes n is given to agents, the existing fastest algorithm tolerates any number of weakly Byzantine agents and achieves gathering with simultaneous termination in O(n4·|Λgood|·X(n)) rounds, where |Λgood| is the length of the maximum ID of non-Byzantine agents and X(n) is the number of rounds required to explore any network composed of n nodes. In this paper, we ask the question of whether we can reduce the time complexity if we have a strong team, i.e., a team with a few Byzantine agents, because not so many agents are subject to faults in practice. We give a positive answer to this question by proposing two algorithms in the case where at least 4f2+9f+4 agents exist. Both the algorithms assume that the upper bound N of n is given to agents. The first algorithm achieves gathering with non-simultaneous termination in O((f+|&Lambdagood|)·X(N)) rounds. The second algorithm achieves gathering with simultaneous termination in O((f+|&Lambdaall|)·X(N)) rounds, where |&Lambdaall| is the length of the maximum ID of all agents. The second algorithm significantly reduces the time complexity compared to the existing one if n is given to agents and |&Lambdaall|=O(|&Lambdagood|) holds.

  • Network Tomography for Information-Centric Networking

    Ryoichi KAWAHARA  Takuya YANO  Rie TAGYO  Daisuke IKEGAMI  

     
    PAPER-Network

      Pubricized:
    2021/09/24
      Vol:
    E105-B No:3
      Page(s):
    259-269

    This paper proposes a network tomography scheme for information-centric networking (ICN), which we call ICN tomography. When content is received over a conventional IP network, the communication occurs after converting the content name into an IP address, which is the locator, so as to identify the position of the network. By contrast, in ICN, communication is achieved by directly specifying the content name or content ID. The content is sent to the requesting user by a nearby node having the content or cache, making it difficult to apply a conventional network tomography that uses end-to-end quality of service (QoS) measurements and routing information between the source and destination node pairs as input to the ICN. This is because, in ICN, the end-to-end flow for an end host receiving some content can take various routes; therefore, the intermediate and source nodes can vary. In this paper, we first describe the technical challenges of applying network tomography to ICN. We then propose ICN tomography, where we use the content name as an endpoint to define an end-to-end QoS measurement and a routing matrix. In defining the routing matrix, we assume that the end-to-end flow follows a probabilistic routing. Finally, the effectiveness of the proposed method is evaluated through a numerical analysis and simulation.

  • Linking Reversed and Dual Codes of Quasi-Cyclic Codes Open Access

    Ramy TAKI ELDIN  Hajime MATSUI  

     
    PAPER-Coding Theory

      Pubricized:
    2021/07/30
      Vol:
    E105-A No:3
      Page(s):
    381-388

    It is known that quasi-cyclic (QC) codes over the finite field Fq correspond to certain Fq[x]-modules. A QC code C is specified by a generator polynomial matrix G whose rows generate C as an Fq[x]-module. The reversed code of C, denoted by R, is the code obtained by reversing all codewords of C while the dual code of C is denoted by C⊥. We call C reversible, self-orthogonal, and self-dual if R = C, C⊥ ⊇ C, and C⊥ = C, respectively. In this study, for a given C, we find an explicit formula for a generator polynomial matrix of R. A necessary and sufficient condition for C to be reversible is derived from this formula. In addition, we reveal the relations among C, R, and C⊥. Specifically, we give conditions on G corresponding to C⊥ ⊇ R, C⊥ ⊆ R, and C = R = C⊥. As an application, we employ these theoretical results to the construction of QC codes with best parameters. Computer search is used to show that there exist various binary reversible self-orthogonal QC codes that achieve the upper bounds on the minimum distance of linear codes.

  • Approximate Minimum Energy Point Tracking and Task Scheduling for Energy-Efficient Real-Time Computing

    Takumi KOMORI  Yutaka MASUDA  Jun SHIOMI  Tohru ISHIHARA  

     
    PAPER

      Pubricized:
    2021/09/06
      Vol:
    E105-A No:3
      Page(s):
    518-529

    In the upcoming Internet of Things era, reducing energy consumption of embedded processors is highly desired. Minimum Energy Point Tracking (MEPT) is one of the most efficient methods to reduce both dynamic and static energy consumption of a processor. Previous works proposed a variety of MEPT methods over the past years. However, none of them incorporate their algorithms with practical real-time operating systems, although edge computing applications often require low energy task execution with guaranteeing real-time properties. The difficulty comes from the time complexity for identifying an MEP and changing voltages, which often prevents real-time task scheduling. The conventional Dynamic Voltage and Frequency Scaling (DVFS) only scales the supply voltage. On the other hand, MEPT needs to adjust the body bias voltage in addition. This additional tuning knob makes MEPT much more complicated. This paper proposes an approximate MEPT algorithm, which reduces the complexity of identifying an MEP down to that of DVFS. The key idea is to linearly approximate the relationship between the processor frequency, supply voltage, and body bias voltage. Thanks to the approximation, optimal voltages for a specified clock frequency can be derived immediately. We also propose a task scheduling algorithm, which adjusts processor performance to the workload and then provides a soft real-time capability to the system. The operating system stochastically adjusts the average response time of the processor to be equal to a specified deadline. MEPT will be performed as a general task, and its overhead is considered in the calculation of the frequency. The experiments using a fabricated test chip and on-chip sensors show that the proposed algorithm is a maximum of 16 times more energy-efficient than DVFS. Also, the energy loss induced by the approximation is only 3% at most, and the algorithm does not sacrifice the fundamental real-time properties.

  • Tight Security of Twin-DH Hashed ElGamal KEM in Multi-User Setting

    Yuji HASHIMOTO  Koji NUIDA  Goichiro HANAOKA  

     
    PAPER

      Pubricized:
    2021/08/30
      Vol:
    E105-A No:3
      Page(s):
    173-181

    It is an important research area to construct a cryptosystem that satisfies the security for multi-user setting. In addition, it is desirable that such a cryptosystem is tightly secure and the ciphertext size is small. For IND-CCA public key encryption schemes for multi-user setting with constant-size ciphertexts tightly secure under the DH assumptions, in 2020, Y. Sakai and G. Hanaoka firstly proposed such a scheme (implicitly based on hybrid encryption paradigm) under the DDH assumption. More recently, Y. Lee et al. proposed such a hybrid encryption scheme (with slightly stronger security) where the assumption for the KEM part is weakened to the CDH assumption. In this paper, we revisit the twin-DH hashed ElGamal KEM with even shorter ciphertexts than those schemes, and prove that its IND-CCA security for multi-user setting is in fact tightly reducible to the CDH assumption.

  • Efficiency and Accuracy Improvements of Secure Floating-Point Addition over Secret Sharing Open Access

    Kota SASAKI  Koji NUIDA  

     
    PAPER

      Pubricized:
    2021/09/09
      Vol:
    E105-A No:3
      Page(s):
    231-241

    In secure multiparty computation (MPC), floating-point numbers should be handled in many potential applications, but these are basically expensive. In particular, for MPC based on secret sharing (SS), the floating-point addition takes many communication rounds though the addition is the most fundamental operation. In this paper, we propose an SS-based two-party protocol for floating-point addition with 13 rounds (for single/double precision numbers), which is much fewer than the milestone work of Aliasgari et al. in NDSS 2013 (34 and 36 rounds, respectively) and also fewer than the state of the art in the literature. Moreover, in contrast to the existing SS-based protocols which are all based on “roundTowardZero” rounding mode in the IEEE 754 standard, we propose another protocol with 15 rounds which is the first result realizing more accurate “roundTiesToEven” rounding mode. We also discuss possible applications of the latter protocol to secure Validated Numerics (a.k.a. Rigorous Computation) by implementing a simple example.

  • Low-Power Design Methodology of Voltage Over-Scalable Circuit with Critical Path Isolation and Bit-Width Scaling Open Access

    Yutaka MASUDA  Jun NAGAYAMA  TaiYu CHENG  Tohru ISHIHARA  Yoichi MOMIYAMA  Masanori HASHIMOTO  

     
    PAPER

      Pubricized:
    2021/08/31
      Vol:
    E105-A No:3
      Page(s):
    509-517

    This work proposes a design methodology that saves the power dissipation under voltage over-scaling (VOS) operation. The key idea of the proposed design methodology is to combine critical path isolation (CPI) and bit-width scaling (BWS) under the constraint of computational quality, e.g., Peak Signal-to-Noise Ratio (PSNR) in the image processing domain. Conventional CPI inherently cannot reduce the delay of intrinsic critical paths (CPs), which may significantly restrict the power saving effect. On the other hand, the proposed methodology tries to reduce both intrinsic and non-intrinsic CPs. Therefore, our design dramatically reduces the supply voltage and power dissipation while satisfying the quality constraint. Moreover, for reducing co-design exploration space, the proposed methodology utilizes the exclusiveness of the paths targeted by CPI and BWS, where CPI aims at reducing the minimum supply voltage of non-intrinsic CP, and BWS focuses on intrinsic CPs in arithmetic units. From this key exclusiveness, the proposed design splits the simultaneous optimization problem into three sub-problems; (1) the determination of bit-width reduction, (2) the timing optimization for non-intrinsic CPs, and (3) investigating the minimum supply voltage of the BWS and CPI-applied circuit under quality constraint, for reducing power dissipation. Thanks to the problem splitting, the proposed methodology can efficiently find quality-constrained minimum-power design. Evaluation results show that CPI and BWS are highly compatible, and they significantly enhance the efficacy of VOS. In a case study of a GPGPU processor, the proposed design saves the power dissipation by 42.7% with an image processing workload and by 51.2% with a neural network inference workload.

  • Simultaneous Scheduling and Core-Type Optimization for Moldable Fork-Join Tasks on Heterogeneous Multicores

    Hiroki NISHIKAWA  Kana SHIMADA  Ittetsu TANIGUCHI  Hiroyuki TOMIYAMA  

     
    PAPER

      Pubricized:
    2021/09/01
      Vol:
    E105-A No:3
      Page(s):
    540-548

    With the demand for energy-efficient and high- performance computing, multicore architecture has become more appealing than ever. Multicore task scheduling is one of domains in parallel computing which exploits the parallelism of multicore. Unlike traditional scheduling, multicore task scheduling has recently been studied on the assumption that tasks have inherent parallelism and can be split into multiple sub-tasks in data parallel fashion. However, it is still challenging to properly determine the degree of parallelism of tasks and mapping on multicores. Our proposed scheduling techniques determine the degree of parallelism of tasks, and sub-tasks are decided which type of cores to be assigned to heterogeneous multicores. In addition, two approaches to hardware/software codesign for heterogeneous multicore systems are proposed. The works optimize the types of cores organized in the architecture simultaneously with scheduling of the tasks such that the overall energy consumption is minimized under a deadline constraint, a warm start approach is also presented to effectively solve the problem. The experimental results show the simultaneous scheduling and core-type optimization technique remarkably reduces the energy consumption.

  • Efficient Task Allocation Protocol for a Hybrid-Hierarchical Spatial-Aerial-Terrestrial Edge-Centric IoT Architecture Open Access

    Abbas JAMALIPOUR  Forough SHIRIN ABKENAR  

     
    INVITED PAPER

      Pubricized:
    2021/08/17
      Vol:
    E105-B No:2
      Page(s):
    116-130

    In this paper, we propose a novel Hybrid-Hierarchical spatial-aerial-Terrestrial Edge-Centric (H2TEC) for the space-air integrated Internet of Things (IoT) networks. (H2TEC) comprises unmanned aerial vehicles (UAVs) that act as mobile fog nodes to provide the required services for terminal nodes (TNs) in cooperation with the satellites. TNs in (H2TEC) offload their generated tasks to the UAVs for further processing. Due to the limited energy budget of TNs, a novel task allocation protocol, named TOP, is proposed to minimize the energy consumption of TNs while guaranteeing the outage probability and network reliability for which the transmission rate of TNs is optimized. TOP also takes advantage of the energy harvesting by which the low earth orbit satellites transfer energy to the UAVs when the remaining energy of the UAVs is below a predefined threshold. To this end, the harvested power of the UAVs is optimized alongside the corresponding harvesting time so that the UAVs can improve the network throughput via processing more bits. Numerical results reveal that TOP outperforms the baseline method in critical situations that more power is required to process the task. It is also found that even in such situations, the energy harvesting mechanism provided in the TOP yields a more efficient network throughput.

  • Joint Patch Weighting and Moment Matching for Unsupervised Domain Adaptation in Micro-Expression Recognition

    Jie ZHU  Yuan ZONG  Hongli CHANG  Li ZHAO  Chuangao TANG  

     
    LETTER-Image Recognition, Computer Vision

      Pubricized:
    2021/11/17
      Vol:
    E105-D No:2
      Page(s):
    441-445

    Unsupervised domain adaptation (DA) is a challenging machine learning problem since the labeled training (source) and unlabeled testing (target) sets belong to different domains and then have different feature distributions, which has recently attracted wide attention in micro-expression recognition (MER). Although some well-performing unsupervised DA methods have been proposed, these methods cannot well solve the problem of unsupervised DA in MER, a. k. a., cross-domain MER. To deal with such a challenging problem, in this letter we propose a novel unsupervised DA method called Joint Patch weighting and Moment Matching (JPMM). JPMM bridges the source and target micro-expression feature sets by minimizing their probability distribution divergence with a multi-order moment matching operation. Meanwhile, it takes advantage of the contributive facial patches by the weight learning such that a domain-invariant feature representation involving micro-expression distinguishable information can be learned. Finally, we carry out extensive experiments to evaluate the proposed JPMM method is superior to recent state-of-the-art unsupervised DA methods in dealing with cross-domain MER.

  • An Efficient Calculation for TI-LFA Rerouting Path Open Access

    Kazuya SUZUKI  

     
    PAPER

      Pubricized:
    2021/08/05
      Vol:
    E105-B No:2
      Page(s):
    196-204

    Recently, segment routing, which is a modern forwarding mechanism, and Topology Independent Loop-free Alternate, which is an IP fast-reroute method using segment routing, have been proposed and have begun to be applied to real networks. When a failure occurs in a network, TI-LFA quickly restores packet forwarding without waiting for other nodes to update their routing tables. It does so by using segment routing to forward sections that may cause loops in the rerouting path. However, determining the segment routing sections has a high computational cost because it requires computation for each destination. This paper therefore proposes an algorithm to determine the egress node that is the exit of the segment routing section for all destination nodes with only three shortest-path tree calculations. The evaluation results of the proposed algorithm showed that the average tunnel lengths are at most 2.0 to 2.2 hops regardless of the size of the network. I also showed that the computational complexity of the proposed algorithm is O(Nlog N).

  • A Robust Canonical Polyadic Tensor Decomposition via Structured Low-Rank Matrix Approximation

    Riku AKEMA  Masao YAMAGISHI  Isao YAMADA  

     
    PAPER-Digital Signal Processing

      Pubricized:
    2021/06/23
      Vol:
    E105-A No:1
      Page(s):
    11-24

    The Canonical Polyadic Decomposition (CPD) is the tensor analog of the Singular Value Decomposition (SVD) for a matrix and has many data science applications including signal processing and machine learning. For the CPD, the Alternating Least Squares (ALS) algorithm has been used extensively. Although the ALS algorithm is simple, it is sensitive to a noise of a data tensor in the applications. In this paper, we propose a novel strategy to realize the noise suppression for the CPD. The proposed strategy is decomposed into two steps: (Step 1) denoising the given tensor and (Step 2) solving the exact CPD of the denoised tensor. Step 1 can be realized by solving a structured low-rank approximation with the Douglas-Rachford splitting algorithm and then Step 2 can be realized by solving the simultaneous diagonalization of a matrix tuple constructed by the denoised tensor with the DODO method. Numerical experiments show that the proposed algorithm works well even in typical cases where the ALS algorithm suffers from the so-called bottleneck/swamp effect.

  • Design of the Circularly Polarized Ring Microstrip Antenna with Shorting Pins

    Jun GOTO  Akimichi HIROTA  Kyosuke MOCHIZUKI  Satoshi YAMAGUCHI  Kazunari KIHIRA  Toru TAKAHASHI  Hideo SUMIYOSHI  Masataka OTSUKA  Naofumi YONEDA  Jiro HIROKAWA  

     
    PAPER-Antennas and Propagation

      Pubricized:
    2021/08/05
      Vol:
    E105-B No:1
      Page(s):
    34-43

    We present a novel circularly polarized ring microstrip antenna and its design. The shorting pins discretely disposed on the inner edge of the ring microstrip antenna are introduced as a new degree of freedom for improving the resonance frequency control. The number and diameter of the shorting pins control the resonance frequency; the resonance frequency can be almost constant with respect to the inner/outer diameter ratio, which expands the use of the ring microstrip antenna. The dual-band antenna where the proposed antenna includes another ring microstrip antenna is designed and measured, and simulated results agree well with the measured one.

  • Study in CSI Correction Localization Algorithm with DenseNet Open Access

    Junna SHANG  Ziyang YAO  

     
    PAPER-Navigation, Guidance and Control Systems

      Pubricized:
    2021/06/23
      Vol:
    E105-B No:1
      Page(s):
    76-84

    With the arrival of 5G and the popularity of smart devices, indoor localization technical feasibility has been verified, and its market demands is huge. The channel state information (CSI) extracted from Wi-Fi is physical layer information which is more fine-grained than the received signal strength indication (RSSI). This paper proposes a CSI correction localization algorithm using DenseNet, which is termed CorFi. This method first uses isolation forest to eliminate abnormal CSI, and then constructs a CSI amplitude fingerprint containing time, frequency and antenna pair information. In an offline stage, the densely connected convolutional networks (DenseNet) are trained to establish correspondence between CSI and spatial position, and generalized extended interpolation is applied to construct the interpolated fingerprint database. In an online stage, DenseNet is used for position estimation, and the interpolated fingerprint database and K-nearest neighbor (KNN) are combined to correct the position of the prediction results with low maximum probability. In an indoor corridor environment, the average localization error is 0.536m.

  • A Self-Powered Flyback Pulse Resonant Circuit for Combined Piezoelectric and Thermoelectric Energy Harvesting

    Huakang XIA  Yidie YE  Xiudeng WANG  Ge SHI  Zhidong CHEN  Libo QIAN  Yinshui XIA  

     
    PAPER-Electronic Circuits

      Pubricized:
    2021/06/23
      Vol:
    E105-C No:1
      Page(s):
    24-34

    A self-powered flyback pulse resonant circuit (FPRC) is proposed to extract energy from piezoelectric (PEG) and thermoelectric generators (TEG) simultaneously. The FPRC is able to cold start with the PEG voltage regardless of the TEG voltage, which means the TEG energy is extracted without additional cost. The measurements show that the FPRC can output 102 µW power under the input PEG and TEG voltages of 2.5 V and 0.5 V, respectively. The extracted power is increased by 57.6% compared to the case without TEGs. Additionally, the power improvement with respect to an ideal full-wave bridge rectifier is 2.71× with an efficiency of 53.9%.

  • Leveraging Scale-Up Machines for Swift DBMS Replication on IaaS Platforms Using BalenaDB

    Kaiho FUKUCHI  Hiroshi YAMADA  

     
    PAPER-Software System

      Pubricized:
    2021/10/01
      Vol:
    E105-D No:1
      Page(s):
    92-104

    In infrastructure-as-a-service platforms, cloud users can adjust their database (DB) service scale to dynamic workloads by changing the number of virtual machines running a DB management system (DBMS), called DBMS instances. Replicating a DBMS instance is a non-trivial task since DBMS replication is time-consuming due to the trend that cloud vendors offer high-spec DBMS instances. This paper presents BalenaDB, which performs urgent DBMS replication for handling sudden workload increases. Unlike convectional replication schemes that implicitly assume DBMS replicas are generated on remote machines, BalenaDB generates a warmed-up DBMS replica on an instance running on the local machine where the master DBMS instance runs, by leveraging the master DBMS resources. We prototyped BalenaDB on MySQL 5.6.21, Linux 3.17.2, and Xen 4.4.1. The experimental results show that the time for generating the warmed-up DBMS replica instance on BalenaDB is up to 30× shorter than an existing DBMS instance replication scheme, achieving significantly efficient memory utilization.

  • Effects of Image Processing Operations on Adversarial Noise and Their Use in Detecting and Correcting Adversarial Images Open Access

    Huy H. NGUYEN  Minoru KURIBAYASHI  Junichi YAMAGISHI  Isao ECHIZEN  

     
    PAPER

      Pubricized:
    2021/10/05
      Vol:
    E105-D No:1
      Page(s):
    65-77

    Deep neural networks (DNNs) have achieved excellent performance on several tasks and have been widely applied in both academia and industry. However, DNNs are vulnerable to adversarial machine learning attacks in which noise is added to the input to change the networks' output. Consequently, DNN-based mission-critical applications such as those used in self-driving vehicles have reduced reliability and could cause severe accidents and damage. Moreover, adversarial examples could be used to poison DNN training data, resulting in corruptions of trained models. Besides the need for detecting adversarial examples, correcting them is important for restoring data and system functionality to normal. We have developed methods for detecting and correcting adversarial images that use multiple image processing operations with multiple parameter values. For detection, we devised a statistical-based method that outperforms the feature squeezing method. For correction, we devised a method that uses for the first time two levels of correction. The first level is label correction, with the focus on restoring the adversarial images' original predicted labels (for use in the current task). The second level is image correction, with the focus on both the correctness and quality of the corrected images (for use in the current and other tasks). Our experiments demonstrated that the correction method could correct nearly 90% of the adversarial images created by classical adversarial attacks and affected only about 2% of the normal images.

  • Construction and Encoding Algorithm for Maximum Run-Length Limited Single Insertion/Deletion Correcting Code

    Reona TAKEMOTO  Takayuki NOZAKI  

     
    PAPER-Coding Theory

      Pubricized:
    2021/07/02
      Vol:
    E105-A No:1
      Page(s):
    35-43

    Maximum run-length limited codes are constraint codes used in communication and data storage systems. Insertion/deletion correcting codes correct insertion or deletion errors caused in transmitted sequences and are used for combating synchronization errors. This paper investigates the maximum run-length limited single insertion/deletion correcting (RLL-SIDC) codes. More precisely, we construct efficiently encodable and decodable RLL-SIDC codes. Moreover, we present its encoding and decoding algorithms and show the redundancy of the code.

  • A Case for Low-Latency Communication Layer for Distributed Operating Systems

    Sang-Hoon KIM  

     
    LETTER-Software System

      Pubricized:
    2021/09/06
      Vol:
    E104-D No:12
      Page(s):
    2244-2247

    There have been increasing demands for distributed operating systems to better utilize scattered resources over multiple nodes. This paper enlightens the challenges and requirements for the communication layers for distributed operating systems, and makes a case for a versatile, high-performance communication layer over InfiniBand network.

161-180hit(3578hit)