The complicated indoor environment such as obstacles causes the non-line of sight (NLOS) environment. In this paper, we propose a voting matrix based residual weighting (VM-Rwgh) algorithm to mitigate NLOS errors in indoor localization system. The voting matrix is employed to provide initial localization results. The residual weighting is used to improve the localization accuracy. The VM-Rwgh algorithm can overcome the effects of NLOS errors, even when more than half of the measurements contain NLOS errors. Simulation results show that the VM-Rwgh algorithm provides higher location accuracy with relatively lower computational complexity in comparison with other methods.

The Euler number of a binary image is an important topological property for pattern recognition, and can be calculated by counting certain bit-quads in the image. This paper proposes an efficient strategy for improving the bit-quad-based Euler number computing algorithm. By use of the information obtained when processing the previous bit quad, the number of times that pixels must be checked in processing a bit quad decreases from 4 to 2. Experiments demonstrate that an algorithm with our strategy significantly outperforms conventional Euler number computing algorithms.

In this letter, we evaluate the parasitic capacitance of an LCD touch panel, the description and implementation of a differential input sensing circuit, and an algorithm suitable for large LCDs with integrated touch function. When projected capacitive touch sensors are integrated with a liquid crystal display, the sensors have a very large amount of parasitic capacitance with the display elements. A differential input sensing circuit can detect small changes in the mutual capacitance from the touch of a finger. The circuit is realized using discrete components, and for the evaluation of a large-sized LCD touch panel, a printed circuit board touch panel is used.

The development of an HMM-based speech synthesis system for a new language requires resources like speech database and segment-phonetic labels. As an under-resourced language, Malay lacks the necessary resources for the development of such a system, especially segment-phonetic labels. This research aims at developing an HMM-based speech synthesis system for Malay. We are proposing the use of two types of training HMMs, which are the benchmark iterative training incorporating the DAEM algorithm and isolated unit training applying segment-phonetic labels of Malay. The preferred method for preparing segment-phonetic labels is the automatic segmentation. The automatic segmentation of Malay speech database is performed using two approaches which are uniform segmentation that applies fixed phone duration, and a cross-lingual approach that adopts the acoustic model of English. We have measured the segmentation error of the two segmentation approaches to ascertain their relative effectiveness. A listening test was used to evaluate the intelligibility and naturalness of the synthetic speech produced from the iterative and isolated unit training. We also compare the performance of the HMM-based speech synthesis system with existing Malay speech synthesis systems.

Recently, the wavelet-based estimation method has gradually been becoming popular as a new tool for software reliability assessment. The wavelet transform possesses both spatial and temporal resolution which makes the wavelet-based estimation method powerful in extracting necessary information from observed software fault data, in global and local points of view at the same time. This enables us to estimate the software reliability measures in higher accuracy. However, in the existing works, only the point estimation of the wavelet-based approach was focused, where the underlying stochastic process to describe the software-fault detection phenomena was modeled by a non-homogeneous Poisson process. In this paper, we propose an interval estimation method for the wavelet-based approach, aiming at taking account of uncertainty which was left out of consideration in point estimation. More specifically, we employ the simulation-based bootstrap method, and derive the confidence intervals of software reliability measures such as the software intensity function and the expected cumulative number of software faults. To this end, we extend the well-known thinning algorithm for the purpose of generating multiple sample data from one set of software-fault count data. The results of numerical analysis with real software fault data make it clear that, our proposal is a decision support method which enables the practitioners to do flexible decision making in software development project management.

The authors have evaluated a method of expanding the bit depth of image signals called SGRAD, which requires fewer calculations, while degrading the sharpness of images less. Where noise is superimposed on image signals, the conventional method for obtaining high bit depth sometimes incorrectly detects the contours of images, making it unable to sufficiently correct the gradation. Requiring many line memories is also an issue with the conventional method when applying the process to vertical gradation. As a solution to this particular issue, SGRAD improves the method of detecting contours with transiting gradation to effectively correct the gradation of image signals which noise is superimposed on. In addition, the use of a prediction algorithm for detecting gradation reduces the scale of the circuit with less correction of the vertical gradation.

A new scheme based on multi-order visual comparison is proposed for full-reference image quality assessment. Inspired by the observation that various image derivatives have great but different effects on visual perception, we perform respective comparison on different orders of image derivatives. To obtain an overall image quality score, we adaptively integrate the results of different comparisons via a perception-inspired strategy. Experimental results on public databases demonstrate that the proposed method is more competitive than some state-of-the-art methods, benchmarked against subjective assessment given by human beings.

Mobile IPv6 is an IETF (Internet Engineering Task Force) standard which permits node mobility in IPv6. To manage mobility, it establishes a centralized mediator, Home Agent (HA), which inevitably introduces several penalties like triangular routing, single point of failure and limited scalability. Some later extensions such as Global HAHA, which employed multiple HAs, made to alleviate above shortcomings by introducing Distributed Mobility Management (DMM) approach. However, Multiple HA model will not be beneficial, unless the HAs are located finely. But, no major research paper has focused on locating HAs. This paper examines impact of single and multiple HA placements in data plane, by using an Autonomous System (AS) level topology consisting of 30,000 nodes with several evaluation criteria. All possible placements of HA(s) are analysed on a fair, random set of 30,000 node pairs of Mobile Nodes (MN) and Correspondent Nodes (CN). Ultimate result provides a concise account of different HA placements: i.e. cost centrality interprets performance variation better than degree centrality or betweenness. 30,000 ASs are classified into three groups in terms of Freeman's closeness index and betweenness centrality: 1) high range group, 2) mid range group, and 3) low range group. Considering dual HA placement, if one HA is placed in an AS in the high range group, then any subsequent HA placement gives worse results, thus single HA placement is adequate. With the mid range group, similar results are demonstrated by the upper portion of the group, but the rest yields better results when combined with another HA. Finally, from the perspective of low range group, if the subsequent HA is placed in the high range group, it gives better result. On the other hand, betweenness based grouping yields varying results. Consequently, this study reveals that the Freeman's closeness index is most appropriate in determining impacts of HA placements among considered indices.

A workflow may be extended to adapt to market growth, legal reform, and so on. The extended workflow must be logically correct, and inherit the behavior of the existing workflow. Even if the extended workflow inherits the behavior, it may be not logically correct. Can we modify it so that it satisfies not only behavioral inheritance but also logical correctness? This is named behavioral inheritance preserving soundizability problem. There are two kinds of behavioral inheritance: protocol inheritance and projection inheritance. In this paper, we tackled protocol inheritance preserving soundizability problem using a subclass of Petri nets called workflow nets. Limiting our analysis to acyclic free choice workflow nets, we formalized the problem. And we gave a necessary and sufficient condition on the problem, which is the existence of a key structure of free choice workflow nets called TP-handle. Based on this condition, we also constructed a polynomial time procedure to solve the problem.

This letter presents a new entropy measure for electroencephalograms (EEGs), which reflects the underlying dynamics of EEG over multiple time scales. The motivation behind this study is that neurological signals such as EEG possess distinct dynamics over different spectral modes. To deal with the nonlinear and nonstationary nature of EEG, the recently developed empirical mode decomposition (EMD) is incorporated, allowing an EEG to be decomposed into its inherent spectral components, referred to as intrinsic mode functions (IMFs). By calculating Shannon entropy of IMFs in a time-dependent manner and summing them over adaptive multiple scales, the result is an adaptive subscale entropy measure of EEG. Simulation and experimental results show that the proposed entropy properly reveals the dynamical changes over multiple scales.

This paper describes an ultrasonic system that estimates the cell quantity of an artificial culture bone, which is effective for appropriate treat with a composite of this material and Bone Marrow Stromal Cells. For this system, we examine two approaches for analyzing the ultrasound waves transmitted through the cultured bone, including stem cells to estimate cell quantity: multiple regression and fuzzy inference. We employ two characteristics from the obtained wave for applying each method. These features are the amplitude and the frequency; the amplitude is measured from the obtained wave, and the frequency is calculated by the cross-spectrum method. The results confirmed that the fuzzy inference method yields the accurate estimates of cell quantity in artificial culture bone. Using this ultrasonic estimation system, the orthopaedic surgeons can choose the composites that contain favorable number of cells before the implantation.

In this paper, a new technique is proposed to reduce the frequency of cell search by user equipment (UE) in the presence of femtocells. A new common signal (CS) and a separate set of primary synchronization signals (PSSs) are employed to facilitate efficient cell search in a next-geration LTE-based system. The velocity of the UE is also utilized to determine cell search mode. A slow UE recognizes the presence of femtocells using the CS, so that it can make separate searches for macrocells and femtocells. A fast UE will not search for femtocells since the coverage of femtocells is restricted to a small region. The fast UE detects the macrocell boundary using the PSSs transmitted from neighboring macrocells, so that it can search for macrocells only at the macrocell boundary. The effects of CS and UE velocity on the number of cell searches are analyzed. The performance of the proposed technique is evaluated by computer simulations.

Mobility load balancing (MLB) is a key technology for self-organization networks (SONs). In this paper, we explore the mobility load balancing problem and propose a unified cell specific offset adjusting algorithm (UCSOA) which more accurately adjusts the largely uneven load between neighboring cells and is easily implemented in practice with low computing complexity and signal overhead. Moreover, we evaluate the UCSOA algorithm in two different traffic conditions and prove that the UCSOA algorithm can get the lower call blocking rates and handover failure rates. Furthermore, the interdependency of the proposed UCSOA algorithm's performance and that of the inter-cell interference coordination (ICIC) algorithm is explored. A self-organization soft frequency reuse scheme is proposed. It demonstrates UCSOA algorithm and ICIC algorithm can obtain a positive effect for each other and improve the network performance in LTE system.

This paper presents a new technique to enhance the bandwidth of a printed dipole antenna for ultra-wideband applications. The basic idea is to exploit mutual coupling between the feeding line, which is designed closed and paralleled to dipole arms, the dipole arms and other elements of the antenna. Dipole arms, feeding lines as well as other parts are investigated in order to expand antenna bandwidth while still retaining antenna compactness. Based on the proposed technique, we develop two sample printed dipole antennas for advanced wireless communications. One is an ultra-wideband antenna which is suitable for multi-band-mode ultra-wideband applications or being a sensing antenna in cognitive radio. The other is a reconfigurable antenna which would be applicable for wideband cognitive radios. Antenna characteristics such as radiation patterns, current distributions, and gains at different frequencies are also investigated for both sample antennas.

A high-speed and low-power 8-bit subranging analog-to-digital converter (ADC) based on 65-nm CMOS technology was fabricated. Rather than using digital foreground calibration, an analog-centric approach was adopted to reduce power dissipation. An offset cancelling charge-steering amplifier and capacitive-averaging technique effectively reduce the offset, noise, and power dissipation of the ADC. Moreover, the circuit used to compensate the kickback noise current from the comparator can also reduce the power dissipation. The reference-voltage generator for the fine ADC is composed of a fine ladder and a capacitor providing an AC signal path. This configuration reduces the power dissipation of the selection signal drivers for the analog multiplexer. A test chip fabricated using 65-nm digital CMOS technology achieved a high sampling rate of 1GHz, a low power dissipation of 17.5mW, and a figure of merit of 118fJ/conv.-step.

This paper discusses Mixed Signal LSI technology with embedded power transistors. Trends in Mixed Signal LSI technology are explained at first. Mixed signal LSI technology has proceeded with the help of fine fabrication technology and SOI technology. The BEOL transistor is a new development, which uses InGaZnO (IGZO) as its TFT channel material. The BEOL transistor is one future device which enables 3D IC and chip shrinking technology.

This letter proposes a novel intrusion tolerant system consisting of several virtual machines (VMs) that refresh the target system periodically and by live migration, which monitors the many features of the VMs to identify and replace exhausted VMs. The proposed scheme provides adequate performance and dependability against denial of service (DoS) attacks. To show its efficiency and security, we conduct experiments on the CSIM20 simulator, which showed 22% improvement in a normal situation and approximately 77.83% improvement in heavy traffic in terms of the response time compared to that reported in the literature. We measure and compare the response time. The result show that the proposed scheme has shorter response time and maintains than other systems and supports services during the heavy traffic.

MapReduce is commonly used as a parallel massive data processing model. When deploying it as a service over the open systems, the computational integrity of the participants is becoming an important issue due to the untrustworthy workers. Current duplication-based solutions can effectively solve non-collusive attacks, yet most of them require a centralized worker to re-compute additional sampled tasks to defend collusive attacks, which makes the worker a bottleneck. In this paper, we try to explore a trusted worker scheduling framework, named VAWS, to detect collusive attackers and assure the integrity of data processing without extra re-computation. Based on the historical results of verification, we construct an Integrity Attestation Graph (IAG) in VAWS to identify malicious mappers and remove them from the framework. To further improve the efficiency of identification, a verification-couple selection method with the IAG guidance is introduced to detect the potential accomplices of the confirmed malicious worker. We have proven the effectiveness of our proposed method on the improvement of system performance in theoretical analysis. Intensive experiments show the accuracy of VAWS is over 97% and the overhead of computation is closed to the ideal value of 2 with the increasing of the number of map tasks in our scheme.

Power supply noise waveforms within cryptographic VLSI circuits in a 65nm CMOS technology are captured by using an on-chip voltage waveform monitor (OCM). The waveforms exhibit the correlation of dynamic voltage drops to internal logical activities during Advance Encryption Standard (AES) processing, and causes side-channel information leakage regarding to secret key bytes. Correlation Power Analysis (CPA) is the method of an attack extracting such information leakage from the waveforms. The frequency components of power supply noise contributing the leakage are shown to be localized in an extremely low frequency region. The level of information leakage is strongly associated with the size of increment of dynamic voltage drops against the Hamming distance in the AES processing. The time window of significant importance where the leakage most likely happens is clearly designated within a single clock cycle in the final stage of AES processing. The on-chip power supply noise measurements unveil the facts about side-channel information leakage behind the traditional CPA with on-board sensing of power supply current through a resistor of 1 ohm.

Filter caches have been studied as an energy efficient solution. They achieve energy savings via selected access to L1 cache, but severely decrease system performance. Therefore, a filter cache system should adopt components that balance execution delay against energy savings. In this letter, we analyze the legacy filter cache system and propose Data Filter Cache with Partial Tag Cache (DFPC) as a new solution. The proposed DFPC scheme reduces energy consumption of L1 data cache and does not impair system performance at all. Simulation results show that DFPC provides the 46.36% energy savings without any performance loss.