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[Keyword] IP(4754hit)

3901-3920hit(4754hit)

  • Determination of Base and Emitter Resistances in Bipolar Junction Transistors from Low Frequency Noise and Static Measurements

    Pierre LLINARES  Gerard GHIBAUDO  Yannick MOURIER  Nicolas GAMBETTA  Michel LAURENS  Jan A. CHROBOCZEK  

     
    PAPER

      Vol:
    E82-C No:4
      Page(s):
    607-611

    A novel method of extraction of emitter, Re, and base, Rb, resistances of bipolar junction transistors, BJTs, is proposed. Re and Rb are obtained from static characteristics and noise power spectral density of low frequency, 1/f, fluctuations, measured in the base and collector currents of the devices. Measurements carried out on quasi self-aligned silicon BJTs show that Re and Rb values obtained by the proposed method scale correctly with transistor dimensions and match the values estimated from the device layout.

  • Voice Stream Multiplexing between IP Telephony Gateways

    Tohru HOSHI  Keiko TANIGAWA  Koji TSUKADA  

     
    PAPER

      Vol:
    E82-D No:4
      Page(s):
    838-845

    IP telephony systems are expected to be deployed worldwide in the near future because of their potential for integrating the multimedia communication infrastructure over IP networks. Phone-to-phone connection over an IP network via IP telephony gateways (IP-GWs) is a key feature of the system. In an IP telephony system, a low-bit-rate voice codec is used to improve bandwidth efficiency. However, due to the packet transfer method over the IP network, it is necessary to add packet headers, including IP, UDP, and RTP headers, which increases the header overhead and thus decreases transfer efficiency. Moreover, because there will be large numbers of short voice packets flowing into the IP network, the load on the Internet will increase. We propose voice stream multiplexing between IP-GWs to solve these problems. In this scheme, multiple voice streams are connected between a pair of IP-GWs, enabling multiplexed voice stream transfer. The voice stream multiplexing mechanism can reduce the header overhead as well as decrease the number of voice packets. The voice stream multiplexing we propose is to concatenate RTP packets destined for the same IP-GW at a multiplexing interval period into a single UDP packet. The advantage of this method is that no new additional header is required and the current well-defined H. 323 and RTP standards can be applied with minimum changes. We implemented and tested the system. The results show that the proposed method is effective at reducing both the header overhead and the number of packets. In a typical case, the bandwidth is cut by 40% for eight G. 723.1-encoded voice streams through header overhead reduction and the number of voice packets is also decreased to 1/8. Furthermore, this method can easily be enhanced to a general RTP packet multiplexing method that is applicable not only to an IP-GW but also to other RTP multiplexing and de-multiplexing applications.

  • New Test Structures for Evaluating the Scaling Limit of a Narrow U-Groove Isolation Structure

    Yoichi TAMAKI  Takashi HASHIMOTO  

     
    PAPER

      Vol:
    E82-C No:4
      Page(s):
    612-617

    New test structures for evaluating isolation capacitance (CTS) and isolation breakdown voltage (BVCCO) have been developed. Using these test structures, we examined the scaling limit of the width and the structure of narrow isolation U-grooves for high-speed and high-density LSIs. We separated the capacitance CTS into two components, CTSS (bottom component) and CTSL (peripheral component), and analyzed the effect of the device structure (isolation width and filling materials) on CTS. We found that the minimum width of the isolation U-groove is especially limited by the increased isolation capacitance between the neighboring N+ buried layers. The minimum width is about 0.3 µm even when SiO2 is used as a filling material. So we developed an effective method to overcome this limitation. Use of a double-trench structure and/or an SOI substrate meet the requirement. A double-trench structure can reduce CTS by more than 50%, while SOI substrates gives reduced CTS, high BVCCO, high α-ray immunity, and reduced process steps.

  • New Design Method of a Binaural Microphone Array Using Multiple Constraints

    Yoiti SUZUKI  Shinji TSUKUI  Futoshi ASANO  Ryouichi NISHIMURA  Toshio SONE  

     
    PAPER

      Vol:
    E82-A No:4
      Page(s):
    588-596

    A new method of designing a microphone array with two outputs preserving binaural information is proposed in this paper. This system employs adaptive beamforming using multiple constraints. The binaural cues may be preserved in the two outputs by use of these multiple constraints with simultaneous beamforming to enhance target signals is also available. A computer simulation was conducted to examine the performance of the beamforming. The results showed that the proposed array can perform both the generation of the binaural cues and the beamforming as intended. In particular, beamforming with double-constraints exhibits the best performance; DI is around 7 dB and good interchannel (interaural) time/phase and level differences are generated within a target region in front. With triple-constraints, however, the performance of the beamforming becomes poorer while the binaural information is better realized. Setting of the desired responses to give proper binaural information seems to become critical as the number of the constraints increases.

  • Contention-Based Reservation Protocol for WDM Local Lightwave Networks with Nonuniform Traffic Pattern

    Wha Sook JEON  Dong Geun JEONG  

     
    PAPER-Optical Communication

      Vol:
    E82-B No:3
      Page(s):
    521-531

    This paper proposes a medium access control (MAC) protocol for single-hop WDM star-coupler networks, in which the number of stations is larger than the number of channels and the stations have arbitrary distances to the star coupler. The proposed protocol has one control channel for reserving the slots of data channels and several data channels which are used to transmit traffic. This paper also suggests a scheme that accomplishes load balancing among data channels for arbitrary traffic patterns between stations. Since this load balancing scheme diminishes an influence that traffic patterns have on the performance of the proposed MAC protocol, the proposed system is appropriate for systems which have asymmetric traffic intensity between stations. Throughput and mean message delay of the MAC protocol are analyzed using a discrete time Markov process and a D/G/1 queue with batch arrivals. The numerical results show that the performance is improved as the message length increases, the maximum round-trip propagation delay decreases, and the number of data channels increases.

  • The FB Mechanism for TCP over UBR in Subnet ATM Models

    Woo-June KIM  Byeong Gi LEE  

     
    PAPER-Switching and Communication Processing

      Vol:
    E82-B No:3
      Page(s):
    481-488

    In this paper, we present the FB (Fair Buffering) mechanism for the efficient support of TCP traffic over UBR connections in the subnet ATM model. We show that both throughput and fairness may be improved by using this congestion control mechanism. The FB mechanism is founded on the observation that the performance of TCP over UBR connections is optimal when the buffer space is allocated in proportion to the connection's bandwidth-delay product. We compare the performance of the existing drop-tail, EB (Equal Buffering) and the proposed FB buffer management schemes, with and without RR (Round-Robin) scheduling, and show through simulation the effectiveness of the proposed FB mechanism when used with the RR scheduling scheme.

  • Influence of the Model Order Estimation Error in the ESPRIT Based High Resolution Techniques

    Kei SAKAGUCHI  Jun-ichi TAKADA  Kiyomichi ARAKI  

     
    LETTER-Antennas and Propagation

      Vol:
    E82-B No:3
      Page(s):
    561-563

    Effects of the model order estimation error in the TLS-ESPRIT algorithm were investigated. It was found that if the model order is overestimated true signal parameters are preserved even though spurious signals of which power values are negligibly small appear, whereas if the model order is underestimated some signals degenerate to each others, resulting in the erroneous estimates.

  • Spatial and Temporal Dynamics of Vision Chips Including Parasitic Inductances and Capacitances

    Haruo KOBAYASHI  Takashi MATSUMOTO  

     
    PAPER

      Vol:
    E82-A No:3
      Page(s):
    412-416

    There are two dynamics issues in vision chips: (i) The temporal dynamics issue due to the parasitic capacitors in a CMOS chip, and (ii) the spatial dynamics issue due to the regular array of processing elements in a chip. These issues are discussed in [1]-[3] for the resistor network with only associated parasitic capacitances. However, in this paper we consider also parasitic inductances as well as parasitic capacitances for a more precise network dynamics model. We show that in some cases the temporal stability condition for the network with parasitic inductances and capacitances is equivalent to that for the network with only parasitic capacitances, but in general they are not equivalent. We also show that the spatial stability conditions are equivalent in both cases.

  • Computational Sensors -- Vision VLSI

    Kiyoharu AIZAWA  

     
    INVITED SURVEY PAPER

      Vol:
    E82-D No:3
      Page(s):
    580-588

    Computational sensor (smart sensor, vision chip in other words) is a very small integrated system, in which processing and sensing are unified on a single VLSI chip. It is designed for a specific targeted application. Research activities of computational sensor are described in this paper. There have been quite a few proposals and implementations in computational sensors. Firstly, their approaches are summarized from several points of view, such as advantage vs. disadvantage, neural vs. functional, architecture, analog vs. digital, local vs. global processing, imaging vs. processing, new processing paradigms. Then, several examples are introduced which are spatial processings, temporal processings, A/D conversions, programmable computational sensors. Finally, the paper is concluded.

  • A Flip-Flop Circuit with a Directly Controlled Emitter-Follower and a Level Stabilizer for Low-Power Prescalers

    Hisayasu SATO  Nagisa SASAKI  Takahiro MIKI  

     
    PAPER-Silicon Devices

      Vol:
    E82-C No:3
      Page(s):
    504-510

    This paper describes a flip-flop circuit using a directly controlled emitter-follower with a diode-feedback level stabilizer (DC-DF) and a resistor-feedback level stabilizer (DC-RF) for low-power multi-GHz prescalers. The new flip-flop circuit reduces the emitter-follower current and gains both high-frequency operation and low-power. A dual modulus (4/5) prescaler using this circuit technology was fabricated with a 0.35 µm BiCMOS process. The current draw of the prescaler using the DC-RF is 34% smaller than conventional LCML circuits. The DC-RF prescaler operates at 2.11 GHz with a total current consumption of 1.03 mA. In addition, the circuit operates with a supply voltage of down to 2.4 V by using the resistor level-shift clock-driver.

  • Low-Power 2.5-Gb/s Si-Bipolar IC Chipset for Optical Receivers and Transmitters Using Low-Voltage and Adjustment-Free Circuit Techniques

    Masaki HIROSE  Keiji KISHINE  Haruhiko ICHINO  Noboru ISHIHARA  

     
    PAPER-Silicon Devices

      Vol:
    E82-C No:3
      Page(s):
    511-518

    This paper describes a 2.5-Gb/s optical receiver and transmitter chipset consisting of a preamplifier, a main amplifier, a clock and data recovery (CDR) circuit, and a laser-diode (LD) driver. Low-voltage and adjustment-free circuit techniques are introduced in order to achieve low cost and low power circuits. Circuit adjustments are eliminated by using a multi-stage automatic offset canceling technique in the main amplifier, and by using a PLL structure with a sample-and-hold technique in the CDR circuit. For power reduction, ICs are operated at a power supply voltage of -3 V. Fabricating the ICs by a 0.5-µm Si bipolar process makes it possible to achieve 2.5-Gb/s receiver and transmitter operation with a total power dissipation of 1.04 W. Especially significant is that the receiver ICs need no external devices and adjustments.

  • Omnidirectional Sensing and Its Applications

    Yasushi YAGI  

     
    INVITED SURVEY PAPER

      Vol:
    E82-D No:3
      Page(s):
    568-579

    The goal of this paper is to present a critical survey of existing literature on an omnidirectional sensing. The area of vision application such as autonomous robot navigation, telepresence and virtual reality is expanding by use of a camera with a wide angle of view. In particular, a real-time omnidirectional camera with a single center of projection is suitable for analyzing and monitoring, because we can easily generate any desired image projected on any designated image plane, such as a pure perspective image or a panoramic image, from the omnidirectional input image. In this paper, I review designs and principles of existing omnidirectional cameras, which can acquire an omnidirectional (360 degrees) field of view, and their applications in fields of autonomous robot navigation, telepresence, remote surveillance and virtual reality.

  • Analysis and Simulation of Fiber Optic Temperature Sensor Using Mode-Division Multiplex

    Manabu YOSHIKAWA  

     
    LETTER-Opto-Electronics

      Vol:
    E82-C No:3
      Page(s):
    562-564

    Phase performance in a fiber optic temperature sensor using a mode-division multiplex is studied. The phase shift due to the temperature change of a multimode graded-index optical fiber is analyzed. The intensity fluctuation by the interference of two modes is estimated in computer simulation.

  • Self-Aligned SiGe HBTs with Doping Level Inversion Using Selective Epitaxy

    Shuji ITO  Toshiyuki NAKAMURA  Hiroshi HOGA  Satoshi NISHIKAWA  Hirokazu FUJIMAKI  Yumiko HIJIKATA  Yoshihisa OKITA  

     
    PAPER-Silicon Devices

      Vol:
    E82-C No:3
      Page(s):
    526-530

    SiGe HBTs with doping level inversion, that is, a higher dopant concentration in the base than in the emitter, are realized based on the double-polysilicon self-aligned transistor scheme by means of selective epitaxy performed in a production CVD reactor. The effects of the Ge profile in the base on the transistor performance are explored. The fabricated HBT with a 12-27% graded Ge profile demonstrates a maximum cutoff frequency of 88 GHz, a maximum oscillation frequency of 65 GHz, and an ECL gate delay time of 13.8 ps.

  • Ultra-High-Speed GaAs MESFET IC Modules Using Flip Chip Bonding

    Hiroyuki KIKUCHI  Hideki TSUNETSUGU  Makoto HIRANO  Satoshi YAMAGUCHI  Yuhki IMAI  

     
    PAPER-Compound Semiconductor Devices

      Vol:
    E82-C No:3
      Page(s):
    475-482

    This paper describes a distributed amplifier IC module and a distributed 1 : 2 signal distributor IC module for 40-Gbit/s optical transmission systems. These ICs were designed by the distributed circuit and inverted-microstrip-line design technique and fabricated using 0. 1-µm-gate-length GaAs MESFETs with a multilayer interconnection structure. These were mounted on a thin film multilayer substrate in a chip-size-cavity package by means of a flip-chip-bonding technique that uses transferred microsolder bumps. The amplifier module achieved a 3-dB bandwidth of more than 50 GHz and a gain of 8 dB. The 3-dB bandwidth of a 1 : 2 signal distributor module was 40 GHz and the loss was 2 dB. These modules were demonstrated at 40 Gbit/s and clear eye openings were confirmed.

  • AlGaAs/GaAs HBT ICs for 20-Gb/s Optical Transmission Systems

    Nobuo NAGANO  Masaaki SODA  Hiroshi TEZUKA  Tetsuyuki SUZAKI  Kazuhiko HONJO  

     
    PAPER-Compound Semiconductor Devices

      Vol:
    E82-C No:3
      Page(s):
    465-474

    This report describes AlGaAs/GaAs HBT ICs for 20-Gb/s optical transmission, the preamplifier and optical modulator driver circuits, and those ICs for 10-Gb/s clock extraction circuits, the rectifier and phase shifter circuits. These ICs were fabricated using our developed hetero guard-ring fully self-aligned HBT (HG-FST) fabrication process. The Pt-Ti-Pt-Au multimetal system was also used as a base ohmic metal to reduce base contact resistance, and a high fmax of 105 GHz was obtained. Good results in the HBT IC microwave performances were achieved from the on-wafer measurements. The preamplifiers exhibited the broad bandwidth of 20. 9 GHz. The optical modulator driver performed a sufficiently large output-voltage swing of 4-VP-P at a 20-Gb/s data rate. The rectifier and the phase shifter circuits achieved good operations at 10-Gb/s. These results suggest that these HBT ICs can be applied to 20-Gb/s optical transmission and 10-Gb/s clock extraction systems.

  • Fast Precise Interrupt Handling without Associative Searching in Multiple Out-Of-Order Issue Processors

    Sang-Joon NAM  In-Cheol PARK  Chong-Min KYUNG  

     
    PAPER-Computer Hardware and Design

      Vol:
    E82-D No:3
      Page(s):
    645-653

    This paper presents a new approach to the precise interrupt handling problem in modern processors with multiple out-of-order issues. It is difficult to implement a precise interrupt scheme in the processors because later instructions may change the process states before their preceding instructions have completed. We propose a fast precise interrupt handling scheme which can recover the precise state in one cycle if an interrupt occurs. In addition, the scheme removes all the associative searching operations which are inevitable in the previous approaches. To deal with the renaming of destination registers, we present a new bank-based register file which is indexed by bank index tables containing the bank identifiers of renamed register entries. Simulation results based on the superscalar MIPS architecture show that the register file with 3 banks is a good trade-off between high performance and low complexity.

  • Motion and Shape from Sequences of Images under Feature Correspondences

    Jun FUJIKI  

     
    INVITED SURVEY PAPER

      Vol:
    E82-D No:3
      Page(s):
    548-557

    The reconstruction of motion and structure from multiple images is fundamental and important problem in computer vision. This paper highlights the recovery of the camera motion and the object shape under some camera projection model from feature correspondences especially the epipolar geometry and the factorization method for mainly used projection models.

  • AlGaAs/InGaAs HBT IC Modules for 40-Gb/s Optical Receiver

    Risato OHHIRA  Yasushi AMAMIYA  Takaki NIWA  Nobuo NAGANO  Takeshi TAKEUCHI  Chiharu KURIOKA  Tomohiro CHUZENJI  Kiyoshi FUKUCHI  

     
    PAPER-Compound Semiconductor Devices

      Vol:
    E82-C No:3
      Page(s):
    448-455

    Optical frontend and distributed amplifier IC modules, both containing GaAs heterojunction-bipolar-transistors (HBT), have been developed for 40 Gb/s optical receiver. To achieve high-speed operations, the elements in the modules including the IC and signal lines, were designed to achieve a wider bandwidth with lower electrical reflection. The influence of a bonding-wire inductance was taken into particular account in optimizing the parameters of the ICs. The optical frontend, consisting of a waveguide pin-photodiode and an HBT preamplifier IC, exhibits a transimpedance gain of 43 dBΩ and a bandwidth of 31 GHz. The distributed amplifier IC module achieves a gain of 9 dB and a bandwidth of 39 GHz. A 40-Gb/s optical receiver constructed with these modules exhibited a high receiver sensitivity of -28. 2 dBm for a 40-Gb/s optical return-to-zero signal.

  • Femtosecond Operation of a Polarization-Discriminating Symmetric Mach-Zehnder All-Optical Switch and Improvement in Its High-Repetition Operation

    Shigeru NAKAMURA  Yoshiyasu UENO  Kazuhito TAJIMA  

     
    PAPER-Photonic Switching Devices

      Vol:
    E82-C No:2
      Page(s):
    327-334

    We experimentally demonstrate the ultrafast and high-repetition capabilities of a polarization-discriminating symmetric Mach-Zehnder (PD-SMZ) all-optical switch. This switch, as well as an original symmetric Mach-Zehnder (SMZ) all-optical switch, is based on a highly efficient but slowly relaxing band-filling effect that is resonantly excited in a passive InGaAsP bulk waveguide. By using a mechanism that cancels out the effect of the slow relaxation, ultrafast switching is attained. We achieve a switching time of 200 fs and demultiplexing of 1.5 Tbps, showing the applicability of the SMZ or PD-SMZ all-optical switches to optical demultiplexing of well over 1 Tbps for the first time. High-repetition capability, which is another important issue apart from the switching speed, is also verified by using control pulses at a repetition rate of 10.5 GHz. We also discuss the use of nonlinearity in a semiconductor optical amplifier to further reduce the control-pulse energy.

3901-3920hit(4754hit)