In the commonsense reasoning, priorities among rules are often required to be found out in order to derive the desired conclusion as a theorem of the reasoning. In this paper, first we present the bottom-up and top-down abduction procedures to compute skeptical explanations and secondly show that priorities of circumscription to infer a desired theorem can be abduced as a skeptical explanation in abduction. In our approach, the required priorities can be computed based on the procedure to compute skeptical explanations provided in this paper as well as Wakaki and Satoh's method of compiling circumscription into extended logic programs. The method, for example, enables us to automatically find the adequate priority w. r. t. the Yale Shooting Problem to express a human natural reasoning in the framework of circumscription.

We propose a method of reducing laser-clipping-induced distortion in a subcarrier multiplexed (SCM) optical-cable TV system. This scheme reduces amplitude peaks of the SCM signal by controlling the phases of video carriers to prevent the clipping which occurs when these peaks fall below the threshold of a laser-diode. It is experimentally shown that using this method reduces the bit error rate in an AM-VSB / QAM hybrid optical-transmission system.

An innovative small planar packaging(SPP)system is described that can be combined with card-on-board(COB)packaging in high-speed asynchronous transfer mode switching systems with throughput of over 40-Gb/s. The SPP system provides high I/O pin count density and high packaging density, combining the advantages of both planar packaging used in computer systems and COB packaging used in telecommunication systems. Using a newly developed quasi-coaxial zero-insertion-force connector, point-to-point 311 Mb/s of 8-bit parallel signal transmission is achieved in an arbitrary location on the SPP systems shelf. Also about 5400 I/O connections in the region of the planar packaging system are made, thus the SPP system effectively eliminates the I/O pin count limitation. Furthermore, the heat flux management capability of the SPP system is five times higher than of conventional COB packaging because of its air flow control structure. An SPP system can easily enlarge the switch throughput and it will be useful for future high-speed, high-throughput ATM switching systems.

For the realization of the very high-speed data transmission over wide area network, the HIPPI-ATM conversion for connecting two remote HIPPI end systems is specified by ANSI. Since the credit scheme is adopted for the flow control on the ATM part in the specification, the propagation delay influences the remarkable transfer throughput degradation with the longer distance between end systems. In this paper, two priority types of HIPPI bursts are proposed, which include the flag indicating the priority, high priority or low priority. We propose the hybrid scheme that the credit scheme is adopted only for sending the high priority HIPPI bursts and the source can send low priority HIPPI bursts without reserving buffers in the receiver. In order to confirm the effectiveness of the proposed scheme, we show the characteristics of transfer performance and low priority bursts loss ratio v. s. transmission distance by simulation. Furthermore, we introduce the implemental example of the proposed scheme in the MPEG video transmission application, and show it's good performance.

We report the state of the art of superconducting network switching circuits and system technology. Mainly, we describe our switching core circuits and challenges to demonstrate superconducting prototype systems. And also, we review other approach to perform the superconducting digital communication briefly. In our switching core circuits, a ring-pipeline architecture has been proposed and the component circuits of the prototype chips have been fabricated and tested successfully. It is very important to demonstrate the prototype system in order to estimate the total performance of the system with superconducting devices. We have designed a multi-processor system with a superconducting network as a prototype system to demonstrate an interprocessor network system.

This paper proposes a new method for dynamically controlling the clock speed of a processor in order to reduce power consumption without decreasing system performance. It automatically tunes the processor's speed by monitoring its activities and avoiding useless work so as not to exhaust the battery energy. Experiments with performance bottlenecks caused by disk activities show that the proposed method is very effective in comparison with the traditional one, in which the processor's speed is fixed.

We propose an architectural reference of programmable devices that we call Plastic Cell Architecture (PCA). PCA is a reference for implementing a device with autonomous reconfigurability, which we also introduce in this paper. This reconfigurability is a further step toward new reconfigurable computing, which introduces variable- and programmable-grained parallelism to wired logic computing. This computing follows the Object-Oriented paradigm: it regards configured circuits as objects. These objects will be described in a new hardware description language dealing with the semantics of dynamic module instantiation. PCA is the fusion of SRAM-based FPGAs and cellular automata (CA), where the CA are dedicated to support run time activities of objects. This paper mainly focus on autonomous reconfigurability and PCA. The following discussions examine a research direction towards general-purpose reconfigurable computing.

An elastic-Vt CMOS circuit is proposed which facilitates both high speed and low power consumption at low supply voltages. This circuit permits fine-grain power control on each multiple circuit block composing a chip, and it is not sensitive to design factors as device-parameter deviations or operating-environment variations. It also does not require any such additional fabrication technology as triple-well structure or multi-threshold voltage. The effectiveness of the circuits design was confirmed in applying it to specially fabricated 16-bit adders and 4-kb SRAMs based on 1. 5-V, 0. 35- µm CMOS technology.

In this paper we describe the pipeline design and enhanced hardware for fast message handling in a RICA-1 processor, a processing element (PE) in the RWC-1 multiprocessor. The RWC-1 is based on the reduced inter-processor communication architecture (RICA), in which communications are combined with computation in the processor pipeline. The pipeline is enhanced with hardware mechanisms to support fine-grain parallel execution. The data paths of the RICA-1 super-scalar processor are commonly used for communication as well as instruction execution to minimize its implementation cost. A 128-PE system has been built on January 1998, and it is currently used for hardware debugging, software development and performance evaluation.

Two families of rapidly synchronizable spreading codes are compared using the same component codes. The influence of component code choice is also discussed. It is concluded that correlation, code-division multiple-access (CDMA) and information security (measured by the value of linear complexity) properties of Kronecker sequences are considerably better than those of Combination sequences. Combination sequences cannot be recommended for CDMA use unless the number of active users is few. CDMA performance of Kronecker sequences is almost comparable with that of linear pseudonoise (PN) code families of equal length when a Gold or Kasami code is used as the innermost code and the Barker code is used as the outermost code to guarantee satisfactory correlation and CDMA properties. Kronecker sequences possess a considerably higher value of linear complexity than those of the corresponding non-linear Geffe and majority logic type combination sequences. This implies they are highly non-linear codes due to the Kronecker product construction method. It is also observed that the Geffe type Boolean combiner resulted in better correlation and CDMA performance than with majority logic. The use of the purely linear exclusive-or combiner for considerable reduction of code synchronization time is not found recommendable although it results in good CDMA performance.

In this paper, we propose a multiple access technique using a simple interference canceller for common code transmission. In the proposed system, we adopt a common code for a receiver oriented system. All the transmitters utilize the same pseudo noise (PN) code to communicate with a receiver. Here the receiver structure becomes very simple with only one matched filter (MF). The proposed system has two very important merits. One is to avoid packet collisions by means of an interference cancellation method based on a common code chip shift transmission technique. That is, in order to avoid interference, which occurs because all the received signals have the same PN code, the same data with different timing are transmitted in two channels. In this study, we define and evaluate three types of packet collision which can be reduced by the canceller. The other merit is to reduce the system degradation due to the correlation side-lobes by means of a side-lobe canceller. In spread spectrum (SS) communication systems with PN codes like M-sequences, the correlation side-lobes appear at the detector in the case of the polarity data changing from 1 to 1 . The side-lobes degrade the system quality. Therefore in this system a interference canceller operates to cancel the correlation side-lobes and attempts to reduce the system degradation. Finally, by our cancellation method it becomes possible to realize a simple multiple access using only one PN code under the condition of a receiver oriented system without a base station.

As a data transmission rate must be increased as required to support the future high-speed wireless communication systems under multipath fading, the conventional DS-CDMA scheme suffers considerably from an intensive processing requirement for the increased spreading rate to combat the inter-chip interference (ICI) and furthermore, from the intersymbol interference (ISI) as the symbol duration becomes less than the channel delay spread. In this paper, a multi-carrier parallel combinatory DS-CDMA (MC-PC-CDMA) scheme is considered as one possible variant access scheme to realize a bandwidth efficient transmission for high transmission rate while maintaining the beneficial features of the DS-CDMA scheme. This scheme combines the parallel combinatory signaling feature of the existing parallel combinatory CDMA (PC-CDMA) scheme with the orthogonal carrier multiplexing feature of multi-carrier modulation so as to improve the bandwidth efficiency and to reduce the self-interference among the parallel spreading sequences of each user, respectively. This particular system configuration also treats the previously proposed multi-carrier DS-CDMA systems as a special case. Our analysis of the bit error rate for the asynchronous CDMA system investigates the performance characteristics of the proposed system on varying design parameters, and shows the performance comparison with other types of multi-carrier DS-CDMA systems.

The hippocampus is thought to play an important role in the transformation from short-term memory into long-term memory, which is called consolidation. The physiological phenomenon of synaptic change called LTP or LTD has been studied as a basic mechanism for learning and memory. The neural network mechanism of the consolidation, however, is not clarified yet. The authors' approach is to construct information processing theory in learning and memory, which can explain the physiological data and behavioral data. This paper proposes a dynamical hippocampal model which can store and recall spatial input patterns. The authors assume that the primary functions of hippocampus are to store episodic information of sensory signals and to keep them for a while until the neocortex stores them as a long-term memory. On the basis of the hippocampal architecture and hypothetical synaptic dynamics of LTP/LTD, the authors construct a hippocampal model. This model considers: (1) divergent connections, (2) the synaptic dynamics of LTP and LTD based on pre- and postsynaptic coincidence, and (3) propagation of LTD. Computer simulations show that this model can store and recall its input spatial pattern by self-organizing closed activating pathways. By the backward propagation of LTD, the synaptic pathway for a specific spatial input pattern can be selected among the divergent closed connections. In addition, the output pattern also suggests that this model is sensitive to the temporal timing of input signals. This timing sensitivity suggests the applicability to spatio-temporal input patterns of this model. Future extensions of this model are also discussed.

Dense WDM techniques that exploit the enormous bandwidth of dispersion-shifted fibers (DSFs) while avoiding the impairments due to nonlinear effects are described. First, the nature of four-wave mixing (FWM), the dominant impairment factor in WDM transmission systems, is investigated using DSF installed in the field and laboratory experiments. This provides useful information for the practical design of WDM networks based on DSF. Second, practical techniques to reduce FWM impairment, unequal channel allocation and off-lambda-zero channel allocation (equal channel allocation in the novel 1580 nm band) along with gain-shifted erbium-doped fiber amplifiers for the 1570 to 1600 nm band, is described. Comparisons between off-lambda-zero and unequal channel allocation are provided in terms of the maximum transmission distance for various numbers of channels. Two schemes to immunize WDM systems against group velocity dispersion, span-by-span dispersion compensation and optical duobinary format, are presented. The combination of unequal channel allocation with off-lambda-zero channel allocation as well as the combination of two bands: the conventional 1550 nm band and the novel 1580 nm band are proven to be very useful in expanding the usable bandwidth of DSFs.

In this paper, we show the effectiveness of software shaping through evaluation of our extensions to the internet transport protocols, TCP (Transmission Control Protocol) and UDP (User Datagram Protocol). These extensions are aimed at efficient realization of bulk data transfer and continuous media communication. The extensions are to be used with resource reservation, a possible and promising approach to resolve transport issues that the current TCP/IP networks cannot support. Although it seems straightforward to utilize dedicated bandwidth set up via resource reservation, filling up the reserved pipe is not so trivial. Performance analysis shows that, by applying the traffic shaping extensions, not only is the reserved pipe easily filled up, but the timely data delivery required by continuous media communication is also provided. Our experiments with a real system also show that overheads introduced by the new extensions are small enough to permit their practical use. The extensions are implemented in the UNIX system kernel.

By sacrificing approximately ten percent of the transmission speed, ultra-high speed optical time division multiplexed network can be fully operatable by the use of currently available electrical switches. The network utilizes dispersion managed quasi-solitons and transmits TDM packet which comprises of ATM cells that are introduced from a gateway through bit compression to match to the ultra-high speed traffics. The network can provide flexible bandwidth and bit on demand at burst rate of the maximum LAN speed.

The results of experiments on the effect of the height and diameter of the cup on cup microstrip antennas are presented. The results show that the optimum height of the cup for the narrowest beamwidth and the highest gain is about 1/3 λ, and that the beamwidth decreases and the gain increases as the diameter of the cup increases.

The Heart Rate Variability (HRV) analysis has become vigorous these days. One reason for this is that the HRV analysis investigates the dynamics of the autonomic nervous system activities which control the HRV. The Integral Pulse Frequency Modulation (IPFM) model is a pulse generating mechanism model in the nervous system, that is one of the models which connects the HRV to the autonomic nervous system activities. The IPFM model is a single frequency component model; however, the real HRV has multiple frequency components. Moreover, there are refractory periods after generating action potentials are initiated. Nevertheless, the IPFM model does not consider refractory periods. In order to make sure of the accuracy and the effectiveness of the integral function (IF) method applied to the real data, we consider the absolute refractory periods and two frequency components. In this investigation, the simulated HRV was made with a single and double frequency component using the IPFM model with and without absolute refractory periods. The original generating function of the IPFM model was demodulated by using the instantaneous heart rate tachogram. The power of the instantaneous pulse rate per minute was analyzed by the direct FFT method, the IF FFT method without the absolute refractory periods, and the IF FFT method with the absolute refractory periods. It was concluded that the IF FFT method can demodulate the original generating function accurately.

The effectiveness of periodic dispersion compensation on single-channel 40 Gbit/s soliton transmission system was experimentally investigated. This technique requires just the dispersion compensation fibers and wideband optical filters in the transmission line, which has no difficulty to be used in the practical system. By using polarization-division-multiplexing together with periodic dispersion compensation, single-channel 40 Gbit/s transmission over 4700 km was demonstrated. Single-polarization 40 Gbit/s transmission experiments, which are more suitable for system implementation and compatible with WDM were also conducted. We investigated the transmission characteristics and pulse dynamics in different dispersion maps and in the optimized dispersion map, single-channel, single-polarization 40 Gbit/s transmission over 6300 km was successfully demonstrated.

This paper describes the design of polarization insensitive InP-based arrayed waveguide gratings (AWGs), and the characteristics of fabricated devices. The use of a deep-ridge waveguide structure made the fabrication of compact polarization-insensitive AWGs possible. As a result, a low crosstalk (-30 dB) 8-channel AWG and a large-scale (64 channel) AWG with 50 GHz channel spacing could be fabricated. An integrated circuit containing an 8-channel AWG with photodetectors is also described.