The problem of E-polarized plane wave diffraction by a thin material strip is analyzed using the Wiener-Hopf technique together with approximate boundary conditions. Exact and high-frequency asymptotic solutions are obtained. Our final solution is valid for the case where the strip thickness is small and the strip width is large in comparison to the wavelength. The scattered field is evaluated asymptotically based on the saddle point method and a far field expression is derived. Numerical examples on the radar cross section (RCS) are presented for various physical parameters and the scattering characteristics of the strip are discussed in detail.

We have demonstrated crosstalk mitigation in single-mode MCFs using optical space coding. Four types of single-mode multicore fiber (MCF) models were evaluated by our scheme with the modified prime code and differential detection. Typically, intercore crosstalk was improved by 7-20 dB in 9-core fibers with an original crosstalk of 10-20 dB.

In this correspondence, two types of multiple binary zero correlation zone (ZCZ) sequence sets with inter-set zero cross-correlation zone (ZCCZ) are constructed. Based on orthogonal matrices with order N×N, multiple binary ZCZ sequence sets with inter-set even and odd ZCCZ lengthes are constructed, each set is an optimal ZCZ sequence set with parameters (2N2, N, N+1)-ZCZ, among these ZCZ sequence sets, sequences possess ideal cross-correlation property within a zone of length 2Z or 2Z+1. These resultant multiple ZCZ sequence sets can be used in quasi-synchronous CDMA systems to remove the inter-cell interference (ICI).

In this paper, we consider the crosscorrelation of two interleaved sequences of period 4N constructed by Gong and Tang which has been proved to possess optimal autocorrelation. Results show that the interleaved sequences achieve the largest crosscorrelation value 4.

Internet of Things (IoT) devices deployed in urban areas are seen as data sources for urban sensing IoT applications. Since installing cellular interfaces on a huge number of IoT devices is expensive, we propose to use a user equipment (UE) device with a local wireless interface as a mobile IoT gateway for fixed IoT devices. In this paper, we design a new mobile architecture based on cellular networks to accommodate non-cellular fixed IoT devices by UE devices working as IoT gateways. One key feature is that our architecture leverages proximity services (ProSe) to discover relay UE devices with low overhead in terms of discovery messages. Through simulation studies, we clarify the feasibility of our architecture including the relay UE discovery mechanism in urban areas.

We present dynamic mode switching characteristic by using a 2 × 2 optical mode switch based on silicon waveguide. The configuration of optical mode switch is similar to MZI where the width of input and output ports are designed to permit the combining of the fundamental mode and the first order mode. We designed the symmetrical arms with phase shifter based on p-i-n structure in one arm to generate a π-phase difference between each arm. As a result, mode switching with the injection current of 60mA (5.7V) was successfully achieved with the mode crosstalk of -10dB at λ=1550nm. A minimum of less than 60ns and 40ns mode switching time for the fundamental mode to first order mode and first order mode to fundamental mode, was achieved respectively in this time.

An ultra-compact InGaAs photodetector (PD) is demonstrated based on a photonic crystal (PhC) waveguide to meet the demand for a photoreceiver for future dense photonic integration. Although the PhC-PD has a length of only 1.7µm and a capacitance of less than 1fF, a high responsivity of 1A/W was observed both theoretically and experimentally. This low capacitance PD allows us to expect a resistor-loaded receiver to be realized that requires no electrical amplifiers. We fabricated a resistor-loaded PhC-PD for light-to-voltage conversion, and demonstrated a kV/W efficiency with a GHz bandwidth without using amplifiers. This will lead to a photoreceiver with an ultralow energy consumption of less than 1fJ/bit, which is a step along the road to achieving a dense photonic network and processor on a chip.

Break arcs are rotated with a radial magnetic field formed by a permanent magnet embedded in a fixed contact. The break arcs are generated in a 48VDC resistive circuit. The circuit current is 10A when the contacts are closed. The polarity of the fixed contact in which the magnet is embedded is changed. The rotational radius and the difference of position between the cathode and anode spots are investigated. The following results are obtained. The cathode spot is moved more easily than the anode spot by the radial magnetic field. The rotational radius of the break arcs is affected by the Lorentz force that is caused by the circumferential component of the arc current and the axial component of the magnetic field. The circumferential component of the arc current is caused by the difference of the positions of the rotating cathode and anode spots.

Systematic research on electromagnetic compatibility (EMC) in Japan started in 1977 by the establishment of a technical committee on “environmental electromagnetic engineering” named EMCJ, which was founded both in the Institute of Electronics and Communication Engineers or the present IEICE (Institute of Electronics, Information and Communication Engineers) and in the Institute of Electrical Engineers of Japan or the IEEJ. The research activities have been continued as the basic field of interdisciplinary study to harmonize even in the electromagnetic (EM) environment where radio waves provide intolerable EM disturbances to electronic equipment and to that environment itself. The subjects and their outcomes which the EMCJ has dealt with during about 40 years from the EMCJ establishment include the evaluation of EM environment, EMC of electric and electronic equipment, and EMC of biological effects involving bioelectromagnetics and so on. In this paper, the establishment history and structure of the EMCJ are reviewed along with the change in activities, and topics of the technical reports presented at EMCJ meetings from 2006 to 2016 are surveyed. In addition, internationalization and its related campaign are presented in conjunction with the EMCJ research activities, and the status quo of the EMCJ under the IEICE is also discussed along with the prospects.

Many DC commutator motors are widely used in automobiles. In recent years, as compact and high output DC motors have been developed due to advanced technology, the faster the rotational speed is required and the commutation arc causes a high rate of wear/erosion of brush and commutator. Therefore, it is important how the motor speed influences commutation phenomena such as arc duration, residual current and erosion and wear of commutator and brush in order to achieve high reliability and extensive lifespan. In this paper waveforms of commutation voltage and current are measured at the rotation speed of 1000 to 5000min-1and the relation between rotation speed and arc duration / residual current is obtained. In addition long term tests are carried out at the rotation speed of 1000 to 5000min-1 the change of arc duration and effective commutation period is examined during the test of 20hours. Further, brush wear is evaluated by the difference of brush length between before and after test. Consequently, it can be made clear that as the speed increases, the effective commutation period decreases and the arc duration is almost same at the speed up to 3000min-1 and is around 42µsec.

This study focuses on the design of electrical stimulator for retinal prosthesis. The stimulator must be designed such that the occurrence of electrolysis or any irreversible process in the electrodes and flexible lead is prevented in order to achieve safe stimulation over long periods using the large number of electrodes. Some types of biphasic current pulse circuits, charge balance circuits, and AC power delivery circuits were developed to address this issue. Electronic circuitry must be introduced in the stimulator to achieve the large number of electrodes required to obtain high quality of vision. The concept of a smart electrode, in which a microchip is embedded inside an electrode, is presented for future retinal prostheses with over 1000 electrodes.

It inevitably comes out information overload problem with the increasing available data on e-commence websites. Most existing approaches have been proposed to recommend the users personal significant and interesting items on e-commence websites, by estimating unknown rating which the user may rate the unrated item, i.e., rating prediction. However, the existing approaches are unable to perform user prediction and item prediction, since they just treat the ratings as real numbers and learn nothing about the ratings' embeddings in the training process. In this paper, motivated by relation prediction in multi-relational graph, we propose a novel embedding model, namely RPEM, to solve the problem including the tasks of rating prediction, user prediction and item prediction simultaneously for recommendation systems, by learning the latent semantic representation of the users, items and ratings. In addition, we apply the proposed model to cross-domain recommendation, which is able to realize recommendation generation in multiple domains. Empirical comparison on several real datasets validates the effectiveness of the proposed model. The data is available at https://github.com/yuzhaour/da.

Improving robustness in electrostatic discharge (ESD) protection by inserting drain-side isolated silicon-controlled rectifiers (SCRs) in a high-voltage (HV) p-channel lateral-diffused MOSFET (pLDMOS) device was investigated in this paper. Additionally, the effects of anti-ESD reliability in the HV pLDMOS transistors provided by this technique were evaluated. From the experimental data, it was determined that the holding voltage (Vh) values of the pLDMOS with an embedded npn-arranged SCR and discrete thin-oxide (OD) layout on the cathode side increased as the parasitic SCR OD row number decreased. Moreover, the trigger voltage (Vt1) and the Vh values of the pLDMOS with a parasitic pnp-arranged SCR and discrete OD layout on the drain side fluctuated slightly as the SCR OD-row number decreased. Furthermore, the secondary breakdown current (It2) values (i.e., the equivalent ESD-reliability robustness) of all pLDMOS-SCR npn-arranged types increased (>408.4%) to a higher degree than those of the pure pLDMOS, except for npn-DIS_3 and npn-DIS_2, which had low areas of SCRs. All pLDMOS-SCR pnp-arranged types exhibited an increase of up to 2.2A-2.4A, except for the pnp_DIS_3 and pnp_DIS_2 samples; the pnp_DIS_91 increased by approximately 2000.9% (249.1%), exhibiting a higher increase than that of the reference pLDMOS (i.e., the corresponding pnp-stripe type). The ESD robustness of the pLDMOS-SCR pnp-arranged type and npn-arranged type with a discrete OD layout on the SCR cathode side was greater than that of the corresponding pLDMOS-SCR stripe type and a pure pLDMOS, particularly in the pLDMOS-SCR pnp-arranged type.

The measurement accuracy of frequency difference of arrival (FDOA) is usually determinant for emitters location system using rapidly moving receivers. The classic technique of expanding the integration time of the cross ambiguity function (CAF) to achieve better performance of FDOA is likely to incur a significant computational burden especially for wideband signals. In this paper, a nonconsecutive short-time CAF's methods is proposed with expansion of root mean square (RMS) integration time, instead of the integration time, and a factor of estimation precision improvement is given which is relative to the general consecutive method. Furthermore, by analyzing the characteristic of coherent CAF and the influence of FDOA rate, an upper bound of the precision improvement factor is derived. Simulation results are provided to confirm the effectiveness of the proposed method.

In this paper, for an odd prime p, two positive integers n, m with n=2m, and pm≡1 (mod 4), we derive an upper bound on the magnitude of the cross-correlation function between two decimated sequences of a p-ary m-sequence. The two decimation factors are 2 and 2(pm+1), and the upper bound is derived as $rac{3}{2}p^m + rac{1}{2}$. In fact, those two sequences correspond to the p-ary sequences used for the construction of Kasami sequences decimated by 2. This result is also used to obtain an upper bound on the cross-correlation magnitude between a p-ary m-sequence and its decimated sequence with the decimation factor $d=rac{(p^m +1)^2}{2}$.

A 1.9GHz film bulk acoustic resonator (FBAR)-based low-phase-noise complementary cross-coupled voltage-controlled oscillator (VCO) is presented. The FBAR-VCO is designed and fabricated in 0.18µm CMOS process. The DC latch and the low frequency instability are resolved by employing the NMOS source coupling capacitor and the DC blocked cross-coupled pairs. Since no additional voltage headroom is required, the proposed FBAR-VCO can be operated at a low power supply voltage of 1.1V with a wide voltage swing of 0.9V. An effective phase noise optimization is realized by a reasonable trade-off between the output resistance and the trans-conductance of the cross-coupled pairs. The measured performance shows the proposed FBAR-VCO achieves a phase noise of -148dBc/Hz at 1MHz offset with a figure of merit (FoM) of -211.6dB.

A chirp spread spectrum (CSS) system uses a chirp signal which changes the instantaneous frequency according to time for spreading a transmission bandwidth. In the CSS system, the transmission performance can be simply improved by increasing the time-bandwidth product which is known as the processing gain. However, increasing the transmission bandwidth is limited because of the spectrum regulation. In this letter, we propose a correlation-based chirp rate allocation method to improve the transmission performance by analyzing the cross-correlation coefficient in the same time-bandwidth product. In order to analyze the transmission performance of the proposed method, we analytically derive the cross-correlation coefficient according to the time-bandwidth separation product and simulate the transmission performance. The simulation results show that the proposed method can analytically allocate the optimal chirp rate and improve the transmission performance.

This paper investigates open-loop Stackelberg games for a class of stochastic systems with multiple players. First, the necessary conditions for the existence of an open-loop Stackelberg strategy set are established using the stochastic maximum principle. Such conditions can be represented as solvability conditions for cross-coupled forward-backward stochastic differential equations (CFBSDEs). Second, in order to obtain the open-loop strategy set, a computational algorithm based on a four-step scheme is developed. A numerical example is then demonstrated to show the validity of the proposed method.

A comprehensive model is presented for estimating the bit error rate (BER) of write disturbance in a resistive memory composed of a cross-point array. While writing a datum into the selected address, the non-selected addresses are biased by word-line (WL) and bit-line (BL). The stored datum in the non-selected addresses will be disturbed if the bias is large enough. It is necessary for the current flowing through the non-selected address to be calculated in order to estimate the BER of the write disturbance. Since it takes a long time to calculate the current flowing in a large-scale cross-point array, several simplified circuits have been utilized to decrease the calculating time. However, these simplified circuits are available to the selected address, not to the non-selected one. In this paper, new simplified circuits are proposed for calculating the current flowing through the non-selected address. The proposed and the conventional simplified circuits are used, and on that basis the trade-off between the write disturbance and the write error is discussed. Furthermore, the error correcting code (ECC) is introduced to improve the trade-off and to provide the low-cost memory chip matching current production lines.

This work reports a novel power-rail electrostatic discharge (ESD) clamp circuit with parasitic bipolar-junction-transistor (BJT) and channel parallel shunt paths. The parallel shunt paths are formed by delivering a tiny ratio of drain voltage to the gate terminal of the clamp device in ESD events. Under such a mechanism, the proposed circuit achieves enhanced robustness over those of both gate-grounded NMOS (ggNMOS) and the referenced gate-coupled NMOS (gcNMOS). Besides, the proposed circuit also achieves improved fast power-up immunity over that of the referenced gcNMOS. All investigated designs are fabricated in a 65-nm CMOS process. Transmission-line-pulsing (TLP) and human-body-model (HBM) test results have both confirmed the performance enhancements of the proposed circuit. Finally, the validity of the achieved performance enhancements on other trigger circuits is essentially revealed in this work.