This report describes 4-2 compressors composed of Complementary Pass-Transistor Logic (CPL). We will show that circuit designs of the 4-2 compressors can be optimized for high speed and small size using only exclusive-OR's and multiplexers. According to a circuit simulation with 0.8µm CMOS device parameters, the maximum propagation delay and the average power consumption per unit adder are 1.32 ns and 11.6 pJ, respectively.

We propose a fast computation method of stochastic relaxation for the continuous-valued Markov random field (MRF) whose energy function is represented in the quadratic form. In the case of regularization in visual information processing, the probability density function of a state transition can be transformed to a Gaussian function, therefore, the probablistic state transition is realized with Gaussian random numbers whose mean value and variance are calculated based on the condition of the input data and the neighborhood. Early visual information processing can be represented with a coupled MRF model which consists of continuity and discontinuity processes. Each of the continuity or discontinuity processes represents a visual property, which is like an intensity pattern, or a discontinuity of the continuity process. Since most of the energy function for early visual information processing can be represented by the quadratic form in the continuity process, the probability density of local computation variables in the continuity process is equivalent to the Gaussian function. If we use this characteristic, it is not necessary for the discrimination function computation to calculate the summation of the probabilities corresponding to all possible states, therefore, the computation load for the state transition is drastically decreased. Furthermore, if the continuous-valued discontinuity process is introduced, the MRF model can directly represent the strength of discontinuity. Moreover, the discrimination function of this energy function in the discontinuity process, which is linear, can also be calculated without probability summation. In this paper, a fast method for calculating the state transition probability for the continuous-valued MRF on the visual informtion processing is theoretically explained. Next, initial condition dependency, computation time and dependency on the statistical estimation of the condition are investigated in comparison with conventional methods using the examples of the data restoration for a corrupted square wave and a corrupted one-dimensional slice of a natural image.

A network system is proposed for segmenting and extracting multiple moving objects in 2D images. The system uses an interconnected neural network in which grouping factors, such as edge proximity, smoothness of edge orientatio, and smoothness of velocity perpendicular to an edge, are embedded. The system groups edges so that the network energy may be minimized, i.e. edges may be organized into perceptually plausible configuration. Experimantal results are provided to indicate the performance and noise robustness of the system in extracting objects in synthetic images.

The number of nodes in a hidden layer of a feed-forward layered network reflects an optimality condition of the network in coding a function. It also affects the computation time and the ability of the network to generalize. When an arbitrary number of hidden nodes is used in designing the network, redundancy of hidden nodes often can be seen. In this paper, a method of reducing hidden nodes is proposed on the condition that a reduced network maintains the performances of the original network within an accepted level of tolerance. This method can be applied to estimate the performances of a network with fewer hidden nodes. The estimated performances indicate the lower bounds of the actual performances of the network. Experiments were performed using the Fisher's IRIS data, a set of SONAR data, and the XOR data for classification. The results suggest that sufficient number of hidden nodes, fewer than the original number, can be estimated by the proposed method.

Analysis of satellite images requires classificatio of image objects. Since different categories may have almost the same brightness or feature in high dimensional remote sensing data, many object categories overlap with each other. How to segment the object categories accurately is still an open question. It is widely recognized that the assumptions required by many classification methods (maximum likelihood estimation, etc.) are suspect for textural features based on image pixel brightness. We propose an image feature based neural network approach for the segmentation of AVHRR images. The learning algoriothm is a modified backpropagation with gain and weight decay, since feedforward networks using the backpropagation algorithm have been generally successful and enjoy wide popularity. Destructive algorithms that adapt the neural architecture during the training have been developed. The classification accuracy of 100% is reached for a validation data set. Classification result is compared with that of Kohonen's LVQ and basic backpropagation algorithm based pixel-by-pixel method. Visual investigation of the result images shows that our method can not only distinguish the categories with similar signatures very well, but also is robustic to noise.

Recent developments and case studies regarding VLSI device chip failure analysis are reviewed. The key failure analysis techniques reviewed include EMMS (emission microscopy), OBIC (optical beam induced current), LCM (liquid crystal method), EBP (electron beam probing), and FIB (focused ion beam method). Further, future possibilities in failure analysis, and some promising new tools are introduced.

A new image-based diagnostic method is proposed for use with an E-beam tester. The method features a static fault imaging technique and a navigation map for fault tracing. Static Fault imaging with a dc E-beam enables the fast acquisition of images without any additional hardware. Then, guided by the navigation map derived from CAD data, marginal timing faults can be easily pinpointed. A statistical estimation of the average count of static fault images for various LSI circuits shows that the proposed method can diagnose marginal faults by observing less than thirty faulty images and that a faulty area can be localized with up to five times fewer observations than with the guided-probe method. The proposed method was applied to a 19k-gate CMOS-logic LSI circuit and a marginal timing fault was successfully located.

Cone and Block methods that sharply reduce logic simulation time in E-beam guided-probe diagnosis are proposed. These methods are based on a primitive-cell-level tracing algorithm, which traces faulty-state cells one by one in the primitive-cell level. By executing logic simulations in these methods so that simulated responses are reported only for the small set of nodes in a tracing path and in the immediate vicinity, simulation CPU time is sharply reduced with state-of-the-art logic simulators such as the Verilog-XL. With the proposed methods, the total CPU time in a diagnostic process can be reduced to 1/700 that of a conventional method. Additionally, the total amount of simulation date also reduces to 1/40 of its original amount. These methods were applied to the guided-probe diagnosis of actual 110k-gate ASIC chips and it was verified that they could be diagnosed in under seven hours per device, which is practical. This technology will greatly contribute to shortening the turnaround time of ASIC development.

Results of a DC motor driving test with a power sent by a microwave and extracted with a rectenna array are reported. No significant difference has been observed in the output DC power from the rectenna array between a motor load and a resistive load. Mechanical output could be extracted from the received microwave power with an efficiency of 26%.

Many previous works state that a multiple Sidelobe canceller (MSLC) with two auxiliary antennas is successful in suppressing two interference signals received simultaneously by sidelobes of a main antenna. In this paper, we show that the MSLC does not always guarantee such capability in three dimensional applications where the incident direction of interference signals is defined by two angles (elevation and azimuth). We show the singularity of the autocorrelation matrix for the auxiliary channel signals induces the degradation of the capability by analyzing characteristics of MSLC's in three dimensional applications from the view point of the eigenvalue problem. To overcome this singularity, we propose a novel MSLC controlling the placement of auxiliary antennas by means of switching over three antennas arranged triangularly. Some simulations are conducted to show the effectiveness of the proposed MSLC.

Recently, the throughput performances of ARQ's have been analyzed over a Markov error channel. It has been shown that given a round-trip-delay, the throughput of the Stop-and-Wait ARQ is dependent only on the overall average packet-error probability. In this paper, we exactly analyze the Stop-and-Wait ARQ scheme under the condition that the channel is slotted and packet errors occur according to a two-state Markov chain which is characterized by the decay factor. The distribution of packet delay time and the channel usage factor are obtained. From the analytical results and numerical examples, it is shown that for a given round-trip-delay, the average packet delay time and the channel utilization factor depend on both the overall average packet-error probability and the decay factor characterizing the two-state Markov chain. Furthermore, the decay factor gives different influence on the average delay time and the channel usage factor depending on whether the round-trip-delay is even slots or not.

Persistent data structures, introduced by Sarnak and Tarjan, have been found especially useful in designing geometric algorithms. In this paper, we present a persistent form of binary-binary search tree, and then apply this data structure to solve various geometric searching problems, such as, three dimensional ray-shooting, hidden surface removal, polygonal point enclosure searching and so on. In all applications, we are able to either improve existing bounds or establish new bounds.

When intermetal oxide film which contains much water deposited on MOSFET, degradation of hot carrier characteristics is enhanced. This mechanism is considered to be as follows. During the annealing process water is desorbed from the intermetal oxide. The desorbed water reaches the MOSFET and eventually hydrogens terminate silicon dangling bonds in the gate oxide. This paper describes a new approach which uses ESR to analyze this mechanism. The ESR measurement of number of the silicon dangling bonds in undoped polysilicon lying under the intermetal oxide shows that water diffuses from intermetal oxide to MOSFET during the annealing process. The water diffusion is blocked by introduction between the polysilicon and the intermetal oxides of P-SiN layer or CVD SiO2 damaged by implantation.

Dislocation-free thin silicon layers are created on the three kinds of substrates such as oxide film, synthetic quartz glass and sapphire. They are bonded with silicon wafers using hydrogen bonding at room temperature but without any adhesive, and their bonding are changed into covalent bonding at elevated temperature. Thick (2 µm) silicon layers are first produced by surface grinding and polishing, and then thinned to 0.1 µm by plasma assisted chemical etching (PACE). A multiple repeated process of thinning the silicon layer and annealing the bonded silicon/quartz and silicon/sapphire interface is applied for tight bonding between a silicon wafer and a quartz wafer, and a silicon wafer and a sapphire wafer which have different thermal expansion coefficients. In case of bonding with sapphire, oxide with 200 in thickness plays an important role in the preventions of void formation and diffusion of interface contaminants into the silicon layer.

An automatic tracing algorithm of the transistor-level performance faults in the waveform-based approach with CAD-linked electron beam test system which utilizes a transistor-level circuit data in CAD database is proposed. Performance faults mean some performance measure such as the temporal parameters (rise time, fall time and so on) lies outside of the specified range in a VLSI. Problems on automatic fault tracing in the transistor level are modeled by using graphs. Combinational circuits which consist of MOS transistors are considered. A single fault is assumed to be in a circuit. The algorithm utilizes Depth-First Search algorithm where faulty upstream interconnections are searched as deeply as possible. Treatment of the faults on downstream interconnections and on unmeasurable interconnections is given. Application of this algorithm to the 2k-transistor block of a CMOS circuit showed its validity in the simulation.

Using Ti self-aligned silicide (salicide) process, we fabricated subquarter-micron complementary metal-oxide semiconductor (CMOS) devices, and studied the mechanism of increasing resistivity of TiSi2 on poly-Si gates from 0.075 to 20 µm long and 10 µm wide. In the gates less than 0.1 µm long, we found that agglomeration of TiSi2 takes place during low temperature annealing at 675 for 30 seconds leading to discontinuous TiSi2 lines. The discontinuity of TiSi2 abruptly increases the gate resistance, and remarkably reduces the circuit speed of CMOS ring oscillators. On the other hand, Raman spectroscopy reveals that the phase transition from high-resistivity C49 to low-resistivity C54 occurs in plane TiSi2 by annealing at 800 for 30 seconds, while it does not occur in TiSi2 gates less than 5 µm long. From these results we found that the gate sheet resistance can not be reduced to less than 5 Ω/sq by conventional Ti salicide technology in gates shorter than 0.4 µm due to increase in gate resistance caused by agglomeration and lack of phase transition.

Upper bounds on the bit error probability and repeat request probability, and lower bounds on the throughput are derived for a Hybrid-ARQ scheme that employs trellis-coded modulation on a fading dispersive channel. The receiver employs a modified Viterbi algorithm to perform joint maximum likelihood sequence estimation (MLSE) equalization and decoding. Retransmissions are generated by using the approach suggested by Yamamoto and Itoh. The analytical bounds are extended to trellis-coded modulation on fading dispersive channels with code combining. Comparison of the analytical bounds with simulation results shows that the analytical bounds are quite loose when diversity reception is not employed. However, no other analytical bounds exist in the literature for the trellis-coded Hybrid ARQ system studied in this paper. Therefore, the results presented in this paper can provide the basis for comparison with more sophisticated analytical bounds that may be derived in the future.

As a generalization of the concept of pseudo-biorthogonal bases (PBOB), we already presented in Ref. [3] the theory of the so-called extended pseudo-biorthogonal bases (EPBOB). We introduce in this paper two special types of EPBOB called EPBOB's of type O and of type L. This paper discusses characterizations, construction methods, inherent properties, and mutual relations of these types of EPBOB.

The main problem in statistical pattern recognition is to design a classifier. Many researchers point out that a finite number of training samples causes the practical difficulties and constraints in designing a classifier. However, very little is known about the performance of a classifier in small training sample size situations. In this paper, we compare the classification performance of the well-known classifiers (k-NN, Parzen, Fisher's linear, Quadratic, Modified quadratic, Euclidean distance classifiers) when the number of training samples is small.

A new evaluation technique of hot carrier degradation is proposed and applied to practical evaluation of p-channel polycrystalline silicon thin film transistors (TFT). The proposed technique introduces emission microscopy which is particularly effective for evaluating TFT devices. We have developed an automatic measurement system in which measurement of the electrical characteristics and monitoring the photo emission are done simultaneously. Using this system, we have identified the dominant mechanism of hot carrier degradation in TFTs, and evaluated the effect of plasma hydrogenation on hot carrier degradation.