The search functionality is under construction.
The search functionality is under construction.

Keyword Search Result

[Keyword] TE(21534hit)

19781-19800hit(21534hit)

  • Design of the Basic Cell and Metallized RAM for 0.5 µm CMOS Gate Array

    Yoji NISHIO  Hideo HARA  Masahiro IWAMURA  Yasuo KAMINAGA  Katsunori KOIKE  Kosaku HIROSE  Takayuki NOTO  Satoshi OGUCHI  Yoshihiko YAMAMOTO  Takeshi ONO  

     
    PAPER-Integrated Electronics

      Vol:
    E78-C No:9
      Page(s):
    1255-1262

    A 0.5 µm CMOS embedded function type gate array family with high speed modules was developed. This family has: an effective basic cell; high speed, compiled type metallized and diffused RAMs; PLL (Phase Locked Loop); and GTL (Gunning Transceiver Logic) to realize operation of over 100 MHz at 3.3 V. This paper describes the basic cell architecture and the compiled type metallized RAM. A divided MOS transistor type basic cell is effective for metallized modules such as metallized RAM and internal logic circuits. The appropriate basic cell size (height) can be decided from the viewpoints of the relationship between the number of usable basic cells and the basic cell height, and the logic circuit speed. Propagation delay time of the 2-input NAND is 200 ps at a standard load of fan out=2 and metal length=1.4 mm. For the universal ASIC, the compiled RAM is indispensable. Single port and multi-port metallized RAMs which are structured by using the basic cells are discussed. The new single port memory cell circuit which has a differential write and single end read operating method is introduced. This memory cell circuit can be realized using one basic cell. The diffused layer region of the NMOS transfer gates for the read operation is shared between neighbor memory cells. So, the capacitance of the bit line becomes smaller, and a high speed access time can be achieved. The measured access time of 1 kbits is 4.2 ns. The new multi-port memory cell circuits which have a single end write and single end read operating method are introduced. The read operating method is the same as that of the single port memory cell circuit. The access time shows very high speed operation comparable to that of the single port memory. This 3F (Flexible, Fast, and Friendly) ASIC family can be applied to high speed processors in workstations and graphics equipment.

  • Multisegment Multiple VQ Codebooks-Based Speaker Independent Isolated-Word Recognition Using Unbiased Mel Cepstrum

    Liang ZHOU  Satoshi IMAI  

     
    PAPER-Speech Processing and Acoustics

      Vol:
    E78-D No:9
      Page(s):
    1178-1187

    In this paper, we propose a new approach to speaker independent isolated-word speech recognition using multisegment multiple vector quantization (VQ) codebooks. In this approach, words are recognized by means of multisegment multiple VQ codebooks, a separate multisegment multiple VQ codebooks are designed for each word in the recognition vocabulary by dividing equally the word into multiple segments which is correlative with number of syllables or phonemes of the word, and designing two individual VQ codebooks consisting of both instantaneous and transitional speech features for each segment. Using this approach, the influence of the within-word coarticulation can be minimized, the time-sequence information of speech can be used, and the word length differences in the vocabulary or speaking rates variations can be adapted automatically. Moreover, the mel-cepstral coefficients based on unbiased estimation of log spectrum (UELS) are used, and comparison experiment with LPC derived mel cepstral coefficients is made. Recognition experiments Using testing databases consisting of 100 Japanese words (Waseda database) and 216 phonetically balanced words (ATR database), confirmed the effectiveness of the new method and the new speech features. The approach is described, computational complexity as well as memory requirements are analyzed, the experimental results are presented.

  • Effects of Hard-Limiter and Error Correction Coding on Performance of Direct-Detection Optical CDMA Systems with PPM Signaling

    Tomoaki OHTSUKI  Iwao SASASE  Shinsaku MORI  

     
    PAPER

      Vol:
    E78-A No:9
      Page(s):
    1092-1101

    The effect of an optical hard-limiter on the performance of direct-detection optical synchronous code-division multiple-access (CDMA) systems with M-ary pulse position modulation (PPM) signaling is analyzed. Moreover, the effect of the error correction coding on the performance of direct-detection optical synchronous CDMA systems with PPM signaling is analyzed: Reed-Solomon (RS) codes and convolutional codes (CC's) with soft-decision Viterbi decoding are employed. We analyze the performance under the assumption of Poisson shot noise model for the receiver photodetector and the noise due to the detector dark currents is considered. We analyze the performance under average power and bit rate constraints. Our results show that the optical hard-limiter is not effective for improving the performance of the optical CDMA systems with PPM signaling. Moreover, RS codes are shown to be more effective than CC's with soft-decision Viterbi decoding to reduce an asymptotic floor to the error probability of the system with large M, while CC's with soft-decision Viterbi decoding is more effective than RS codes for the system with small M. Furthermore, we show that as the code rate of the error correction code increases, the required average energy to achieve the bit error probability Pb105 for the RS coded PPM/CDMA system appreciably increases compared with that for the convolutional coded PPM/CDMA system when M16.

  • A Constructing Method of Functional Model by Integrated Learning from Examples of Software Modification

    Hiroyuki YAMADA  Tetsuo KOBASHI  Tsunehiro AIBARA  

     
    PAPER-Models

      Vol:
    E78-D No:9
      Page(s):
    1133-1141

    One approach to develop software efficiently is to reuse existing software by modifying a part of it. However, modifying software will often introduce unexpected side effects into other parts of it. As a result, it costs much time and care to modify the software. So, in order to modify software efficiently, we have proposed a functional model to represent information about side effects caused by modification and a model based supporting system for modifying software. So far, however, an expert software developer must describe the entire functional model of the target software through the analysis of practical modifying processes. This will be an unnecessary burden on him. Moreover, the larger target software becomes, the harder the model construction becomes. Therefore, an automatic constructing method of the functional model is needed in order to solve this problem. So, this paper considers a method of acquiring useful interaction information by learning from training examples of modification. However, in our application domain, it seems that it is impossible to make complete domain theory and to prepare a large number or training examples in advance. Therefore, our learning method involves an integration of explanation-based learning (EBL) from positive examples of modification generated by the user and Similarity-based learning (SBL) from positive or negative examples generated by the user and the learning system. As a result, our method can acquire valid knowledge about the interaction from not so many examples under incomplete theory. Then, this paper presents a constructing method, in which our proposed learning method is incorporated, of a functional model. Finally, this paper demonstrates construction of the functional model in the domain of an event-driven queueing simulation program according to our learning method.

  • A Computer Supported System of Meetings Using a Model of Inter-Personal Communication

    Tomofumi UETAKE  Morio NAGATA  

     
    PAPER-Models

      Vol:
    E78-D No:9
      Page(s):
    1127-1132

    Information systems to support cooperative work among people should be first designed to help humam communication. However, there are few systems based on the analysis of human communication. Standing on this situation, we propose a meeting support system for the participants' understandings by indicating the suitable information about the topic of the scene". Our system provides only useful information by monitoring each statement without complex methods. To show something useful multi-media information for members, we propose the following structure of the meeting on the basis of the analysis of communication. Each statement is classified into two levels, either; a statement about the progress" of the meeting (context-level utterances) or, a statement about objects" (content-level utterances). Further, content-level utterances are classified into two types, position utterances and argument utterances. Using this classification of statements, the proceeding of the meeting is represented as the tree model which is called a context-tree". If the structure of meetings is fixed, it is possible to select only useful information from all shared information for members by analyzing each content-level utterance. The system introduced in this paper shows appropriate multi-media information about the topic of the scene" by using the above model. We have implemented a prototype system based on the above ideas. Moreover, we have mode some experiments to show the effectiveness of this system. Those results show that our method is effective to improve the productivity" of meetings.

  • A Software Project Management System Using an Object Oriented Database--Integration of Process Management System and Quality Management System--

    Seiichi KOMIYA  Atsuo HAZEYAMA  

     
    PAPER-Support Systems

      Vol:
    E78-D No:9
      Page(s):
    1142-1149

    There are three viewpoints involved in software project management: process management, quality management and cost management. Software projects must be managed on the basis of these three viewpoints. However, in many cases process management, quality management and cost management systems are built separately as individual systems respectively. Construction of software project management systems which these three functions are integrated has been rare. Therefore, in order to construct a system integrating these functions, the authors clarify the significance of integration of application systems. And then the authors unveil the structure of a software project management system that process management system, quality management system and cost management system are integrated by using an object oriented database.

  • Linear Time Algorithms for Fault Tolerant Routing in Hypercubes and Star Graphs

    Qian-Ping GU  Shietung PENG  

     
    PAPER-Fault Tolerant Computing

      Vol:
    E78-D No:9
      Page(s):
    1171-1177

    In this paper, we study the following node-to-node fault tolerant routing problem: In the presence of up to n-1 faulty nodes, find a fault-free path which connects any two non-faulty nodes s and t in an n-connected graph. For node-to-node fault tolerant routing in n-dimensional hypercubes Hn, we give an algorithm which finds a fault-free path s t of length at most in O(n) time, where d(s, t) is the distance between s and t. We also show that a fault-free path s t in Hn of length at most d(s, t)2i, 1i, can be found in time. For node-to-node fault tolerant routing in n-dimensional star graphs Gn, we give an algorithm which finds a fault-free path s t of length at most min{d(Gn)3, d(s, t)6} in O(n) time, where is the diameter of Gn. It is previously known that, in Hn, a fault-free path s t of length at most d(s, t) for d(s, t)n and at most d(s, t)2 for d(s, t)n can be found in O(d(s, t)n) time, and in Gn, a fault-free path s t of length at most min{d(Gn)1, d(s, t)4}can be found in O(d(s, t)n) time. When the time efficiency of finding the routing path is more important than the length of the path, the algorithms in this paper are better than the previous ones.

  • Performance of Bit-Interleaved Trellis Coded 16-QAM with Maximized Code Diversity

    Akio AOYAMA  Hitoshi NAKAGAWA  Takaya YAMAZATO  Masaaki KATAYAMA  Akira OGAWA  

     
    LETTER

      Vol:
    E78-A No:9
      Page(s):
    1215-1219

    In this work, we present an 8-state trellis code for bit interleaved 16-QAM and the BER performance on Rayleigh fading channel is evaluated. We analyze the BER and show that the effective code length and minimum productive distance are also important criterion for code design on bit interleaved system. We design the code by considering not only minimum Hamming distance but also the effective code length and minimum productive distance. As a result, we found that the scheme employing the code achieves good BER performance on Rayleigh fading channel even with the finite interleaving size.

  • Concepts and Methodologies for Knowledge-Based Program Understanding--The ALPUS's Approach--

    Haruki UENO  

     
    PAPER-Methodologies

      Vol:
    E78-D No:9
      Page(s):
    1108-1117

    The background concepts and methodologies of the knowledge-based program understander ALPUS is discussed. ALPUS understands user's buggy Pascal programs using four kinds of programming knowledge: the knowledge on algorithms, programming techniques, the Pascal language, and logical bugs. The knowledge on algorithms, the key knowledge, is represented in a form of hierarchical data structure called Hierarchical Procedure Graph (HPG). In HPG each node represents a chunk of operations called process," which is consisted of sub-processes. The other knowledge is maintained as independent knowledge bases and linked to associated processes of the HPG. The knowledge about bugs acquired by cognitive experiment is grouped into three categories: bugs on algorithms, programming techniques, and the Pascal language, and connected to associated elements of programming knowledge respectively. ALPUS tries to understand user's buggy programs, detects logical bugs, infers user's intentions, and gives advices for fixing bugs. Program understanding is achieved by three steps: normalization, variable identification, and process and technique identification. Normalization results in improving flexibility of understanding. Variable, process and technique identifications are achieved by knowledge-based pattern matching. Intentions are inferred by means of information attached to buggy patterns. The result of comprehension is reported to a user (i.e., student). Experimental results using Quicksort programs written by students show that the HPG formalism is quite powerful in understanding algorithm-oriented programs. The ALPUS's way of program comprehension is useful in the situation of programming education in an intermediate class of an engineering school. The ALPUS system is a subsystem of the intelligent programming environment INTELLITUTOR for learning programming, which was implemented in the frame-based knowledge engineering environment ZERO on a UNIX workstation.

  • Millimeter-Wave Monolithic AlGaAs/InGaAs/GaAs Pseudomorphic HEMT Low Noise Amplifier Modules for Advanced Microwave Scanning Radiometer

    Kazuhiko NAKAHARA  Yasushi ITOH  Yoshie HORIIE  Takeshi SAKURA  Naohito YOSHIDA  Takayuki KATOH  Tadashi TAKAGI  Yasuo MITSUI  Yasuyuki ITO  

     
    PAPER

      Vol:
    E78-C No:9
      Page(s):
    1210-1215

    Millimeter-wave monolithic low noise amplifier modules using 0.15 µm AlGaAs/InGaAs/GaAs pseudomorphic HEMTs have been developed at V- and W-bands for the Advanced Microwave Scanning Radiometer. To achieve low noise and high gain of V-band single-stage and W-band two-stage monolithic amplifiers, a reactive matching method is employed in the design of input noise matching and output gain matching circuits based on the results of on-carrier S-parameter measurements up to 50 GHz and noise parameter measurements at 60 and 90 GHz. A V-band four-stage monolithic amplifier module has been mounted on a hermetically-sealed package with microstrip interface and has achieved a noise figure of 3 dB with a gain of 42.2 dB at 51 GHz. A W-band six-stage amplifier module has been mounted on a hermetically-sealed package with waveguide interface and has achieved a noise figure of 4.3 dB with a gain of 28.1 dB at 91 GHz. These results represent the best noise figure performance ever achieved by multi-stage monolithic low-noise amplifier modules.

  • Image Decomposition by Answer-in-Weights Neural Network

    Iren VALOVA  Keisuke KAMEYAMA  Yukio KOSUGI  

     
    LETTER-Image Processing, Computer Graphics and Pattern Recognition

      Vol:
    E78-D No:9
      Page(s):
    1221-1224

    We propose an algorithm for image decomposition based on Hadamard functions, realized by answer-in-weights neural network, which has simple architecture and is explored with steepest decent method. This scheme saves memory consumption and it converges fast. Simulations with least mean square (LMS) and absolute mean (AM) errors on a 128128 image converge within 30 training epochs.

  • Optical Path Accommodation Design Enabling Cross-Connect System Scale Evaluation

    Naohide NAGATSU  Ken-ichi SATO  

     
    LETTER-Optical Communication

      Vol:
    E78-B No:9
      Page(s):
    1339-1343

    This paper proposes novel optical path accommodation design algorithms for networks wherein the number of wavelengths multiplexed into a fiber is restricted. This algorithm optimizes both optical path route and wavelength assignment in VWP/WP networks. It minimizes optical path cross-connect (OPXC) system scale in terms of incoming/outgoing fiber port numbers. A comparison in terms of required OPXC system scale between the WP and VWP schemes is demonstrated for the first time.

  • Evaluation of Fixed Charge and Interface Trap Densities in SIMOX Wafers and Their Effects on Device Characteristics

    Shoichi MASUI  Tatsuo NAKAJIMA  Keisuke KAWAMURA  Takayuki YANO  Isao HAMAGUCHI  Masaharu TACHIMORI  

     
    PAPER-Integrated Electronics

      Vol:
    E78-C No:9
      Page(s):
    1263-1272

    The buried oxide nonintegrities, represented as the equivalent fixed oxide charge and interface trap densities at both the upper and lower interface of buried oxide, are evaluated for low-dose and high-dose SIMOX wafers, and their effects on device characteristics are investigated. The equivalent fixied oxide charge and trap densities at the lower interface, which are measured with buried oxide capacitors, are negligibly small in as-fabricated SIMOX wafers. This result enables us to make an analytical model of the parasitic drain/source-to-substrate capacitance in an SOI MOSFET, in which the effect of the depletion layer under the buried oxide is considered. The influence of thinner buried oxide and process-induced fixed oxide charge on the parasitic capacitance is explored with this model. The equivalent fixed oxide charge and trap densities at the upper interface are evaluated by the threshold voltage measurement in an SOI NMOSFET. The principle of this evaluation as well as the experimental technique are described in detail. The oxide charge and trap densities at the upper interface are higher than those at the lower interface for both SIMOX wafers. With a new model of the subthreshold slope based on a two-dimensional potential analysis the influence of the trap at the upper interface is discussed.

  • GaInAsP/InP Square Buried-Heterostructure Surface-Emitting Lasers Regrown by MOCVD

    Seiji UCHIYAMA  Susumu KASHIWA  

     
    LETTER-Opto-Electronics

      Vol:
    E78-C No:9
      Page(s):
    1311-1314

    Mesa structures have been investigated to optimize a buried-heterostructure (BH) for a GaInAsP/InP surface-emitting (SE) laser regrown by metalorganic chemical vapor deposition (MOCVD), and it has been found that a square mesa top pattern of which the sides are at an angle of 45 to the 011 orientation is suitable. A 1.3-µm GaInAsP/InP square buried heterostructure (SBH) SE laser with this mesa structure has been demonstrated and low-threshold CW oscillation (threshold current Ith=0.45 mA) at 77 K and low-threshold room-temperature pulsed oscillation (Ith=12 mA) have been obtained.

  • Enhanced Feeding Structure of Microstrip Antenna

    Sanghoon CHOI  Sangwook NAM  

     
    PAPER

      Vol:
    E78-C No:8
      Page(s):
    984-987

    In this paper, a waveguide-fed slot-coupled microstrip antenna is proposed as enhanced feeding structure of microstrip antenna and an analysis is pesented. The presence of dielectric substrate between a strip and a slot is explicitly taken into account in this analysis. The evaluation of the antenna characteristics is carried out using the method of moments and the spectral domain approach in terms of the electric current distribution on the strip and the magnetic current distribution on the slot.

  • Extraction of a Person's Handshape for Application in a Human Interface

    Alberto TOMITA,Jr.  Rokuya ISHII  

     
    PAPER

      Vol:
    E78-A No:8
      Page(s):
    951-956

    This paper proposes a human interface where a novel input method is used to substitute conventional input devices. It overcomes the deficiencies of physical devices, as it is based on image processing techniques. The proposed interface is composed of three parts: extraction of a person's handshape from a digitized image, detection of its fingertip, and interpretation by a software application. First, images of a pointing hand are digitized to obtain a sequence of monochrome frames. In each frame the hand is isolated from the background by means of gray-level slicing; with threshold values calculated dynamically by the combination of movement detection and histogram analysis. The advantage of this approach is that the system adapts itself to any user and compensates any changes in the illumination, while in conventional methods the threshold values are previously defined or markers have to be attached to the hand in order to give reference points. Second, once the hand is isolated, fingertip coordinates are extracted by scanning the image. Third, the coordinates are inputted to an application interface. Overall, as the algorithms are simple and only monochrome images are used, the amount of processing is kept low, making this system suitable to real-time processing without needing expensive hardware.

  • A Slot Coupled Microstrip Antenna with a Multi-Layer Thick Ground Plane

    Kazunori TAKEUCHI  Isamu CHIBA  Yoshio KARASAWA  

     
    PAPER

      Vol:
    E78-C No:8
      Page(s):
    988-994

    A novel thick ground plane is proposed as a support for a slot-coupled microstrip antenna and as a heat sink for an MMIC installed on the back plane of the active array antenna. A multi-layer structure of ground planes is also studied for the benefit of easy installation of MMICs. The influence of this thick metal ground plane with a mono- and multi-layer has been investigated in detail. Both measured and calculated results of VSWR and calculated results of the back lobe are shown in detail. The calculated results of VSWR agree well with the measurements. It is made clear that the thickness of the ground plane can be extended to twenty times that of the antenna substrate while maintaining the antenna's performance. An LNA composing an MMIC was developed, attached to the back of the antenna, and operated at 23 GHz. The measured results of this active element agree well with calculated ones and confirm the applicability of the novel design.

  • Highly Efficient 1.5-GHz Band Si Power MOS Amplifier Module

    Isao YOSHIDA  Mineo KATSUEDA  

     
    PAPER

      Vol:
    E78-C No:8
      Page(s):
    979-983

    A 1.5 GHz band Si power MOS amplifier module with 50% total efficiency, 1 W output power and 30 dB power gain has been developed for front-end transmitter of digital cellular telephones. A combination of a highly efficient power MOSFET for the output stage and an integrated two stage MOS amplifier for the driver with an impedance matching circuit minimizing the length of striplines made it possible to achieve high total efficiency, high power gain, and smaller size of the amplifier module.

  • Using Process Algebras for the Semantic Analysis of Data Flow Networks

    Cinzia BERNARDESCHI  Andrea BONDAVALLI  Luca SIMONCINI  

     
    PAPER-Computer Systems

      Vol:
    E78-D No:8
      Page(s):
    959-968

    Data flow is a paradigm for concurrent computations in which a collection of parallel processes communicate asynchronously. For nondeterministic data flow networks many semantic models have been defined, however, it is complex to reason about the semantics of a network. In this paper, we introduce a transformation between data flow networks and the LOTOS specification language to make available theories and tools developed for process algebras for the semantic analysis based on traces of the networks. The transformation does not establish a one-to-one mapping between the traces of a data flow network and the LOTOS specification, but maps each network in a specification which usually contains more traces. The obtained system specification has the same set of traces as the corresponding network if they are finite, otherwise also non fair traces are included. Formal analysis and verification methods can still be applied to prove properties of the original data flow network, allowing in case of networks with finite traces to prove also network equivalence.

  • High Speed Datagram Delivery over Internet Using ATM Technology

    Hiroshi ESAKI  Masataka OHTA  Ken-ichi NAGAMI  

     
    PAPER-Communication Networks and Service

      Vol:
    E78-B No:8
      Page(s):
    1208-1218

    This paper proposes a high throughput small latent IP packet delivery architecture using ATM technology in a large scaled internet. Data-link network segments, including ATM network segments, are interconnected through routers. A connection oriented IP packet delivery will be provided by IP (including both IPv4 and IPv6) with a certain resource reservation protocol (e.g. RSVP). When the router attached to ATM network segment has a mapping function between the flow-ID (e.g. in the SIPP header) and the VPI/VCI value, the small latent connection oriented IP forwarding can be provided. Also, when the router has cell-relaying functionality, the small latent connectionless IP forwarding can be provided, even in IPv4. The source router, where the source end-station belongs to, will be able to transfer the connectionless IP packet to the destination router, where the destination end-station belongs to, through the concatenated ATM connections (ATM-VCCs) without any ATM-VCC termination point. When all of the network segments are ATM-LAN, the proposed architecture can accommodate about up to 222 (4106) end-stations with two network layer processing points. And when the network is scaled up hierarchally, we can accommodate larger number of end-stations. For example, we can accommodate 1015 end-stations by a three layered network. Then the maximum number of actual network layer processing points between source and destination end-stations can be ten. Here, 1015 is the maximum number of end-stations in ISDN and also it is the target number of accommodated end-stations for IPv6.

19781-19800hit(21534hit)