In the current study, stress-induced capacitance determined by direct measurement on MOSFETs was compared with that determined by indirect simulation through the delay of CMOS ring oscillators (ROs) fabricated side by side with MOSFETs. External compressive stresses were applied on <110> silicon-on-insulator (SOI) n-/p-MOSFETs with the ROs in a longitudinal configuration. The measured gate capacitance decreased as the compressive stress on SOI increased, which agrees with the result of the capacitance difference between measured and simulated delay of the ROs. The oscillation frequency shift of the ROs should mainly be attributed to oxide capacitance, aside from the change in mobility of the n-/p-MOSFETs. The result suggests that the stress-induced gate capacitance of partially depleted MOSFETs is an important factor for the capacitance shift in a circuit and that ROs can be used in a vehicle to determine mechanical stress-induced gate capacitance in MOSFETs.

A method of generating scenarios using differential scenaro information is presented. Behaviors of normal scenarios of similar purpose are quite similar each other, while actors and data in scenarios are different among these scenarios. We derive the differential information between them and apply the differential information to generate new alternative/exceptional scenarios. Our method will be illustrated with examples. This paper describes (1) a language for describing scenarios based on a simple case grammar of actions, (2) introduction of the differential scenario, and (3) method and examples of scenario generation using the differential scenario.

An important and widely considered signal identification technique for cognitive radios is cyclostationarity-based feature detection because this method does not require time and frequency synchronization and prior information except for information concerning cyclic autocorrelation features of target signals. This paper presents the development and experimental evaluation of cyclostationarity-based signal identification equipment. A spatial channel emulator is used in conjunction with the equipment that provides an environment to evaluate realistic spectrum sharing scenarios. The results reveal the effectiveness of the cyclostationarity-based signal identification methodology in realistic spectrum sharing scenarios, especially in terms of the capability to identify weak signals.

In this paper, a theoretical analysis of current-controlled (CC-) MOS current mode logic (MCML) is reported. Furthermore, the circuit performance of the CC-MCML with the auto-detection of threshold voltage (Vth) fluctuation is evaluated. The proposed CC-MCML with the auto-detection of Vth fluctuation automatically suppresses the degradation of circuit performance induced by the Vth fluctuations of the transistors automatically, by detecting these fluctuations. When a Vth fluctuation of ± 0.1 V occurs on the circuit, the cutoff frequency of the circuit is increased from 0 Hz to 3.5 GHz by using the proposed CC-MCML with the auto-detection of Vth fluctuation.

In this paper, we propose a joint diversity algorithm for error-rate minimization in multi-user spatial multiplexing (SM) systems with block diagonalization (BD)-precoding. The proposed algorithm adapts or selects the user set, transmit antenna subset, and the number of streams by an exhaustive search over the available resources. The proposed algorithm makes use of the multi-user diversity (MUD) and the spatial diversity gains as well as the array gain through selecting the best set. Exhaustive search, however, imposes a heavy burden in terms of computational complexity which exponentially increases with the size of the total number of users, streams, and transmit antennas. For complexity reduction, we propose two suboptimal algorithms which reduce the search space by first selecting the best user or by both selecting the best user and fixing the number of streams. Simulation results show that the proposed algorithms improve error probability over the conventional algorithm due to their diversity improvement and the signal-to-noise ratio (SNR) gains over the conventional algorithm. We also show that the suboptimal algorithms significantly reduce the computational complexity over exhaustive search with low-SNR loss.

This paper demonstrates a FinFET operational amplifier (opamp), which is suitable to be integrated with digital circuits in a scaled low-standby-power (LSTP) technology and operates at extremely low voltage. The opamp is consisting of an adaptive threshold-voltage (Vt) differential pair and a low-voltage source follower using independent-double-gate- (IDG-) FinFETs. These two components enable the opamp to extend the common-mode voltage range (CMR) below the nominal Vt even if the supply voltage is less than 1.0 V. The opamp was implemented by our FinFET technology co-integrating common-DG- (CDG-) and IDG-FinFETs. More than 40-dB DC gain and 1-MHz gain-bandwidth product in the 500-mV-wide input CMR at the supply voltage of 0.7 V was estimated with SPICE simulation. The fabricated chip successfully demonstrated the 0.7-V operation with the 480-mV-wide CMR, even though the nominal Vt was 400 mV.

When a cognitive radio system dynamically utilizes a frequency band, channel control information must be communicated over the network in order for the currently available carrier frequencies to be shared. In order to keep efficient spectrum utilization, this control information should also be dynamically transmitted through channels such as cognitive pilot channels based on the channel conditions. If transmitters dynamically select carrier frequencies, receivers must receive the control signal without knowledge of its carrier frequencies. A novel scheme called differential code parallel transmission (DCPT) enables receivers to receive low-rate information without any knowledge of the carrier frequency. The transmitter simultaneously transmits two signals whose carrier frequencies are separated by a predefined value. The absolute values of the carrier frequencies can be varied. When the receiver receives the DCPT signal, it multiplies the signal by a frequency-shifted version of itself; this yields a DC component that represents the data signal, which is then demodulated. However, the multiplication process results in the noise power being squared, necessitating high received signal power. In this paper, to realize a bandpass filter that passes only DCPT signals of unknown frequency and that suppresses noise and interference at other frequencies, a DCPT-adaptive bandpass filter (ABF) that employs an adaptive equalizer is proposed. In the training phase, the received signal is the filter input and the frequency-shifted signal is the training input. Then, the filter is trained to pass the higher-frequency signal of the two DCPT signals. The performance of DCPT-ABF is evaluated through computer simulations. We find that DCPT-ABF operates successfully even under strong interference.

The double threshold detecting strategy is widely used for spatially distributed target detection in practical systems. However, the detector is limited in terms of robustness and effectiveness. In this paper, an improved double threshold detector is proposed that avoids these shortcomings. In the proposed detector, the energy in range cells that exceed the first threshold is accumulated and then the output of the accumulator is compared with the second threshold for detection. The threshold selection strategy is derived to guarantee the constant false-alarm rate (CFAR) property. A simulation shows that the proposed detector is superior to the conventional approach in terms of both robustness and effectiveness.

This letter investigates the problem of distributed channel selection in cognitive radio ad hoc networks (CRAHNs) with heterogeneous spectrum opportunities. Firstly, we formulate this problem as a local congestion game, which is proved to be an exact potential game. Then, we propose a spatial best response dynamic (SBRD) to rapidly achieve Nash equilibrium via local information exchange. Moreover, the potential function of the game reflects the network collision level and can be used to achieve higher throughput.

Modern FPGAs (Field Programmable Gate Arrays), such as Xilinx Virtex-4, have the capability of changing their contents dynamically and partially, allowing implementation of such concepts as a HW (hardware) task. Similarly to its software counterpart, the HW task shares time-multiplexed resources with other HW tasks. To support preemptive multitasking in such systems, additional context saving and restoring mechanisms must be built practically from scratch. This paper presents an efficient method for hardware task preemption which is suitable for tasks containing both Flip-Flops and memory elements. Our solution consists of an offline tool for analyzing and manipulating bitstreams, used at the design time, as well as an embedded system framework. The framework contains a DMA-based (Direct Memory Access), instruction-driven reconfiguration/readback controller and a developed lightweight bus facilitating management of HW tasks. The whole system has been implemented on top of the Xilinx Virtex-4 FPGA and showed promising results for a variety of HW tasks.

The charge-redistribution low-swing differential logic (CLDL) circuits are presented in this work. It can implement a complex function in a single gate. The CLDL circuits utilizes the charge-redistribution and reduced-swing schemes to reduce the power dissipation and enhance the operation speed. In addition, a pipeline structure is formed by a series connection structure controlled by a true-single-phase clock, thereby achieving high-speed operation. The CLDL circuits perform more than 25% speedup and 31% in power-delay product compared to other differential circuits with true-single-phase clock. A pipelined multiplier-accumulator (MAC) using CLDL structure is fabricated in 0.35 µm single-poly four-metal CMOS process. The test chip is successfully verified to operate at 900-MHz.

Phase structure of nonlinear dynamical system is governed by the vector field and decides the trajectories. Accordingly, the power spectra of trajectories include the structural field effect on the phase space. In this paper, we develop a method for analyzing phase structure using power spectra of trajectories and reconstitute a potential function in the system.

Partially parallel decoding architectures are widely used in the design of low-density parity-check (LDPC) decoders, especially for quasi-cyclic (QC) LDPC codes. To comply with the code structure of parity-check matrices of QC-LDPC codes, many small memory blocks are conventionally employed in this architecture. The total memory area usually dominates the area requirement of LDPC decoders. This paper proposes a low-complexity memory access architecture that merges small memory blocks into memory groups to relax the effect of peripherals in small memory blocks. A simple but efficient algorithm is also presented to handle the additional delay elements introduced in the memory merging method. Experiment results on a rate-1/2 parity-check matrix defined in the IEEE 802.16e standard show that the LDPC decoder designed using the proposed memory access architecture has the lowest area complexity among related studies. Compared to a design with the same specifications, the decoder implemented using the proposed architecture requires 33% fewer gates and is more power-efficient. The proposed new memory access architecture is thus suitable for the design of low-complexity LDPC decoders.

We demonstrate phase demodulation of 10-Gbps DPSK signals using a silicon micro-ring resonator with a radius of 10 µm and with various coupling gaps for light of ∼1550 nm in wavelength. Influence of the Q factors and transmissions of the resonators on the response speed and power balance of the two output ports is discussed. Furthermore, temperature sensitivity on resonance peak was measured and we discuss its effect on practical demodulation application.

In this letter, we propose a distributed switch-and-stay combining network with partial relay selection and show that the system spectral efficiency can be improved via adaptive modulation. Analytical expressions for the achievable spectral efficiency and average bit error rate of the proposed system over Rayleigh fading channels are derived for an arbitrary switching threshold. Numerical results are gathered to substantiate the analytical derivation showing that in terms of spectral efficiency, the system with single relay outperforms that with more than one relay at high signal-to-noise ratios (SNRs) and the optimal switching threshold can significantly improve the system performance at medium SNRs.

In next-generation networks, ultra-high speed transfer capability will become necessary to support a variety of advanced multimedia services. The Optical Wavelength Division Multiplexing (WDM) network is seen as one of promising networks. To deal with various multimedia services, the network should support not only unicast transmission but also multicast transmission. However, IP multicast has several problems, for example, all routers must have multicast functions. IP multicast needs routers with high overheads and excessive energy consumption. Hence, optical multicasting in optical WDM networks is a promising solution for future internet services. A tree-shared multicasting concept has been proposed to support multicast transmissions in optical WDM networks. This method assembles multiple multicast traffic streams into one burst and the burst is delivered using a shared-tree. However, this method can not be applied to dynamic multicasting. This paper proposes a novel WDM multicast design method for dynamic traffic demand using multiple shared-trees, which includes shared-tree generation/selection and wavelength assignment, for the purpose of simplifying the routing process and receiving multicast traffic efficiently. We evaluate its performance from the viewpoints of the burst loss probability and the number of redundant and useless transfers whose data is discarded at the egress edge nodes.

The Kobayashi potential in electromagnetic theory is reviewed. As an illustration we consider two problems, diffraction of plane wave by disk and rectangular plate of perfect conductor. Some numerical results are compared with approximated and experimental results when they are available to verify the validity of the present method. We think the present method can be used as reference solutions of the related problems.

This paper proposes a differential fault analysis on the stream cipher MUGI, which uses two kinds of update functions of an intermediate state. MUGI was proposed by Hitachi, Ltd. in 2002 and is specified as ISO/IEC 18033-4 for keystream generation. Differential fault analysis (DFA) is a type of fault analysis, which is considered to be a serious threat against secure devices such as smart cards. DFA on MUGI was first proposed at ICISC 2010 [25]; however, the attack condition for the successful attack such as the position into which the fault is injected was restricted. In this paper, we extend the attack methods which are more practical, based on a one-byte and a multi-byte fault models using the relationship between two kinds of update functions that are mutually dependent. In the proposed attack, the attacker can know the position affected by the fault injection even if he has no control of the timing of the fault injection. As a result, a 128-bit secret key can be recovered using 13 pairs of correct and faulty outputs on average.

This paper analyzes security of sequential multiple encryptions based on asymmetric key encryptions, and shows that a sequential construction of secure multiple encryptions exists. The sequential multiple encryption scheme can be proved to be indistinguishable against chosen ciphertext attacks for multiple encryptions (IND-ME-CCA), where the adversary can access to the decryption oracle of the multiple encryption, even when all the underlying encryptions of the multiple encryption are indistinguishable against chosen plaintext attacks (IND-CPA). We provide an extended security notion of sequential multiple encryptions, in which the adversary is allowed to access decryption oracles of the underlying encryptions in addition to the multiple encryption, and show that our constructed scheme satisfies the security notion when all the underlying encryptions are indistinguishable against chosen ciphertext attacks (IND-CCA).

In this paper, the substitutability of the indifferentiability framework with non-sequential scheduling is examined by reformulating the framework through applying the Task-PIOA framework, which provides non-sequential activation with oblivious task sequences. First, the indifferentiability framework with non-sequential scheduling is shown to be able to retain the substitutability. Thus, the substitutability can be applied in another situation that processes of the systems may behave non-sequentially. Next, this framework is shown to be closely related to reducibility of systems. Reducibility is useful to discuss about the construction of a system from a weaker system. Finally, two modelings with respectively sequential scheduling and non-sequential scheduling are shown to be mutually independent. We find examples of systems which are indifferentiable under one model but differentiable under the other. Thus, the importance of scheduling in the indifferentiability framework is clarified.