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21281-21300hit(22683hit)

  • A Taxonomy of Mixed Reality Visual Displays

    Paul MILGRAM  Fumio KISHINO  

     
    INVITED PAPER

      Vol:
    E77-D No:12
      Page(s):
    1321-1329

    This paper focuses on Mixed Reality (MR) visual displays, a particular subset of Virtual Reality (VR) related technologies that involve the merging of real and virtual worlds somewhere along the virtuality continuum" which connects completely real environments to completely virtual ones. Probably the best known of these is Augmented Reality (AR), which refers to all cases in which the display of an otherwise real environment is augmented by means of virtual (computer graphic) objects. The converse case on the virtuality continuum is therefore Augmented Virtuality (AV). Six classes of hybrid MR display environments are identified. However, an attempt to distinguish these classes on the basis of whether they are primarily video or computer graphics based, whether the real world is viewed directly or via some electronic display medium, whether the viewer is intended to feel part of the world or on the outside looking in, and whether or not the scale of the display is intended to map orthoscopically onto the real world leads to quite different groupings among the six identified classes, thereby demonstrating the need for an efficient taxonomy, or classification framework, according to which essential differences can be identified. The obvious' distinction between the terms real" and virtual" is shown to have a number of different aspects, depending on whether one is dealing with real or virtual objects, real or virtual images, and direct or non-direct viewing of these. An (approximately) three dimensional taxonomy is proposed, comprising the following dimensions: Extent of World Knowledge (how much do we know about the world being displayed?"), Reproduction Fidelity (how realistically' are we able to display it?"), and Extent of Presence Metaphor (what is the extent of the illusion that the observer is present within that world?").

  • FDTD Analysis of Unit-Radiator for a Circularly Polarized Printed Array Antenna Composed of Strips and Slots

    Motoyuki NAITO  Shin-ichiro MATSUZAWA  Koichi ITO  

     
    PAPER-Antennas and Propagation

      Vol:
    E77-B No:12
      Page(s):
    1621-1627

    The validity of numerical design scheme of CP-PASS (Circularly Polarized Printed Array antenna composed of Strips and Slots) is considered. The strip element of CP-PASS is composed of a strip dipole and a window which increases the frequency bandwidth of the strip element. With the window, however, analysis of the antenna becomes difficult if a simple analytical model is used. The previous design procedure requierd an experimental procedure. By using modern computers, the FDTD (finite-difference time-domain) method becomes powerful tool for the analysis of 3D-structured antennas. In this paper, numerical results of the FDTD analysis for CP-PASS is compared with results from experiments. The characteristics of the unit-radiator of CP-PASS are demonstrated numerically. This paper shows that CP-PASS can be designed numerically and a new path has opened in the study of CP-PASS.

  • A Two-Way Dual-View Teleteaching System Conveying Gestures and Chalkboard Contents

    Amane NAKAJIMA  Takashi SAKAIRI  Fumio ANDO  Masahide SHINOZAKI  

     
    PAPER

      Vol:
    E77-D No:12
      Page(s):
    1335-1343

    In current teleteaching systems, video conferencing systems have been used to transmit a motion video from a teacher's site. A video that captures a teacher or his or her chalkboard is transmitted to a remote site through a communication channel. Since the resolution of the video is not very high, a camera captures either a teacher or a chalkboard, but not both at the same time. Thus, remote students have difficulty in obtaining realistic sensation. Another approach to realizing teleteaching is to use a computer-based desktop conferencing system that supports a motion video and a computer-based shared chalkboard. In this approach, a teacher has to use a mouse or a handwriting tablet for input, and therefore cannot use a real chalkboard. Moreover, the teacher cannot use gestures to remote students. This paper presents a multimedia teleteaching system that integrates an electronic whiteboard with a multimedia desktop conferencing system for providing realistic sensation to remote students. The system provides two-way communication of a video and a computerized chalkboard. A teacher uses an electronic whiteboard as a real whiteboard using direct manipulation, and transmits his or her gestures to remote students by using video communication. The system provides dual views; one view is for teacher's gestures and the other is for chalkboard contents. By providing the dual views, the system can transmit teacher's gestures all the time. Since chalkboard contents are processed and displayed as computer data, students can see them clearly. With the computerized chalkboard, a teacher or a student can zoom contents, input data written on a paper using a scanner, or add annotation.

  • An Overview of Video Coding VLSIs

    Ryota KASAI  Toshihiro MINAMI  

     
    INVITED PAPER-Processors

      Vol:
    E77-C No:12
      Page(s):
    1920-1929

    There are two approaches to implementing the international standard video coding algorithms such as H.261 and MPEG: a programmable DSP approach and a building block approach. The advantages and disadvantages of each are discussed here in detail, and the video coding algorithms and required throughput are also summarized. For more complex standard such as MPEG-, VLSI architecuture became more sophisticated. The DSP approach incorporates special processing engines and the building block approach integrates general-purpose microprocessors. Both approaches are capable of MPEG- NTSC coding in a single chip. Reduction of power consumption is a key issue for video LSIs. Architectures and circuits that reduce the supply voltage while maintaining throughput are summarized. A 0.25-µm, 3-GOPS, 0.5-W, SIMD-VSP for portable MPEG- systems could be made by using architecture-driven voltage scaling as well as feature-size scaling and SOI devices.

  • Networked Reality, What?

    Tak KAMAE  

     
    INVITED PAPER

      Vol:
    E77-D No:12
      Page(s):
    1318-1320

    The networked reality is defined to be the virtual reality used in networks and using networks. The paper describes several levels of the networked reality and their applications.

  • Communicative Characteristics of Small Group Teleconferences in Virtual Environments

    Atsuya YOSHIDA  Jun KAKUTA  

     
    PAPER

      Vol:
    E77-D No:12
      Page(s):
    1385-1389

    When we design a human interface of a computer-mediated communication (CMC) system, it is important to take a socio-behavioral approach for understanding the nature of the human communication. From this point of view, we conducted experimental observations and post-experimental questionnaires to investigate communicative characteristics in a teleconference using Fujitsu Habitat" visual telecommunication software. We experimentally held the following three kinds of small-group conferences consisting of five geographically distributed participants: (a) teleconference using a visual telecommunication system (Fujitsu Habitat"), (b) teleconference using a real-time keyboard telecommunication system of NIFTY-Serve and (c) live face to face physical conference. Analyses were made on (1) effects of the media on utterance behaviors of conference members, and (2) satisfaction of conference members with communicative functions of the media. Satisfaction was measured by a seven-level rating scale. We found that participants in a telconference held by using Habitat showed significant differences in contents of utterances and the rating of satisfaction with nine communicative functions compared with those of conferences held by using a real-time keyboard telecommunication system and a live face-to-face conference. These results suggest some features that could facilitate multi-participant on-line electronic conferences and conversations.

  • A Social Psychological Approach to Networked" Reality

    Ken'ichi IKEDA  

     
    PAPER

      Vol:
    E77-D No:12
      Page(s):
    1390-1396

    In real life, our sence of social reality is supported by the institutional basis, group/interpersonal basis, and belief/schema basis. In networked life, in contrast, these natural and ordinary bases are not always warranted because of a lack of institutional backup, the fragility of the group or interpersonal environment, and the noncommonality of our common sense. In order to compensate for these incomplete bases, networkers ar seeking adaptive communication styles. In this process, there emerge three types of communication cultures. One is the name-card exchange" type. This type is realized by communicating our demographic attributes verbally, which is useful for reality construction of the institutional basis. The second is the ideographization" type. In this type, the content of customary nonverbal communication is creatively transformed into various pseudo nonverbal or para-linguistic expressions, which strengthen fragile interpersonal relationships. The last type is the verbalian" type. This type never depends on the interpersonal or institutional basis. The networked reality is constructed solely in the attempt for common sense development among members. By analyzing the content of messages exchanged in four public groups called Forums," the author found that patterns of communication are transformed in a manner adaptive to each Forum's reality. Thier adaptation modes are different and depend on the types of communication culture every Forum pursues. This is contrarty to the psychologists' tendency to assume that there must be common characteristics or rules valid throughout all of the electronic communication situations.

  • InterSpace: Networked Virtual World for Visual Communication

    Shohei SUGAWARA  Gen SUZUKI  Yoshio NAGASHIMA  Michiaki MATSUURA  Hiroya TANIGAWA  Machio MORIUCHI  

     
    PAPER

      Vol:
    E77-D No:12
      Page(s):
    1344-1349

    The many-user networked virtual world system InterSpace" is described. This system's main purpose is to enhance the user's communication activities. In InterSpace, the real world information is embedded in the shared virtual world as a combination of video and CG images. Users can ovserve and access this information by simply looking and approaching embedded images. The concept of InterSpace and a prototype system of this service are introduced.

  • Stuff Synchronization Circuit Design for HDTV Transmission on SDH Network

    Yasuyuki OKUMURA  Ryozo KISHIMOTO  

     
    PAPER-Communication Device and Circuit

      Vol:
    E77-B No:12
      Page(s):
    1614-1620

    This paper describes a design method of stuff synchronization circuit for High-definition Television (HDTV) transmission to reduce stuff jitter, one of the greatest problems in video transmission through plural Synchronous Digital Hierarchy (SDH) networks operating with different frequency sources. First, we determine the quantity of stuff jitter in SDH networks using the pointer mechanism and Administration Unit (AU) pointer bytes. From the results of a subjective test conducted for HDTV, we show that the minimum noticeable jitter is 3.6 nsec in using a color-bar pattern as a test image and a sinusoidal wave as a jitter signal. These results are used to describe the effect of stuff jitter on picture quality. We then introduce a distributed destuffing method at the receiving end, and show that jitter can be reduced by about 32dB in a 622Mbps rate system. Based on these results, we finally show that the cut-off frequency of the clock recovery PLL for distributed destuffing is more than 10 times higher than that required by conventional destuffing. This reduces the pull-in time by more than 99.9%.

  • Double-Stage Threshold-Type Foreground-Background Congestion Control for Common-Store Queueing System with Multiple Nonpreemptive Priority Classes

    Eiji SHIMAMURA  Iwao SASASE  

     
    PAPER-Communication Theory

      Vol:
    E77-B No:12
      Page(s):
    1556-1563

    The double-stage threshold-type foreground-background congestion control for the common-store queueing system with multiple nonpreemptive priority classes is proposed to improve the transient performance, where the numbers of accepted priority packets in both foreground and background stores are controlled under the double-stage threshold-type scheduling. In the double-stage threshold-type congestion control, the background store is used for any priority packets, and some parts of the background store are reserved for lower-priority packets to accommodate more lower-priority packets in the background store, whereas some parts of the foreground store are reserved for higher-priority packets to avoid the priority deadlock. First, we derive the general set of coupled differential equations describing the system-state, and the expressions for mean system occupancy, throughput and loss probability. Second, the transient behavior of system performance is evaluated from the time-dependent state probabilities by using the Runge-Kutta procedure. It is shown that when the particular traffic class becomes overloaded, high throughputs and low loss probabilities of other priority classes can be obtained.

  • A Multi-Layer Channel Router Using Simulated Annealing

    Masahiko TOYONAGA  Chie IWASAKI  Yoshiaki SAWADA  Toshiro AKINO  

     
    PAPER

      Vol:
    E77-A No:12
      Page(s):
    2085-2091

    We present a new multi-layer over-the-cell channel router for standard cell layout design using simulated annealing. This new approach, STANZA-M consists of two key features. The first key feature of our router is a new scheme for simulated annealing in which we use a cost function to evaluate both the total net-length and the channel heights, and an effective simulated annealing process by a limited range to obtain an optimal chnnel wiring in practical time. The second feature of our router is a basic layer assignment procedure in which we assign all horizontal wiring inside a channel to feasible layers by considering the height of channel including cell region with a one dimensional channel compaction process. We implemented our three-layer cannel router in C language on a Solbourne Series 5 Work Station (22 MIPS). Experimental results for benchmarks such as Deutsch's Difficult Example and MCNC's PRIMARY1 channel routing problems indicate that STANZA-M can achieve superior results compared to the conventional routers, and the process times are very fast despite the use of simulated annealing.

  • VLSI Implemented 60 Mb/s QPSK/OQPSK Burst Digital Demodulator for Radio Application

    Yoichi MATSUMOTO  Kiyoshi KOBAYASHI  Tetsu SAKATA  Kazuhiko SEKI  Shuji KUBOTA  Shuzo KATO  

     
    PAPER-Multimedia System LSIs

      Vol:
    E77-C No:12
      Page(s):
    1873-1880

    This paper presents a fully digital high speed (60 Mb/s) Quadrature Phase Shift Keying (QPSK)/Offset QPSK (OQPSK) burst demodulator for radio applications, which has been implemented on a 0.5 µm Complementary Metal Oxide Semiconductor (CMOS) master slice Very Large Scale Integrated circuit (VLSI). The developed demodulator VLSI eliminates analog devices such as mixers, phase-shifters and Voltage Controlled Oscillator (VCO) for bit-timing recovery, which are used by conventional high-speed burst demodulators. In addition to the fully digital implementation, the VLSI achieves fast carrier and bit-timing acquisition in burst modes by employing a reverse-modulation carrier recovery scheme with a wave-forming filter for OQPSK operation, and a bit-timing recovery scheme with bit-timing estimation and interpolation using a pulse-shaping filter. Results of performance evaluation assuming application in Time Division Multiple Access (TDMA) systems show that the developed VLSI achieves excellent bit-error-rate and carrier-slipping-rate performance at high speed (60 Mb/s) with short preamble words (less than 100 symbols) in low Eb/No environments.

  • A Half-Pel Precision Motion Estimation Processor for NTSC-Resolution Video

    Shin-ichi URAMOTO  Akihiko TAKABATAKE  Mitsuyoshi SUZUKI  Hiroki SAKURAI  Masahiko YOSHIMOTO  

     
    PAPER-Processors

      Vol:
    E77-C No:12
      Page(s):
    1930-1936

    The hybrid coding with motion compensated prediction and discrete cosine transform (MC+DCT) has been recognized as the standard technique in motion picture coding. In this paper, a motion estimation processor compatible with ITU-T H.261 and MPEG standards is described. A half-pel precision processing unit is introduced with an exhaustive block matching unit for integer-pel precision search. The necessary processing power for the exhaustive block matching is implemented with a 1-dimensional array structure utilizing a sub-sampling technique. In comparison with the conventional 2-dimensional array structure, path of the data transfer is so simple that the low power dissipation characteristic is obtained. The problem of communication bandwidth to the frame memory, which is a bottleneck of half-pel precision motion estimation, is solved by introducing a candidate pixel buffer into the inter-processor data transfer. A static latch circuit with conflict free operation is newly developed for reducing the power consumption. This chip is capable of processing NTSC-resolution video in real-time at the 40 MHz operation. The chip integrates about 540 k transistors in the 121 mm2 die using 0.8 µm double metal CMOS technology.

  • A PLL-Based Programmable Clock Generator with 50-to 350-MHz Oscillating Range for Video Signal Processors

    Junichi GOTO  Masakazu YAMASHINA  Toshiaki INOUE  Benjamin S. SHIH  Youichi KOSEKI  Tadahiko HORIUCHI  Nobuhisa HAMATAKE  Kouichi KUMAGAI  Tadayoshi ENOMOTO  Hachiro YAMADA  

     
    PAPER-Processor Interfaces

      Vol:
    E77-C No:12
      Page(s):
    1951-1956

    A programmable clock generator, based on a phase-locked loop (PLL) circuit, has been developed with 0.5 µm CMOS triple-layer Al interconnection technology for use as an on-chip clock generator in a 300-MHz video signal processor. The PLL-based clock generator generates a clock signal whose frequency ranges from 50 to 350 MHz which is an integral multiple, from 2 to 16, of an external clock frequency. In order to achieve stable operation within this wide range, a voltage controlled oscillator (VCO) with selectable low VCO gain characteristics has been developed. Experimental results show that the clock generator generates a 297-MHz clock with a 27-MHz external clock, with jitter of 180 ps and power dissipation of 120 mW at 3.3-V power supply, and it can also oscillate up to 348 MHz with a 31.7-MHz external clock.

  • Design of a 3.2 GHz 50 mW 0.5 µm GaAs PLL-Based Clock Generator with 1 V Power Supply

    Tadayoshi ENOMOTO  Toshiyuki OKUYAMA  

     
    PAPER-Processor Interfaces

      Vol:
    E77-C No:12
      Page(s):
    1957-1965

    A 3.2 GHz, 50 mW, 1 V, GaAs clock pulse generator (CG) based on a phase-locked loop (PLL) circuit has been designed for use as an on-chip clock generator in future high speed processor LSIs. 0.5 µm GaAs MESFET and DCFL circuit technologies have been used for the CG, which consists of 224 MESFETs. An "enhanced charge-up current" inverter has been specially designed for a low power and high speed voltage controlled oscillator (VCO). In this new inverter, a voltage controlled dMESFET is combined in parallel with the load dMESFET of a conventional DCFL inverter. This voltage controlled dMESFET produces an additional charge-up current resulting in the new VCO obtaining a much higher oscillation frequency than that of a ring oscillator produced with a conventional inverter. With a single 1 V power supply (Vdd), SPICE calculation results showed that the VCO tuning range was 2.25 GHz to 3.65 GHz and that the average VCO gain was approximately 1.4 GHz/V in the range of a control voltage (Vc) from 0 to 1 V. Simulation also indicated that at a Vdd of 1 V the CG locked on a 50 MHz external clock and generated a 3.2 GHz internal clock (=50 MHz64). The jitter and power dissipation of the CG at 3.2 GHz oscillation and a Vdd of 1 V were less than 8.75 psec and 50 mW, respectively. The typical lock range was 2.90 GHz to 3.59 GHz which corresponded to a pull-in range of 45.3 MHz to 56.2 MHz.

  • Statistical Analysis on Connection Characteristics of Optical Fiber Connectors

    Yasuhiro ANDO  Shin'ichi IWANO  Kazunori KANAYAMA  Ryo NAGASE  

     
    PAPER-Opto-Electronics

      Vol:
    E77-C No:12
      Page(s):
    1970-1982

    The statistical properties of insertion losses and return losses for optical connectors are investigated theoretically using the probability theory and the Monte Carlo simulation. Our investigation is focused on an orientation method for reducing insertion loss by which a fiber-core center is adjusted in a region of within a certain angle to the positioning key direction. It is demonstrated that the method can significantly improve insertion losses, and that an adjusting operation angle of 90 degrees is sufficient to realize an insertion loss of less than 0.5 dB with 99% cumulative probability. Good agreement was obtained between the theoretical distribution and the experimental results for single-mode fiber connection. Consequently, it is indicated that the statistical distributions of insertion losses and return losses of optical connectors in the field can be predicted theoretically from the values measured in the factory by connection to a master connector.

  • Transmission Characteristics of DQPSK-OFDM for Terrestrial Digital Broadcasting Systems

    Masafumi SAITO  Shigeki MORIYAMA  Shunji NAKAHARA  Kenichi TSUCHIDA  

     
    PAPER

      Vol:
    E77-B No:12
      Page(s):
    1451-1460

    OFDM (Orthogonal Frequency Division Multiplexing) is a useful digital modulation method for terrestrial digital broadcasting systems, both for digital TV broadcasting and digital audio broadcasting. OFDM is a kind of multicarrier modulation and shows excellent performance especially in multipath environments and in mobile reception. Other advantages are its resistance to interference signals and its suitability for digital signal processing. When each carrier of the OFDM signal is modulated with DQPSK, we call it DQPSK-OFDM. DQPSK-OFDM is a basic OFDM system, which is especially suitable for mobile reception. This paper describes how a DQPSK-OFDM system works and shows several experimental and simulation results. The experimental results mainly concern the performance of the DQPSK-OFDM system relative to various disturbances such as multipath (ghost) signals, nonlinearity of the channel, and interference from analog signals. The transmission characteristics of DQPSK-OFDM are investigated and the basic criteria for the system design of DQPSK-OFDM are discussed.

  • A Floorplanning Method with Topological Constraint Manipulation in VLSI Building Block Layout

    Tetsushi KOIDE  Yoshinori KATSURA  Katsumi YAMATANI  Shin'ichi WAKABAYASHI  Noriyoshi YOSHIDA  

     
    LETTER

      Vol:
    E77-A No:12
      Page(s):
    2053-2057

    This paper presents a heuristic floorplanning method that improves the method proposed by Vijayan and Tsay. It is based on tentative insertion of constraints, that intentionally produces redundant constraints to make it possible to search in a wide range of solution space. The proposed method can reduce the total area of blocks with the removal and insertion of constraints on the critical path in both horizontal and vertical constraint graphs. Experimental results for MCNC benchmarks showed that the quality of solutions of the proposed method is better than [7],[8] by about 15% on average, and even for the large number of blocks, the proposed method keeps the high quality of solutions.

  • A Global Router Optimizing Timing and Area for High-Speed Bipolar LSIs

    Ikuo HARADA  Yuichiro TAKEI  Hitoshi KITAZAWA  

     
    PAPER

      Vol:
    E77-A No:12
      Page(s):
    2058-2066

    A timing-driven global routing algorithm is proposed that directly models the path-based timing constraints. By keeping track of the critical path delay and channel densities, and using novel heuristic criteria, it can select routing paths that minimize area as well as satisfy the timing constraints. Using bipolar-specific features, this router can be used to design LSI chips that handle signals with speeds greater that a gigabit per second. Experimental results shows an average delay improvement of 17.6%.

  • Analysis of Pulse Responses of Multi-Conductor Transmission Lines by a Partitioning Technique

    Yuichi TANJI  Lingge JIANG  Akio USHIDA  

     
    PAPER

      Vol:
    E77-A No:12
      Page(s):
    2017-2027

    This paper discusses pulse responses of multi-conductor transmission lines terminated by linear and nonlinear subnetworks. At first step, the circuit is partitioned into a linear transmission lines and nonlinear subnetworks by the substitution voltage sources. Then, the linear subnetworks are solved by a well-known phasor technique, and the nonlinear subnetworks by a numerical integration technique. The variational value at each iteration is calculated by a frequency domain relaxation method to the associated linearized time-invariant sensitivity circuit. Although the algorithm can be efficiently applied to weakly nonlinear circuits, the convergence ratio for stiff nonlinear circuits becomes very small. Hence, we recommend to introduce a compensation element which plays very important role to weaken the nonlinearity. Thus, our algorithm is very simple and can be efficiently applied to wide classes of nonlinear circuits.

21281-21300hit(22683hit)