To evaluate the radial eigenmode field distributions and the resonance wavelengths of axially symmetric pillbox resonator, a numerical method is described which is based on the FE-BPM expression in cylindrical coordinates. Under the weakly guiding approximation, we solve Fresnel equation and can get a fairly accurate result. By using effective index method, 3-D pillbox guiding structure is reduced to 2-D one which is then used for the analysis. One advantage of this method is that it is applicable for the axially symmetric optical waveguides with arbitrary index distribution. The validity of this method is checked by comparing the results of this method with those of the analytical ones. This method is applied for the evaluation of the coupling properties of a coupled structure consisting of a pillbox resonator and a curved waveguide placed outside the pillbox. This coupled structure has a good prospect to be used as optical wavelength filter. By varying the separation distance between the pillbox and the outer curved waveguide, the power transfer due to coupling is determined near the resonance wavelength 0.9 µm.

An automatic transistor-level performance fault tracing method is proposed which is applicable to the case where only CAD layout data is available in the CAD-linked electron beam test system. The technique uses an integrated algorithm that combines a previously proposed transistor-level fault tracing algorithm and a successive circuit extraction from CAD layout data. An expansion of the algorithm to the fault tracing in a combined focused ion beam and electron beam test system which enables us to measure signals on the interconnections in the lower layers is also described. An application of the technique to a CMOS model layout with about 100 transistors shows its validity.

In this paper, the diffusion parameter-values in the K+-ion diffused waveguides made by diluted KNO3 with NaNO3 in the soda-lime glass, which are determined from measured values of the effective index, are presented together with a simple method for the determination. The surface-index changes are measured for the waveguides by KNO3 melts with 75%-, 50%- and 30%-dilutions (weight ratio), and for comparison purpose, also by the pure KNO3, and the dependence of the index-profile on the dilution of KNO3 in the ion-source melt is shown. Change of the two-dimensional index profile in the diffused channel waveguide with the KNO3-dilution is also shown, which is calculated with the measured diffusion parameters.

One approach to develop software efficiently is to reuse existing software by modifying a part of it. However, modifying software will often introduce unexpected side effects into other parts of it. As a result, it costs much time and care to modify the software. So, in order to modify software efficiently, we have proposed a functional model to represent information about side effects caused by modification and a model based supporting system for modifying software. So far, however, an expert software developer must describe the entire functional model of the target software through the analysis of practical modifying processes. This will be an unnecessary burden on him. Moreover, the larger target software becomes, the harder the model construction becomes. Therefore, an automatic constructing method of the functional model is needed in order to solve this problem. So, this paper considers a method of acquiring useful interaction information by learning from training examples of modification. However, in our application domain, it seems that it is impossible to make complete domain theory and to prepare a large number or training examples in advance. Therefore, our learning method involves an integration of explanation-based learning (EBL) from positive examples of modification generated by the user and Similarity-based learning (SBL) from positive or negative examples generated by the user and the learning system. As a result, our method can acquire valid knowledge about the interaction from not so many examples under incomplete theory. Then, this paper presents a constructing method, in which our proposed learning method is incorporated, of a functional model. Finally, this paper demonstrates construction of the functional model in the domain of an event-driven queueing simulation program according to our learning method.

This paper describes a novel input-free MOS VT extractor circuit. The circuit consists of a bias voltage block and a novel VT extractor block. The proposed VT extractor block has the advantages of the ground-referenced output, low influence of the nonideality, few numbers of transistors and no influence of the PMOS process. The PSpice simulations show the supply voltage range and the bias voltage range of the proposed circuit are wider than those of Johnson's or Wang's.

A 1.5 GHz band Si power MOS amplifier module with 50% total efficiency, 1 W output power and 30 dB power gain has been developed for front-end transmitter of digital cellular telephones. A combination of a highly efficient power MOSFET for the output stage and an integrated two stage MOS amplifier for the driver with an impedance matching circuit minimizing the length of striplines made it possible to achieve high total efficiency, high power gain, and smaller size of the amplifier module.

In this paper, we presented an analysis of single and coupled microstrip lines covered with protective dielectric film which is usually used in the microwave integrated circuits. The method employed in the characterization is called partial-boundary element method (p-BEM). The p-BEM provides an efficient means to the analysis of the structures with multilayered media or covered with protective dielectric film. The numerical results show that by changing the thickness of the protective dielectric films such as SiO2, Si and Polyimide covered on these lines on a GaAs substrate, the coupled microstrip lines vary within 10% on the characteristic impedance and within 25% on the effective dielectric constant for the odd mode of coupled microstrip line, respectively, in comparison with the structures without the protective dielectric film. In contrast, the single microstrip lines vary within 4% on the characteristic impedance and within 8% on the effective dielectric constant, respectively. The protective dielectric film affects the odd mode of the coupled lines more strongly than the even mode and the characteristics of the single microstrip lines.

A new mm-wave IC, constructed by flip-chip bonded heterojunction transistors and microstrip lines formed on Si substrate, has been proposed and demonstrated by using MBB (micro bump boding) technology. Millimeter-wave characteristics of the MBB region has been estimated by electro-magnetic field analysis. Good agreements between calculated and measured characteristics of this new IC (named MFIC: millimeter-wave flip-chip IC) have been obtained up to 60 GHz band. Several MFIC amplifiers with their designed performances have been successfully fabricated.

A Superconductor-Insulator-Superconductor (SIS) mixer using two junctions connected in parallel through a stripline inductance has been studied. The essential point of the two-junctions device is that the capacitance of the junctions was tuned out by the inductance to obtain a broadband operation without mechanical tuning elements. It has been shown by theoretical analysis that the performance of this type of device is excellent and nearly quantum-limited performance of the mixer can be obtained. It has been demonstrated that the double sideband (DSB) noise temperature of a receiver employing this type of device was less than 40 K over the bandwidth of 90-120 GHz and that the lowest receiver noise temperature of 18 K, which is only 3.2 times as large as the quantum limited photon noise was obtained around 118 GHz. Junctions used in the two-junctions device have significantly larger area, i.e. larger capacitance, and smaller normal resistance than conventional ones. In order to obtain a good impedance match between the source and the junctions, an impedance transformer made of a superconductiong stripline was integrated with the junctions. This type of two-junctions device can easily be scaled to submillimeter frequency without using submicron-sized SIS junctions.

This paper studies congestion control schemes for integrated variable bit-rate (VBR) video and data communications, where the quality of service (QOS) of each medium needs to be satisfied. In order to control congestion, we exert here either dynamic resolution control or QOS control. The dynamic resolution control scheme in this paper dynamically changes the temporal or spatial resolution of video according to the network loads. The QOS control scheme here assigns a constant capacity of buffer to each connection and determines the video resolution in order to guarantee the QOS of each medium at the connection establishment. The performance of these schemes is evaluated through simulation in terms of throughput, video frame delay probability distribution, and video frame loss rate. We also examine the effects of priority scheduling and packet discarding on the performance. Numerical results indicate that both dynamic resolution and QOS control attain low delay jitters as well as large video and data throughput. In particular, the QOS control is shown to be more suitable for integrated VBR video and data communications.

A scalable and flexible ASIC CIM system distributed on UNIX workstations, ORCHARD , has been developed. It is designed from three viewpoints: (1) cost and TAT reduction in system construction, (2) flexibility in data management for quality control, and (3) precise and quick scheduling and effective lot tracking to control TAT for each lot. The concept of a "virtual machine" is introduced to connect equipment having various protocols to a host system. The virtual machine is automatically generated at an average automatic generation ratio of as high as 89%, which leads to a reduction in cost and TAT in system construction. Data for quality control is managed by changing flexibly the "data processing recipe." This recipe defines screen format, data collected from equipment, and data transfered from various databases. Precise scheduling of lots with various levels of priority is achieved by introducing a priority evaluation function, thereby reducing scheduling time to 1/20 that for manual scheduling.

This paper discusses a CMOS differential-difference amplifier circuit suitable for low voltage operation. A new multiple weighted input transconductor circuit structure is suggested to be use in DDA implementation. The proposed DDA can be employed in several analog/digital systems to improve their parameters. Selected examples of the proposed transconductor/DDA applications are also discussed.

We propose a method for configuring LSI manufacturing lines so that they can not only be used to manufacture low-cost LSIs in bulk quantities but also can be used to manufacture small lots with ultra-short TAT. This is achieved by adding a relatively small amount of single-wafer processing equipment to a existing conventional processing line, and therefore involves minimum investment.

This paper proposes a constructive linearization method for transistor circuits based on a polynomial representation of nonlinear transfer functions. The nonlinear transfer functions for various configurations have been shown in a polynomial form. Then the results have been applied to several bipolar transistor circuits to exemplify the proposed designing method.

GaAs-based micromachining is a very attractive technique for integrating mechanical structures and active optical devices, such as laser diodes and photodiodes. For monolithically integrating mechanical parts onto laser diode wafers, the micromachining technique must be compatible with the laser diode fabrication process. Our micromachining technique features three major processes: epitaxitial growth (MOVPE) for both the structural and sacrificial layers, reactive dry-etching by chlorine for high-aspect, three-dimensional structures, and selective wet-etching by peroxide/ammonium hydroxide solution to release the moving parts. These processes are compatible with laser fabrication, so a cantilever beam structure can be fabricated at the same time as a laser diode structure. Furthermore, a single-crystal epitaxial layer has little residual stress, so precise microstructures can be obtained without significant deformation. We fabricated a microbeam resonator sensor composed of two laser diodes, a photodiode, and a micro-cantilever beam with an area of 400700 µm. The cantilever beam is 3 µm wide, 5 µm high, and either 110µm long for a 200-kHz resonant frequency or 50 µm long for a 1-MHz resonant frequency. The cantilever beam is excited by an intensity-modulated laser beam from an integrated excitation laser diode; the vibration signal is detected by a coupled cavity laser diode and a photodiode.

This paper describes an efficient slew rate enhancement technique especially suitable for an operational amplifier used in an LCD driver IC. This technique employs an input-dependent biasing without directly monitoring an input; instead, monitoring an output of the first stage of the amplifier. This enhancement technique is easily applied to a conventional two-stage operational amplifier and requires only 8 additional transistors to increase slew rates for both rising and falling edges. The bias currents of the first and the second stages are simultaneously controlled by this biasing. Experimental operational amplifiers with and without this enhancement have been fabricated to demonstrate the improvement of slew rate. Slew rates of 12.5V/µsec for the rising edge and 50V/µsec for the falling edge with a 100 pF load capacitance have been achieved by this technique, compared with slew rates of 0.3V/µsec for the rising edge and 5V/µsec for the falling edge in the conventional amplifier.

A filter-type coplanar parallel electrode with periodically loaded reactances is introduced to construct guided-wave light modulators of limited bandwidth. The device was built by using a Ti:LiNbO3 optical waveguide and was operated successfully at 633 nm. Measured 3 dB bandwidth was 1 GHz centered at 14.8 GHz. Required modulating power for 1 rad phase modulation was 67.6 mW.

A new rate-controlled queueing discipline, called virtual rate-based queueing (VRBQ), is proposed for packet-switching nodes in connection-oriented, high-speed, wide-area networks. The VRBQ discipline is based on the virtual rate which has a value between the average and peak transmission rates. By choosing appropriate virtual rates, various requirements can be met regarding the performance and quality of services in integrated-service networks. As the worst-case performance guarantee, we determine the upper bounds of queueing delay when VRBQ is combined with an admission control mechanism, i.e., Dynamic Time Windows or Leaky Bucket. Simulation results demonstrate the fairness policy of VRBQ in comparison with other queueing disciplines, and the performance of sources controlled under different virtual rates.

In this paper, a novel coupler-type wavelength demultiplexer composed of the K+-ion diffused waveguides, which has an adjustment function for optimizing the diffusion depth, is proposed to achieve reliably the high extinction ratio. The optimization in the diffusion depth is made by repeating the K+-ion diffusion and extinction-ratio measurement alternatively, and the high extinction ratios more than 20 dB are measured reliably at both operation wavelengths of 0.6328 and 0.83 µm. Experimental results on the polarization dependence in the extinction-ratio adjustment are also reported.

In intelligent integrated systems such as robotics for autonomous work, it is essential to respond to the change of the environment very quickly. Therefore, the development of special-purpose VLSI processors for intelligent integrated systems with small latency becomes an very important subject. In this paper, we present a scheduling algorithm for high-level synthesis. The input to the scheduler is a behavioral description which is viewed as a data flow graph (DFG). The scheduler minimizes the latency, which is the delay of the critical path in the DFG, and minimizes the number of functional units and buses by improving the utilization rates. By using an integer linear programming, the scheduler optimally assigns nodes and arcs in the DFG into steps.