A swing level controlled voltage-mode transmitter is proposed to support a stub series-terminated logic channel with center-tapped termination. This transmitter provides a swing level control to support the diagnostic mode and improve the signal integrity in the absence of the destination termination. By using the variable parallel termination, the proposed transmitter maintains the constant output impedance of the source termination while the swing level is controlled. Also, the series termination using an external resistor is used to reduce the impedance mismatch effect due to the parasitic components of the capacitor and inductor. To verify the proposed transmitter, the voltage-mode driver, which provides eight swing levels with the constant output impedance of about 50 Ω, was implemented using a 70 nm 1-poly 3-metal DRAM process with a 1.5 V supply. The jitter reduction of 54% was measured with the swing level controlled voltage-mode driver in the absence of the destination termination at 1.6-Gb/s.

With the big success of 802.11 wireless networks, there have been many proposals addressing end-to-end QoS guarantees in 802.11 WLAN. However, we have found that current end-to-end QoS architectures lack of one or more important properties such as cross-layer interaction, end-to-end integration, reconfigurability and modularity. In this work, we present an end-to-end reference QoS architecture for 802.11 WLAN that encapsulates in an unifying fashion software-based QoS components (mechanisms, algorithms, services), proposed in the literature. To show the usefulness and correctness of the reference architecture, we present three case studies of end-to-end QoS architectures addressing different QoS requirements such as bandwidth and delay with different approaches such as differentiated services and integrated services. We will give an architectural comparison and performance evaluation of these architectures. We believe the reference QoS architectures can help QoS designers to understand the importance and the complexity of various QoS components during the design phase and thus choose these QoS components appropriately.

Adaptable workflow participant assignment (WPA) is crucial to the efficiency and quality of workflow execution. This paper proposes an ontology-based approach to adaptable WPA (OWPA). OWPA introduces domain ontology to organize the enterprise data and uses a well-defined OWPA rule to express an authorization constraint. OWPA can represent more complex authorization constraints by flexibly using the enterprise data, the workflow data, the user-input data, and the built-in functions. By a high-usability interactive interface, OWPA allows users to define and modify the OWPA rules easily without any programming work. Moreover, OWPA is bound to the workflow modeling tool and the workflow monitor respectively to adapt to dynamic workflow modification in workflow definitions and workflow instances. OWPA has been applied in three enterprises in China.

Chip-to-chip serial data communication is superposed on power supply over common Vdd/Vss connections through chip, package, and board traces. A power line transceiver demonstrates half duplex spiking communication at more than 100 Mbps. A pair of transceivers consumes 1.35 mA from 3.3 V, at 130 Mbps. On-chip power line LC low pass filter attenuates pseudo-differential communication spikes by 30 dB, purifying power supply current for internal circuits. Bi-directional spiking communication was successfully examined in a 90-nm CMOS prototype setup of on-chip waveform capturing. A micro controller forwards clock pulses to and receives data streams from a comparator based waveform capturer formed on a different chip, through a single pair of power and ground traces. The bit error rate is small enough not to degrade waveform acquisition capability, maintaining the spurious free dynamic range of higher than 50 dB.

To detect neural spike signals, low-power neural signal recording frontend circuits must amplify neural signals with below 100 µV amplitude and a few hundred Hz frequency while suppressing a large DC offset voltage, 1/f noise of MOSFETs, and induced noise of AC power supply. To overcome the problem of unwanted noise at such a low signal level, a low-noise neural signal detection amplifier with low-frequency noise suppression scheme was developed utilizing a new autozeroing technique. A test chip was designed and fabricated with a mixed signal 0.18-µm CMOS technology. The voltage gain of 39 dB at the bandwidth of the neural signal and the gain reduction of 20 dB at AC supply noise of 60 Hz were obtained. The input equivalent noise and power dissipation were 90 nV/root-Hz and 90 µW at a supply voltage of 1.5 V, respectively.

An arbitrary noise generator (ANG) is based on time-series charging of divided parasitic capacitance (TSDPC) and emulates power supply noise generation in a CMOS digital circuit. A prototype ANG incorporates an array of 32 x 32 6-bit TSDPC cells along with a 128-word vector memory and occupies 2 x 2 mm2 in a 65 nm 1.2 V CMOS technology. Digital noise emulation of functional logic cores such as register arrays is demonstrated with chip-level waveform monitoring at power supply, ground, as well as substrate nodes.

Silicon-quantum-dots (Si-QDs) with an areal density as high as 1012 cm - 2 were self-assembled on thermally-grown SiO2 by low pressure CVD using Si2H6, in which OH-terminated SiO2 surface prior to the Si CVD was exposed to GeH4 to create nucleation sites uniformly. After thermal oxidation of Si-QDs surface, two-dimensional electronic transport through the Si-QDs array was measured with co-planar Al electrodes evaporated on the array surface. Random telegraph signals were clearly observed at constant applied bias conditions in dark condition and under light irradiation at room temperature. The result indicates the charging and discharging of a dot adjacent to the percolation current path in the dots array.

Robust object tracking is required by many vision applications, and it will be useful for the motion analysis of moving object if we can not only track the object, but also make clear the corresponding relation of each part between consecutive frames. For this purpose, we propose a new method for moving object extraction and tracking based on the exclusive block matching. We build a cost matrix consisting of the similarities between the current frame's and the previous frame's blocks and obtain the corresponding relation by solving one-to-one matching as linear assignment problem. In addition, we can track the trajectory of occluded blocks by dealing with multi-frames simultaneously.

To improve speech recognition performance, feature transformation based on discriminant analysis has been widely used to reduce the redundant dimensions of acoustic features. Linear discriminant analysis (LDA) and heteroscedastic discriminant analysis (HDA) are often used for this purpose, and a generalization method for LDA and HDA, called power LDA (PLDA), has been proposed. However, these methods may result in an unexpected dimensionality reduction for multimodal data. It is important to preserve the local structure of the data when reducing the dimensionality of multimodal data. In this paper we introduce two methods, locality-preserving HDA and locality-preserving PLDA, to reduce dimensionality of multimodal data appropriately. We also propose an approximate calculation scheme to calculate sub-optimal projections rapidly. Experimental results show that the locality-preserving methods yield better performance than the traditional ones in speech recognition.

This paper presents a novel cross-layer approach to explore selection diversity for distributed clustering based wireless sensor networks (WSNs) by selecting a proper cluster-head. We develop and analyze an instantaneous channel state information (CSI) based cluster-head selection algorithm for a distributed, dynamic and randomized clustering based WSN. The proposed cluster-head selection scheme is also random and capable to distribute the energy uses among the nodes in the network. We present an analytical approach to evaluate the energy efficiency and system lifetime of our proposal. Analysis shows that the proposed scheme outperforms the performance of additive white Gaussian noise (AWGN) channel under Rayleigh fading environment. This proposal also outperforms the existing cooperative diversity protocols in terms of system lifetime and implementation complexity.

We exhibit a simple procedure to find how classical signals should be processed in cluster-state quantum computation. Using stabilizers characterizing a cluster state, we can easily find a precise classical signal-flow that is required in performing cluster-state computation.

This paper describes an efficient image enhancement method based on the Multi-Scale Retinex (MSR) approach for pre-processing of video applications. The processing amount is drastically reduced to 4 orders less than that of the original MSR, and 1 order less than the latest fast MSR method. For the efficient processing, our proposed method employs multi-stage and multi-rate filter processing which is constructed by a x-y separable and polyphase structure. In addition, the MSR association is effectively implemented during the above multi-stage processing. The method also modifies a weighting function for enhancement to improve color rendition of bright areas in an image. A variety of evaluation results show that the performance of our simplified method is similar to those of the original MSR, in terms of visual perception, contrast enhancement effects, and hue changes. Moreover, experimental results show that pre-processing of the proposed method contributes to clear foreground object separation.

To handle coherent signals with unknown arrival angles, an adaptive beamforming method is proposed which can be applied to an arbitrary array. The proposed method efficiently solves a generalized eigenvalue problem to estimate the arrival angles of the desired coherent signal group, by exploiting the Brent method in conjunction with alternating maximization. We discuss the condition for the correct direction estimation without erroneously taking interference direction estimates for the desired ones. Simulation results show that the performance of the proposed beamformer is very similar to that of the beamformer with the exact composite steering vector (CSV).

In this paper, we propose a novel target acoustic signal detection approach which is based on non-negative matrix factorization (NMF). Target basis vectors are trained from the target signal database through NMF, and input vectors are projected onto the subspace spanned by these target basis vectors. By analyzing the distribution of time-varying normalized projection error, the optimal threshold can be calculated to detect the target signal intervals during the entire input signal. Experimental results show that the proposed algorithm can detect the target signal successfully under various signal environments.

Previous vehicle surveillance researches on distributed sensor network focused on overcoming power limitation and communication bandwidth constraints in sensor node. In spite of this constraints, vehicle surveillance sensor node must have signal compression, feature extraction, target localization, noise cancellation and collaborative signal processing with low computation and communication energy dissipation. In this paper, we introduce an algorithm for light-weight wireless sensor node signal processing based on lifting scheme wavelet analysis feature extraction in distributed sensor network.

We demonstrated an automated passive-transmission-line routing tool for single-flux-quantum (SFQ) circuits. The tool is based on the A* algorithm, which is widely used in CMOS LSI design, and tuned for microstrip/strip lines formed in the SRL 4-Nb layer structure. In large-scale SFQ circuits with 10000-20000 Josephson junctions, such as microprocessors, 80-90% of the wires can be automatically routed in about ten minutes. We verified correct operation above 40 GHz for an automatically routed 44 switch circuit from on-chip high-speed tests. The resulting circuit size and operating frequency were comparable to those of a manually designed result. We believe that the tool is useful for large-scale SFQ circuit design using conventional fabrication processes.

Multiple supply voltage (MSV) assignment is a highly effective means of reducing power consumption. Many existing algorithms perform very well for power reduction. However, they do not handle the area issue of level shifters. In some cases, although one gets a superior result to reduce the power consumption, but many extra level shifters are needed to add so that the circuit area will be over the specification. In this paper, we present an effective integer linear programming (ILP)-based MSV assignment approach to solve two problems with different objectives. For the objective of power reduction under timing constraint, compared with GECVS algorithm, the power consumption obtained by our proposed approach can be further reduced 0 to 5.46% and the number of level shifters is improved 16.31% in average. For the objective of power reduction under constraints of both timing and area of level shifters, the average improvement of power consumption obtained by our algorithm is still better than GECVS while reducing the number of level shifters by 22.92% in average. In addition, given a constraint of total power consumption, our algorithm will generate a design having minimum circuit delay. Experimental results show that the proposed ILP-based MSV assignment algorithm solves different problems flexibly.

A novel modal signal decoupling algorithm for multi-coupled transmission lines is developed. Since the proposed method exploits a set of basis vectors associated with the characteristic impedances of the transmission line system, these multi-coupled signals can be efficiently decoupled regardless of dielectric media and conductors. Thus, compact forms of the signal integrity verification CAD models for multi-coupled transmission lines can be readily determined. It is shown that the analytical models are in excellent agreement with those obtained with SPICE simulation and its computation time is much faster than the conventional macro model (W-model) in the order of two.

A novel signal transition detector design using as few as 8 transistors is presented. The proposed design cleverly exploits the property of a specific internal state transition to mitigate the voltage degradation problem by employing only one extra transistor. It is thus capable of supporting level intact output signals and eliminating DC power consumption in the trailing buffer. The proposed design, featuring low circuit complexity and low power consumption, is considered useful for applications in self-timed circuits. Simulation results show that, when compared with other pass transistor logic based counterpart designs, as much as 46% savings in power and 28% in area can be achieved by the proposed design.

In this letter, we propose a distributed channel assignment where each basestation selects a set of channels shared by multiple users through time domain scheduling for best effort services. The proposed scheme distributedly assigns the channels considering a cochannel interference from neighboring basestations and its own traffic load condition. The computer simulation demonstrates that the proposed scheme appropriately assigns the channels to the basestations taking into account these requirements.