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39921-39940hit(42756hit)

  • Deep-Submicrometer BiCMOS Circuit Technology for Sub-10-ns ECL 4-Mb DRAM's

    Takayuki KAWAHARA  Yoshiki KAWAJIRI  Goro KITSUKAWA  Kazuhiko SAGARA  Yoshifumi KAWAMOTO  Takesada AKIBA  Shisei KATO  Yasushi KAWASE  Kiyoo ITOH  

     
    PAPER

      Vol:
    E75-C No:4
      Page(s):
    487-494

    A 0.3-µm sub-10-ns ECL 4-Mb BiCMOS DRAM design is described. The results obtained are: 1) a Vcc connection limiter with a BiCMOS output circuit is chosen due to ease of design, excellent device reliability, and layout area; 2) a mostly CMOS periphery with a specific bipolar use provides better performances at high speed and low power; 3) the direct sensing scheme of a single-stage MOS preamplifier combined with a bipolar main amplifier offers high speed; and 4) the strict control of MOS transistor parameters has been proven to be more important in obtaining high speed-DRAM's, based on the 4-Mb design.

  • A Si Bipolar 5-Gb/s 8:1 Multiplexer and 4.2-Gb/s 1:8 Demultiplexer

    M. OHUCHI  T. OKAMURA  A. SAWAIRI  F. KUNIBA  K. MATSUMOTO  T. TASHIRO  S. HATAKEYAMA  K. OKUYAMA  

     
    LETTER

      Vol:
    E75-C No:4
      Page(s):
    562-565

    Conventionally, ultrahigh-speed 2:1 multiplexers and 1:2 demultiplexers have been demonstrated with HBT's, MESFET's, and Si BJT's. Multiplexers and demultiplexers with a high number of bits are desirable to simplify a system. An 8:1 multiplexer and a 1:8 demultiplexer operating at 6 Gb/s and a 16:1 multiplexer and a 1:16 demultiplexer operating at 10 Gb/s were realized by HBT's and MESFET's, respectively. This paper describes Si bipolar circuits and package design technology for a 5-Gb/s 8:1 multiplexer and a 4.2-Gb/s demultiplexer. These multigigabit LSI's have been mainly achieved by switching current optimization within the limit of keeping a maximum unity unilateral gain frequency (fmax), by careful circuit and layout design considering accurate parasitic capacitance modeling, and by using a high-speed Si bipolar technology. These LSI's are housed in a newly developed 56-pin six-layer ceramic package with chip resistors for ECL termination and chip capacitors for good RF grounding.

  • Compositional Synthesis for Cooperating Discrete Event Systems from Modular Temporal Logic Specifications

    Naoshi UCHIHIRA  

     
    PAPER

      Vol:
    E75-A No:3
      Page(s):
    380-391

    A Discrete Event System (DES) is a system that is modeled by a finite automaton. A Cooperating Discrete Event System (CDES) is a distributed system which consists of several local DESs which are synchronized with each other to accomplish its own goal. This paper describes the automatic synthesis of a CDES from a modular temporal logic specification. First, MPTS (Modular Practical Temporal Specification language) is proposed in which the new features (modular structure and domain specification) are appended to temporal logic. To overcome the "state explosion problem", which occurs in generating a global automaton in former synthesis methods using temporal logic, a compositional synthesis is proposed where automata are reduced at every composition step.

  • Distributed Signal Transmission System Using Discrete Fourier Transform for High Noise Immunity

    Hyunkoo KANG  Yoon UH  Tasuku TAKAGI  

     
    PAPER

      Vol:
    E75-B No:3
      Page(s):
    188-192

    We propose a new distributed signal (analog or digital) transmission system which has the immunity against the noisy channel. An information signal in transmitter is distributed by distributor and the distributed signal is transmitted. Received signal is reconstructed by the inverse distributor in receiver. In this system, an impulsive interference noise which disturbs the transmission signal in the channel passes decoder only, and this interference noise is distributed by the inverse distributor while the transmitted signal is reconstructed. Some appended signals make it possible to estimate the noise components which inversely distributed with the Fourier transformation as the distributor. Basing upon this principle, the transmission system will have an ability to suppress the impulsive interference, and the channel will have high noise immunity. The construction of receiver which can eliminate the impulsive noise is derived.

  • Analysis of Multiple Reflections by Transfer Functions of Transmission Line Networks with Branches and Its Application

    Iwata SAKAGAMI  Akihiro KAJI  Tomoaki USAMI  

     
    PAPER

      Vol:
    E75-B No:3
      Page(s):
    157-164

    Networks in this paper consist of non-commensurate transmission lines with branches and branching resistors at junctions. When signals on a transmission line are divided multiple ways at the junctions of branched lines, multiple reflection waves occur by the impedance mismatching. For the analysis of multiple reflections and network design, lattice diagrams have been used so far. However, the expansions of network transfer functions provide an easier way for the same purpose as in the case of lattice diagram. The output transient responses can be directly calculated from the expansions of network transfer functions or can be numerically calculated by software such as the fast Laplace transform. Therefore, once the network transfer functions are given, calculation of transient responses can be carried out quite easily. In this paper, the expansions of network transfer functions have been derived with respect to delay elements ξi=exp(-sτi) by formularizing the propagation of multiple reflection waves, and then the multi-variable rational network transfer functions have been obtained from the expansions. As an example, a 3-port transmission line network with normalized characteristic impedances 1, 1, 6 and normalized branching resistors 1/23, 1/23, 126/23 has been taken up. As the terminal resistances at output ports can be determined from the relation of the first arriving wave to the steady state, the design of 3-port transmission line networks which will furnish output waveforms similar to the waveform of the input within given tolerances has been considered. The output waveforms have been calculated for pure terminal resistances and for the pure terminal resistances plus parasitic parallel capacitances.

  • Stabilization of Power Line Impedance for Radiated EMI Level Measurement

    Atsuya MAEDA  

     
    PAPER

      Vol:
    E75-B No:3
      Page(s):
    148-156

    It is important to develop methods of measuring radiated electromagnetic interference level that will produce identical results at all measuring locations. We have considered a number of problems which prevent the achievement of identical results, and proposed some solutions. However, agreement of measurement values adequate for practical purposes has not been achieved. After our successive studies, we finally became aware that there is a causal relationship with changes in the line-to-ground impedance of the power supply. It is presumed that power cables of AC-powered devices operate as antenna elements that produce emission. Thus changes in the power line-to-ground impedance cause variations in the radiation efficiency to produce a different EMI level. We therefore made plans to measure the values of line-to-ground impedance at the AC power outlet for the frequency range of 100kHz to 500MHz at various locations where measurements are made of EMI from EUT (Equipment Under Test). The impedance varies greatly between 6ohms and 2 k-ohm, not only according to the frequency, but also according to the measurement location. In such cases, the EMI level shows a different value even with the same EUT, and it usually increases-especially for vertical polarization. We have developed a new type of LISN (Line Impedance Stabilization Network or Artificial Mains Network) to stabilize the power line-to-ground impedance to get consistent measurement conditions. The LISN consists of feed-through capacitors and an disk type RF resistor. The measurements confirm the consistency in the impedance value which is maintained at 50 ohms in the frequency range from 1MHz to 500MHz. Thus the newly developed LISN improves consistency of measurement values at all locations, while it was difficult to obtain good correlation before employing the LISN. We feel confident that incorporation of the method discussed here in the pertinent technical standards of EMI measurements, such as CISPR, would lead to a major improvement in getting consistent measurements values.

  • Minimum-Width Method of Variable Ordering for Binary Decision Diagrams

    Shin-ichi MINATO  

     
    PAPER

      Vol:
    E75-A No:3
      Page(s):
    392-399

    Binary Decision Diagrams (BDDs) and Shared Binary Decision Diagrams (SBDDs), which are improved BDDs, are useful for implementing VLSI logic design systems. Recently, these representations, which are graph representations of Boolean functions, have become popular because of their efficiency in terms of time and space. The forms of the BDD vary with the order of the input variables though they represent the same function. The size of the graphs greatly depends on the order. The variable ordering algorithm is one of the most important issues in the application of BDDs. In this paper, we consider methods which reduce the graph size by reordering input variables on a given BDD with a certain variable order. We propose the Minimum-Width Method which gives a considerably good order in a practicable time and space. In the method, the order is determined by width of BDDs as a cost function. In addition, we show the effect of combining our method with the local search method, and also describe the improvement using the threshold. Experimental results show that our method can reduce the size of BDDs remarkably for most examples. The method needs no additional information, such as the topological information of the circuit. The results can be a measure for evaluation of other ordering methods.

  • Anechoic Chambers for EMI Test

    Yasutaka SHIMIZU  

     
    INVITED PAPER

      Vol:
    E75-B No:3
      Page(s):
    101-106

    Anechoic chambers have been effectively used for microwave propagation, electromagnetic interference (EMI) and immunity testing. The electromagnetic compatibility (EMC) problem has recently become serious and many of these chambers have been constructed. The results of a questionnaire survey sent to anechoic chamber manufacturers are described that a total of 450 anechoic chambers have been constructed in Japan since 1964. Twenty years ago the purpose of the chambers was microwave propagation research, but more than 50 each year have recently being built for EMC/EMI and immunity testing. Their size has gradually been reduced by the use of absorbing materials such as ferrite with dielectric materials. The lowest frequency of most chambers is 30MHz for the 3 m method of site attenuation.

  • Mechanism of Electromagnetic Radiation from a Transmission Line

    Yoshio KAMI  

     
    INVITED PAPER

      Vol:
    E75-B No:3
      Page(s):
    115-123

    Mechanism for radiation phenomenon caused by a finite-length transmission line is discussed. Coupling of an external wave to a transmission line has been studied by using a circuit concept because of a TEM transmission. Since the relationship between coupling and radiation is reciprocal, radiation can be treated by using the circuit concept. It is shown that the equations obtained by using the field theory are quite coincident with those by the circuit theory. From the resultant, it can be concluded that the radiated fields are composed of those by the line current of TEM and the terminal currents. A method for an application of the circuit concept to radiation due to a trace on a printed circuit board is studied by comparing the experimental results.

  • 3D Facial Model Creation Using Generic Model and Front and Side Views of Face

    Takaaki AKIMOTO  Yasuhito SUENAGA  

     
    PAPER-Image Processing, Computer Graphics and Pattern Recognition

      Vol:
    E75-D No:2
      Page(s):
    191-197

    This paper presents an automatic creation method of 3D facial models which are needed for facial image generation by 3D computer graphics. A 3D facial model of a specific person is obtained from just the front and side view images without any human operation. The method has two parts; feature extraction and generic model modification. In the feature extraction part, the regions or edges which express the facial features such as eyes, nose, mouth or chin outline are extracted from the front and side view images. A generic head model is then modified based on the position and shape of the extracted facial features in the generic model modification part. As a result, a 3D model for persons is obtained. By using the specific model and the front and side view images, texture-mapped facial images can be generated easily.

  • FOREWORD

    Masamitsu TOKUDA  Yoshio KAMI  Osamu FUJIWARA  Tamotsu NINOMIYA  

     
    FOREWORD

      Vol:
    E75-B No:3
      Page(s):
    99-100
  • FOREWORD

    Akira MATSUZAWA  

     
    FOREWORD

      Vol:
    E75-C No:3
      Page(s):
    279-279
  • Analysis of a New Quality Congestion Control Policy for an ATM Based ISDN

    Ahmed K. ELHAKEEM  H. T. MOUFTAH  Moghe JAYANT  Lian YE  

     
    PAPER-Communication Networks and Service

      Vol:
    E75-B No:3
      Page(s):
    193-206

    In this paper we analyze the performance of a congestion control scheme of the type adopted by CCITT Recommendations I. 15X. In this scheme, a reactive type of congestion control is applied at both the network and the user Network Interface (UNI) levels in an integrated services network of the ATM (Asynchronous Transfer Mode) type. Depending on the user type (loss or delay sensitive) the user will either lose or delay some cells so as to meet a certain network performance criteria. The numbers of users and qualities of each type admitted to the network are controlled by the statistical multiplexer. This together with a mechanism to subclassify users of each type according to their quality (or priority) and the user specified control constitute the combined quality/congestion control in ATM based networks.

  • Hierarchical Decomposition and Latency for Circuit Simulation by Direct Method

    Masakatsu NISHIGAKI  Nobuyuki TANAKA  Hideki ASAI  

     
    LETTER

      Vol:
    E75-A No:3
      Page(s):
    347-351

    For the efficient circuit simulation by the direct method, network tearing and latency techniques have been studied. This letter describes a circuit simulator SPLIT with hierarchical decomposition and latency. The block size of the latent subcircuit can be determined dynamically in SPLIT. We apply SPLIT to the MOS circuit simulation and verify its availability.

  • A BiCMOS Analog Neural Network with Dynamically Updated Weights

    Takayuki MORISHITA  Youichi TAMURA  Tatsuo OTSUKI  Gota KANO  

     
    PAPER

      Vol:
    E75-C No:3
      Page(s):
    297-302

    We have developed a 64-neuron electrically trainable BiCMOS analog neuroprocessor based on 3-layered PDP networks with a feedforward time as short as 10 µs which is equivalent to the operation speed as high as 108 multiplications per second. A crucial point in this development is application of a dynamic refreshment technique to a weighting circuit. A sufficiently long retention time of the synapse weight has thereby been attained, leading to a practical operation of the neuroprocessor.

  • Waveguide π-Junction with an Inductive Post

    Jiro HIROKAWA  Makoto ANDO  Naohisa GOTO  

     
    LETTER-Electromagnetic Theory

      Vol:
    E75-C No:3
      Page(s):
    348-351

    The authors propose a waveguide π-junction with an inductive post for the element of a multiple-way power divider in a single-layered slotted waveguide array. This π-junction splits part of the power into two branch waveguides through one coupling window, and can excite densely arrayed waveguides at equal phase and amplitude. The power dividing characteristics are analyzed by Galerkin's method of moments and are confirmed experimentally. Reflection from the π-junction is suppressed to the level below 30 dB over 5.4% bandwidth by attaching an inductive post.

  • Power-Sum Estimation of Electromagnetic Noise Radiated from High-Speed CMOS Printed Circuit Boards

    Osami WADA  Megumi KOSAKA  Hidemi OKA  Ryuji KOGA  Hiroya SANO  

     
    PAPER

      Vol:
    E75-B No:3
      Page(s):
    165-173

    A new approach is proposed to evaluate total electromagnetic noise radiated from a printed circuit board (PCB), and a result of experimental verification is given. The purpose is to represent the total radiation noise by summing up noises from elemental sources on a PCB, such as signal traces or ICs. Each of the elemental noise is calculated by an a priori noise model for each component of a PCB. Parameters of each noise model should be determined experimentally. Radiation sources on a digital PCB were found to be not only signal traces between ICs, but also package-side loops each of which is composed of an IC and a decoupling capacitor. Radiation noises from these two kinds of sources were evaluated separately. Experimental PCBs, which are two-layer PCBs mounting a few high-speed CMOS (HC) ICs, were prepared and radiation power from them was measured. Each PCB has a ground plane on one side, which simulates an internal ground plane in a multilayer PCB, and signal traces on it have a configuration of a microstrip transmission line. Electromagnetic noise caused by a high-speed CMOS gate is radiated impulsively during transition time as short as about 10ns. No significant interference was found between the noises from separate traces because each of the noise is impulsive and rarely overlaps each other. It is concluded that the total radiated power is represented by a simple sum of radiations from each traces without any interference to be taken into account.

  • Composite Noise Generator (CNG) with Random Pulse Stream (RPS) Generator for Immunity Test in Digital System

    Hideo SUZUKI  Hiroki SHIZUYA  Tasuku TAKAGI  

     
    PAPER

      Vol:
    E75-B No:3
      Page(s):
    183-187

    A random pulse stream (RPS) generator was developed for the noise immunity test of various digital system including communication system. By using this RPS generator along with the composite noise generator (CNG) developed formerly, the Middleton's "Class A" noise could be generated, and the total system (RPS+CNG) became more general noise simulator. In this paper, the configuration of CNG with newly developed RPS generator, and a typical example of Class A noise generated by this system are shown.

  • A Synthesis of Variable IIR Digital Filters

    Nobuo MURAKOSHI  Eiji WATANABE  Akinori NISHIHARA  

     
    PAPER

      Vol:
    E75-A No:3
      Page(s):
    362-368

    It is sometimes required to change the frequency characteristics of a digital filter during its operation. In this paper a new synthesis of variable even-order IIR digital filters is proposed. The cut-off frequency of the filter can be changed by a single parameter. The fundamental filter structure is a cascade of second-order sections. The multiplier coefficients of each section are determined by using the Taylor series expansion of the lowpass to lowpass frequency transformation. For this method any second-order section can be used as a prototype, but here in this paper only the direct form and the lattice form are described. Unlike the conventional method, any transfer functions can be used for the proposed method. Finally a designed example shows that the proposed filter has wider tuning range than the conventional filter, and the advantage of the proposed filters is confirmed.

  • Service Specification and Its Protocol Specifications in LOTOS--A Survey for Synthesis and Execution--

    Teruo HIGASHINO  

     
    INVITED PAPER

      Vol:
    E75-A No:3
      Page(s):
    330-338

    LOTOS is a language developed within ISO for the formal description of communication protocols and distributed systems. In LOTOS, requirements for a distributed system are called a "service specification". Each node exchanges synchronization messages to ensure the temporal ordering for the execution of events in a service specification. The actions of each node are described as a "protocol specification". This paper gives a survey for a method to derive protocol specifications from a service specification written in a LOTOS based language. In order to derive the protocol specifications, we make the syntax tree of a given service specification and give some attributes for each node in the tree. The protocol specifications are derived automatically by evaluating these attributes. The derived protocol specifications satisfy the given service specification. We also explain a LOTOS simulator for the execution of derived protocol specifications. The related works are also summarized.

39921-39940hit(42756hit)