In the literatures [5] and [10], a systematic discussion is presented with respect to the optimum interpolation of multi-dimensional signals. However, the measures of error in these literatures are defined only in each limited block separately. Further, in these literatures, most of the discussion is limited to theoretical treatment and, for example, realization of higher order linear phase FIR filter bank is not considered. In this paper, we will present the optimum interpolation functions minimizing various measures of approximation error simultaneously. Firstly, we outline necessary formulation for the time-limited interpolation functions ψm(t) (m=0,1,. . . ,M-1) realizing the optimum approximation in each limited block separately, where m are the index numbers for analysis filters. Secondly, under some assumptions, we will present analytic or piece-wise analytic interpolation functions φm(t) minimizing various measures of approximation error defined at discrete time samples n=0, 1, 2,. . . . In this discussion, φm(n) are equal to ψm(n) n=0, 1, 2,. . . . Since ψm(t) are time-limited, φm(n) vanish outside of finite set of n. Hence, in designing discrete filter bank, one can use FIR filters if one wants to realize discrete synthesis filters which impulse responses are φm(n). Finally, we will present one-dimensional linear phase M channel FIR filter bank with high attenuation characteristic in each stop band. In this design, we adopt the cosine-sine modulation initially, and then, use the iterative approximation based on the reciprocal property.
Shigeo URUSHIDANI Shigeki HINO Yusuke OHTOMO Sadayuki YASUDA
This paper describes the design and evaluation of a high-performance multicast ATM switch and its feasibility study, including its 40 Gbit/s LSI packaging. The multicast switch is constructed using a serial combination of rerouting networks and employs an adapted Boolean interval-splitting scheme for a generalized self-routing algorithm. Analysis and computer simulation results show that the cell loss probability is easily controlled by increasing the number of switching stages. It is shown that the switch configuration can be transformed into other patterns to be built from banyan-based subnetworks of arbitrary size for LSI packaging. It is also shown that an LSI chip integrating an 88 banyan-based subnetwork using 0. 25-µm CMOS/SIMOX technology can attain a 40-Gbit/s switching capability.
Mohammad ALIMUDDIN Hussein M. ALNUWEIRI
This paper proposes a number of simple, yet very effective, cell switching architectures that employ shared memory as a basic switching component. Employing small shared-memory switching has several major advantages. First, by taking advantage of commercially available memory technologies, ATM switch design can be simplified to determining a suitable shared-memory module size, and identifying a proper interconnection among the modules. In this way, switch architectures can be reusable and able to evolve as memory technology advances. Second, shared memory greatly enhances buffer space utilization, allows the implementation of flexible and fair buffer allocation policies for multiple services. The switch architectures presented in this paper offer a number of alternative shared buffering schemes including, shared output, input with shared output, and multistage shared buffering. The proposed architectures employ simple, self-routing, interconnection fabrics. We present several simulation results that demonstrate the superior performance of our switch architectures under uniform, bursty, and non-uniform (or hot-spot) input traffic.
Hitoshi HAYASHI Masahiro MURAGUCHI
This paper proposes a novel broad-band MMIC VCO using an active inductor. This VCO is composed of a serial resonant circuit, in which the capacitor is in series with an active inductor that has a constant negative resistance. Since the inductance value of this active inductor is inversely proportional to the square of the transconductance and can vary widely with the FETs gate bias control, a broad-band oscillation tuning range can be obtained. Furthermore, since this active inductor can generate a constant negative resistance of more than 50Ω, the proposed VCO can oscillate against a 50Ω output load immediately without using additional impedance transformers. We have fabricated the VCO using a GaAs MESFET process. A frequency tuning range of more than 50%, from 1.56 to 2.85 GHz, with an output power of 4.41.0 dBm, was obtained. With a carrier of 2. 07 GHz, the phase noise at 1-MHz offset was less than -110 dBc/Hz. The chip size was less than 0. 61 mm2, and the power consumption was 80 mW. This broad-band analog design can be used at microwave frequencies in PLL applications as a compact alternative to other types of oscillator circuits.
Osamu KAGAMI Kazuji WATANABE Teruaki YOSHIDA
A new broadband space diversity (B-SD) combining method, which is a key technique in the growth of digital microwave radio system, is proposed. In this B-SD combining method, two received signals, whose bandwidths are 280 MHz, are combined. To develop this combining method, an optimum control algorithm is developed that monitors power levels of all primary carriers and controls the endless phase shifter so that the higher level signal is decreased and the lower level signal is increased. This paper describes the proposed B-SD combining method which effectively operates over a wide bandwidth. Performance evaluations based on simulations and theoretical estimations are given. It is proven that this combining method offers the same performance obtained by the conventional narrowband SD combining method and can be applied to over 50% cases of the propagation paths observed in Japan. The suitability of the proposed combining method and the calculation methods adopted is demonstrated experimentally.
In this paper, a design concept that offers ATM-VP connections with different protection levels is presented. The users have the choice to select the protection level they wish, the network transport service they need, and the worst cell loss they can tolerate at call set up time, and pay accordingly. Besides, an advanced adaptive traffic control scheme that simplifies call and cell processing is also presented. Many important functions such as call admission, VC-bandwidth reservation, cell-level congestion control, etc. are efficiently performed at the boundary of the backbone network. In this way is given a suitable answer to the important question: "How can future telecommunication networks based on ATM provide services with customized availability ?" A platform that outlines the potential interaction between restoration methods and congestion avoidance schemes is also obtained.
Hiroki NAKAJIMA Masahiro MURAGUCHI
A single-stage dual-frequency matching network that can simultaneously transform a transistor reflection coefficient to zero at two separate frequencies (a lower frequency fL and a higher frequency fH) is proposed. The network is made by adding a shorted stub, the length of which is a quarter-wavelength at fH, to a conventional L-section matching network composed of a series transmission line and an open stub. The concept of dual-frequency matching is based on the fact that the synthesized shunt admittance of the open and shorted stubs changes from capacitive at fH to inductive at fL. By means of the single-stage matching network, broad-band amplifier performance, the bandwidth of which is given as (fH-fL), can be easily obtained with almost the same design procedures and circuit area used for conventional narrow-band amplifiers. In this paper, the function of the dual-frequency matching network is analyzed in detail and an application of the matching technique to a two-stage amplifier is described. A broad-band performance of |S21|>7.4 dB at 27.0-62.5 GHz has been achieved with a GaAs P-HEMT two-stage MMIC amplifier.
Koichi MURATA Taiichi OTSUJI Mikio YONEYAMA Masami TOKUMITSU
The authors report on a 40-Gbit/s superdynamic decision IC fabricated with 0.12-µm GaAs MESFETs. The key to attaining high-speed decision IC is not only high-speed flip-flop circuits but also wideband input and output buffer circuits. 40 Gbit/s is the fastest operating speed of decision ICs fabricated with GaAs MESFETs.
This letter proposes and investigates a method of estimating the direction of arrival (DOA) of wideband signals such as spread spectrum signals, in a multipath channel. The DOA estimation method can reduce the effect of signal distortion due to bandwidth of signals by creating a spatial spectrum wihch satisfies the sampling theory in the time domain. The DOA estimate calculated from this spatial spectrum is robust against signal distortion due to multipath. Computer simulations numerically evaluate the proposed method. In comparison with conventional MUSIC algorithm, the proposed method achieves superior performance in a multipath channel.
Hiroyasu ISHIKAWA Hideyuki SHINONAGA Hideo KOBAYASHI
A wireless communications system with a transmission rate of 10 Mbit/s using Japanese ISM band (2471-2497 MHz) is presented. This system employs a novel spread spectrum multiple access method named "CFO-SS (Carrier Frequency Offset-Spread Spectrum)" method. In the CFO-SS system, a single PN code is commonly assigned to all the multiple carriers, and the frequency offset between the carriers is determined by the information symbol rate, which is small as compared with the spread bandwidth of the signal. Bit error rate performance of the proposed CFO-SS system under multipath environments is investigated by computer simulation, and the performance of the CFO-SS method is confirmed for wireless LAN systems using the 2.4 GHz ISM band.
Eisuke KUDOH Isao OKAZAKI Shigeaki OGOSE
TPC (transmission power control) can compensate the near-far problem and so is a key technology of DS (direct sequence) -CDMA (code divison multiple access) systems. There are two kinds of TPC. One is closed loop and the other is open loop. In practical systems, both methods are used to compensate the variation in reception signal level. However, adoption of one simple TPC scheme is preferable from the viewpoint of transceiver configuration at the BS (base station) and MSs (mobile stations). Reception signal variation in wide-band DS-CDMA systems is shallower and we have the possibility of using only open loop as the TPC method. To evaluate the TPC accuracy of open loop, it becomes important to estimate the lower bound of TPC error because TPC error directly influences user capacity. This paper evaluates the lower bound of open loop TPC error by a theoretical analysis and laboratory tests; both results agree well. It is found that as the average power difference between paths increases, the lower bound of open loop TPC error increases. Ir is also found if the number of paths increases, the lower bound of open loop TPC error decreases. If the number of paths is 10 and the power difference between the nearest paths is less than 0.2 dB, the lower bound of open loop TPC error is larger than 1 dB. When the TPC error is larger than 1 dB, the reduction in user capacity is above 30%.
Chih-ping LIN Motoaki SANO Matsuo SEKINE
Fractals provide a good description of natural scenes and objects based on their statistically self-similar property. They are also used to discriminate natural or man-made objects because natural objects have a better fitting to the fractional Brownian motion (fBm) model than artificial objects. Sea clutter as natural phenomena well fit to the fBm to induce little error. On the other hand, targets as man-made objects induce much more error because they frequently deviate from the fBm model. Therefore, the fractal error has a good characteristic to detect targets buried in clutter. We modified the fractal error defined by Cooper to be suitable for radar image processing. For the X-band radar image, the performance of our proposed method is comparable to that of the Cooper's method. For the millimeter wave (MMW) radar images, our method is better than the Cooper's one.
Zhewang MA Taku YAMANE Eikichi YAMASHITA
Characterization of a mitered, a squarely cut, and a circular E-plane bend in rectangular waveguide is implemented by combining the port reflection coefficient method and the mode-matching method. Based on the port reflection coefficient method, the two-port waveguide bend is converted to a one-port structure comprised of cascaded waveguide step-junctions. After solving the reflection coefficient caused by these waveguide step-junctions using the mode-matching method, the desired scattering parameters of the bend are obtained readily. Convergence properties of the calculated numerical results are validated. Influences of the mitered, the squarely cut, and the circular part of the bend on the scattering parameters are investigated, and the optimal design dimensions for realizing wide-band and low return loss bends are found. Based on the optimal compensation dimension, an E-plane waveguide circular bend is fabricated and tested. The measured result agrees well with the theoretical prediction, and a full-band matched bend is practically realized.
A design methodology of the analog currentmode bandwidth programmable integrator for a low voltage (3V) and low power application is developed and the integrator designed by this method is successfully fabricated by a 0.8µm CMOS n-well single poly/double metal process. The integrator ocuppies the active chip area of 0.3mm2. The experimental result illustrates a low power dissipation (1.0mW-3.55mW), 65dB of the dynamic range, and bandwidth programmability (10MHz-30MHz) with an external digital 4bit.
Kyoohyun LIM Seung Hee CHOI Beomsup KIM
This paper presents a salient method to find an optimal bandwidth for low noise phase-locked loop (PLL) applications by analyzing a discrete-time model of charge-pump PLLs based on ring oscillator VCOs. The analysis shows that the timing jitter of the PLL system depends on the jitter in the ring oscillator and an accumulation factor which is inversely proportional to the bandwidth of the PLL. Further analysis shows that the timing jitter of the PLL system, however, proportionally depends on the bandwidth of the PLL when an external jitter source is applied. The analysis of the PLL timing jitter of both cases gives the clue to the optimal bandwidth design for low noise PLL applications, Simulation results using a C-language PLL model are compared with the theoretical predictions and show good agreement.
In this paper, we propose a new switching network architecture with output queueing, The proposed switch, FBSF (FAB Banyan Switching Fabrics) can deliver up to 2r packets simultaneously destined for the same outlet in a single time slot. The switch fabrics consist of Batcher sorter, a radix-r double shuffle network r-packet distributors, two FAB networks, and output buffer modules. The performance of the switch fabric is evaluated by measures of throughput, average queue length, average waiting time, and packet loss rate. Numerical and simulation results indicate that the switch exhibits very good delay-throughput performance over a wide range of input traffic.
Yoichi MATSUMOTO Takeyuki NAGURA Masahiro UMEHIRA
This paper proposes a differentially-coded-quadrature-phase-shift-keying (DQPSK) coherent demodulator using a new simultaneous carrier and bit-timing recovery scheme (SCBR). The new DQPSK SCBR (DSCBR) scheme works with a frequently used preamble, whose baseband signal alternates between two diagonal decision points, for example, a repeated bit-series of "1001." With the DSCBR scheme, the proposed demodulator achieves a significantly agile carrier and bit-timing recovery using an open-loop approach with a one-part preamble. To illustrate this, a preamble of 8 symbols is applicable with the Eb/No degradation from the theory over AWGN of 0.2 dB. It is also shown that the proposed demodulator achieves an improvement in the required Eb/No of more than 2 dB over differential detection over Ricean fading communication channels. The channels are modeled for wireless broadband communication systems with directional antennas or line of sight (LOS) paths. This paper concludes that the proposed demodulator is a strong candidate for receivers in wireles broadband communication systems.
Fernando Gil V. RESENDE,Jr Paulo S.R. DINIZ Keiichi TOKUDA Mineo KANEKO Akinori NISHIHARA
A new cost function based on multi-band decomposition of the estimation error and application of a different step-size for each band is used in connection with the least-mean-square criterion to improve the fidelity of estimates as compared to those obtained with conventional least-mean-square adaptive algorithms. The basic new idea is to trade off time and frequency resolutions of the adaptive algorithm along the frequency domain by using different step-sizes in the analysis of distinct frequencies in accordance with the frequency-localized statistical behavior of the imput signal. The mathematical background for a stochatic approach to the multi-band decomposition-based scheme is presented and algorithms with fixed and variable step-sizes are derived. Computer experiments compare the performance of multiband and conventional least-mean-square methods when applied to system identification.
Xi ZHANG Toshinori YOSHIKAWA Hiroshi IWAKURA
This paper presents a new method for constructing orthonormal wavelet bases with vanishing moments based on general IIR filters. It is well-known that orthonormal wavelet bases can be generated by paraunitary filter banks. Then, synthesis of orthonormal wavelet bases can be reduced to design of paraunitary filter banks. From the orthonormality and regularity of wavelets, we derive some constraints to IIR filter banks, and investigate relations between the constrained filter coefficients and its zeros and poles. According to these relations, we can apply Remez exchange algorithm in stopband directly, and formulate the design problem in the form of an eigenvalue problem. Therefore, a set of filter coefficients can be easily computed by solving the eigenvalue problem, and the optimal filter coefficients with an equiripple response can be obtained after applying an iteration procedure. The proposed procedure is computationally efficient, and the number of vanishing moments can be arbitrarily specified.
Shuitsu MATSUMURA Fumihiko MURATA Tsuyoshi TAKEBE
This paper describes a design technique of perfect reconstruction (PR) two-channel IIR filter bank. M.J.T. Smith et al., gave two types of PR IIR filter bank systems. One is the system such that the analysis and synthesis filters with nonlinear phase are implemented with all-pass polyphase filters and satisfy the power complementary condition approximately. The other is the system such that all the analysis and synthesis filters have liner phase responses and do not satisfy the power complementary condition. To improve coding performance, we propose a filter bank system such that all the analysis and synthesis filters have linear phase and satisfy the power complementary condition approximately.