In this paper, we propose a new class of ID-based non-interactive key sharing scheme with a trusted center which generate a common key on the basis of a linear combination of the center secrets. We also discuss the security of the proposed schemes, and show that the proposed schemes prevent the conventional collusion attack, by adding another random integers unique to each user, on the secret vector that is assigned to the user. Furthermore, we present a new type of a statistical collusion attack which is more suitable for the proposed schemes. We also present the lower bound of the threshold of the statistical collusion attack on the proposed schemes. The proposed schemes can be easily implemented compared with other schemes as they require only computing of the inner product of two vectors over finite ring (including finite field) and an Euclidean quotient, for generating the common key. Our proposed schemes can be regarded as modified versions of the Blom's original scheme. However our proposed schemes are secure against our new type of the attack, as well as the collusion attack based on the solving of the linear equations, although Blom's scheme is insecure against both of these collusion attacks.

Telecommunications management is essentially an aggregation of a wide range of activities, including operations and management (O & M) of telecommunications services and customers as well as the network and network elements. During the period of rapid growth in telecommunications, the highest priority was to meet increasing market demand and to construct a telecommunications network infrastructure. Therefore, research and development in telecommunications management were subordinated to the evolution of telecommunications services and systems. Recently, customers have been demanding higher quality services, as a variety of new, advanced services have been introduced. This has led to the need to integrate telecommunications services and O & M services. This paper first reviews the history of the development of telecommunications O & M in parallel with the progress of telecommunications in Japan and clarifies specific features in each step of this progress. This analysis identifies urgent problems and their solutions. The results suggests that telecommunications O & M and O & M services should be considered as a key to making future services possible and to the value of those services in a multi-media telecommunications services environment. Based on these studies, the future direction of O & M is then shown, focusing on cooperative O & M involving the customer in the multi-media, multidomain telecommunications environment.

Laser diodes for optical interconnections are ideally high speed, work over a wide temperature range, and are simple to bias. This paper reports high bit-rate modulation with nearly zero bias with very low threshold 1.3µm-wavelength laser diodes over a wide temperature range. At the high temperature of 80, lasing delay was 165 ps with nearly zero bias. We demonstrated 2.5 Gbit/s modulation over a wide temperature range. Eye opening was over 34% of one time slot.

This paper presents an analysis of the control characteristics of the series resonant converter with a parallel resonant circuit, especially under parallel resonant frequency. Operations of the circuit are classified into several modes. The control characteristics are calculated using the equations derived from equivalent circuits, and are verified by the experiments. From the analysis, the mechanism of a jumping phenomenon in the closed-loop control characteristics is clarified.

A programmable clock generator, based on a phase-locked loop (PLL) circuit, has been developed with 0.5 µm CMOS triple-layer Al interconnection technology for use as an on-chip clock generator in a 300-MHz video signal processor. The PLL-based clock generator generates a clock signal whose frequency ranges from 50 to 350 MHz which is an integral multiple, from 2 to 16, of an external clock frequency. In order to achieve stable operation within this wide range, a voltage controlled oscillator (VCO) with selectable low VCO gain characteristics has been developed. Experimental results show that the clock generator generates a 297-MHz clock with a 27-MHz external clock, with jitter of 180 ps and power dissipation of 120 mW at 3.3-V power supply, and it can also oscillate up to 348 MHz with a 31.7-MHz external clock.

In this letter a new method for controlling chaos is proposed. Although different several methods based on the OGY- and the OPF-method perturb a value of an accessible system parameter, the proposed method perturbs the only timing of switching three values of a parameter. We apply the proposed method to the well-known Chua's circuit on computer simulations. The chaotic orbits in the Rössler type- and the double scroll type-attractor can be stabilized on several unstable periodic orbits embedded within these attractors.

A 3.2 GHz, 50 mW, 1 V, GaAs clock pulse generator (CG) based on a phase-locked loop (PLL) circuit has been designed for use as an on-chip clock generator in future high speed processor LSIs. 0.5 µm GaAs MESFET and DCFL circuit technologies have been used for the CG, which consists of 224 MESFETs. An "enhanced charge-up current" inverter has been specially designed for a low power and high speed voltage controlled oscillator (VCO). In this new inverter, a voltage controlled dMESFET is combined in parallel with the load dMESFET of a conventional DCFL inverter. This voltage controlled dMESFET produces an additional charge-up current resulting in the new VCO obtaining a much higher oscillation frequency than that of a ring oscillator produced with a conventional inverter. With a single 1 V power supply (Vdd), SPICE calculation results showed that the VCO tuning range was 2.25 GHz to 3.65 GHz and that the average VCO gain was approximately 1.4 GHz/V in the range of a control voltage (Vc) from 0 to 1 V. Simulation also indicated that at a Vdd of 1 V the CG locked on a 50 MHz external clock and generated a 3.2 GHz internal clock (=50 MHz64). The jitter and power dissipation of the CG at 3.2 GHz oscillation and a Vdd of 1 V were less than 8.75 psec and 50 mW, respectively. The typical lock range was 2.90 GHz to 3.59 GHz which corresponded to a pull-in range of 45.3 MHz to 56.2 MHz.

In this letter an SR-latch circuit using Hopfield neural networks is introduced. An energy function suited for a neural SR-latch circuit is defined for which the global convergence is guaranteed. We also demonstrate how to compose master-slave (M/S) SR- and JK-flip flops of novel SR-latch circuits, and further an asynchronous binary counter of M/S JK-flip flops. Computer simulations are included to illustrate how each presented circuit operates.

This paper presents a method, called reduced scan shift, which generates short test sequences for full scan circuits. In this method, scan shift operations can be reduced, i.e., not all but part of flip-flops (FFs) are controlled and observed. This method, unlike partial scan methods, does not decrease fault coverage. In the reduced scan shift, test vectors for the combinational part of a circuit are fistly generated. Since short test sequence will be obtained from the small test vectors set, test compaction techniques are used in the test vector generation. For each test vector in the obtained test set, it is found which FFs should be controlled or observed. And then a scan chain is configured so that FFs more frequently required to be controlled (observed) can be located close to the scan input (output). After the scan chain is configured, the scan shift requirement is examined for the essential faults of each test vector. Essential fault is defined to be a fault which is detected by only one test vector but not other test vectors. The order of test vectors is carefully determined by comparing the scan control requirement of a test vector with the scan observation requirement of another test vector so that unnecessary scan shift operations only for controlling or observing FFs can be reduced. A method of determining the order of test vectors with state transition is additionally described. The effectiveness of the proposed method is shown by the experimental results for benchmark circuits.

Video compression technologies such as MPEG have enabled the efficient use of video data in the computer environment. However, the compressed video information still has a huge amount of data compared with the other media such as text, audio, and graphics. Therefore, it is very important to handle the video information in a networked database for the efficient use of resources like storage media. Furthermore, in the networked database, its retrieval methods including search and delivery become the key issues especially for the video information which requires a large network bandwidth. In this paper, a video browsing method using an automatic fast scene cut detection for networked video database access is described. The scene cut is defined as the scene change frame and is detected by temporal change in interframe luminance difference and chrominance correlation which are obtained from spatio-temporally scaled image directly extracted from the MPEG compressed video without any complex processing of video decoding. The detected scene change frames are further investigated to exploit the relationship between the scene cuts and are classified in order to make a hierarchical indexing. These results of detection are stored as an scene index file using the MPEG format. The simulation results are also presented for several test video sequences to show that these methods have enabled the efficient video database construction and accessing.

In this paper, chaos synchronization in coupled discrete-time dynamical systems is studied. Computer results display the interesting synchronization behaviors in the mutually coupled systems. As possible applications of chaos synchronization, parameter estimations and secure communications are proposed. Furthermore, a modified OGY method is given, which converts a chaotic motion into a periodic motion.

An emitter–coupled pair with a dynamic bias current and a source–coupled pair with a dynamic bias current are proposed as an exponential–law element and a square–law element that operate as a floating bipolar junction transistor (BJT) and a floating MOS field–effect transistor (MOSFET). In bipolar technology, a hyperbolic sine function circuit and a hyperbolic cosine function circuit are easily obtained by subtracting and summing the output currents of two symmetrical exponential–law elements with positive and negative input signals. In the same manner, an operational transconductance amplifier (OTA) and a squaring circuit are obtained by subtracting and summing the output currents of two symmetrical square-law elements with positive and negative input signals in CMOS technology. The proposed OTA and squaring circuit possess the widest input voltage range ever reported.

We introduce recurrent networks that are able to learn chaotic maps, and investigate whether the neural models also capture the dynamical invariants (Correlation Dimension, largest Lyapunov exponent) of chaotic time series. We show that the dynamical invariants can be learned already by feedforward neural networks, but that recurrent learning improves the dynamical modeling of the time series. We discover a novel type of overtraining which corresponds to the forgetting of the largest Lyapunov exponent during learning and call this phenomenon dynamical overtraining. Furthermore, we introduce a penalty term that involves a dynamical invariant of the network and avoids dynamical overtraining. As examples we use the Hnon map, the logistic map and a real world chaotic series that correspond to the concentration of one of the chemicals as a function of time in experiments on the Belousov–Zhabotinskii reaction in a well–stirred flow reactor.

For medical imaging, non-rigid motion analysis of the heart deformability is a nontrivial problem. This paper introduces a new method to analyze the gated SPECT (Single Photon Emission Computed Tomography) imges for 3-D motion information of left ventricular. Our motion estimation method is based on a new concept called normal direction constraint" in that the normal of a surface patch of some deforming objects at certain time instant is constant. This paper consists of the following processes: contour extraction, slices interpolation, normal vector field generation, expanding process, motion estimation for producing a 2-D motion vector field, and deprojection for a 3-D motion vector field. In the experiments, we will demonstrate the accuracy of our method in analyzing the 3-D motion field of deforming object.

More than 200 papers, two special issues (Journal of Circuits, Systems, and Computers, March, June, 1993, and IEEE Trans. on Circuits and Systems, vol.40, no.10, October 1993), an International workshop on "Chua's Circuit: chaotic phenomena and applications" at NOLTA'93, and a book (Edited by R. N. Madan, World Scientific, 1993) on Chua's circuit have been published since its inception a decade ago. This review paper attempts to present an overview of these timely publications, almost all within the last 6 months, and to identify four milestones of this very active research area. An important milestone is the recent fabrication of a monolithic Chua's circuit. The robustness of this IC chip demonstrates that an array of Chua's circuits can also be fabricated into a monolithic chip, thereby opening the floodgate to many unconventional applications in information technology, synergetics, and even music. The second milestone is the recent global unfolding of Chua's circuit, obtained by adding a linear resistor in series with the inductor to obtain a canonical Chua's circuit--now generally referred to as Chua's oscillator. This circuit is most significant because it is structurally the simplest (it contain only 6 circuit elements) but dynamically the most complex among all nonlinear circuits and systems described by a 21–parameter family of continuous odd–symmetric piecewise–linear vector fields. The third milestone is the recent discovery of several important new phenomena in Chua's Circuits, e.g., stochastic resonance, chaos–chaos type intermittency, 1/f noise spectrum, etc. These new phenomena could have far-reaching theoretical and practical significance. The fourth milestone is the theoretical and experimental demonstration that Chua's circuit can be easily controlled from a chaotic regime to a prescribed periodic or constant orbit, or it can be synchronized with 2 or more identical Chua's circuits, operating in an oscillatory, or a chaotic regime. These recent breakthroughs have ushered in a new era where chaos is deliberately created and exploited for unconventional applications, e.g., secure communication.

A MOS VCO which has improved linearity of oscillation frequency versus control voltage and has no 1/2 divider is studied. The improved VCO characteristic has been obtained by the use of only two additional transistors, one of which has a role of a load and another of which has a role of a control current source in a differential type delay cell.

We present a novel algorithm to reconstruct the refractive-index profile of a circularly symmetric object from measurements of the electromagnetic field scattered when the object is illuminated by a plane wave. The reconstruction algorithm is besed on an iterative procedure of matching the scattered field calculated from a certain refractive-index distribution with the measured scattered field on the boundary of the object. In order to estimate the convergence of the reconstruction, the mean square error between the calculated and measured scattered fields is introduced. It is shown through reconstructing several examples of lossy dielectric cylinders that the algorithm is quite stable and is applicable to high-contrasty models in situations where the Born approximation is not valid.

The design theory was revealed by theoretical analysis of the measuring apparatus, and was confirmed experimentally. Higher quality tags having new circuit disigns were proposed by the revealed theory. The measuring apparatus equivalent to the security system was produced to estimate the properties of the LC resonant circuit security tags quantitatively.

Telecommunication services are becoming more and more personalized, integrated, and refined. Advanced personal and mobile telecommunication services, intelligent networks, and network management operations require cooperative network-wide distributed processing on a very large scale. Telecommunication programs must support these services with great flexibility, efficiency, and reliability. This paper proposes a new call processing model that improves the availability and flexibility of telecommunication programs. It first points out requirements, outlines the distributed processing platform PLATINA, and discusses several approaches to the enhanced call processing model. Then it explains the call processing program structure, and gives illustrations of mobile and multi- party service control as typical examples. The Caller-Callee decomposition reduces the complexity of the call processing program and enhances the call model; the separation of call and bearer enhances service flexibility and integration; distributed object-oriented techniques meet software evolution requirements. A prototype program has been implemented and has proved the effectiveness of this approach.

Transistor stuck–open faults in CMOS devices are such that they force combinational circuits to exhibit sequential behaviors. It has been proved that, in general, stuck–open faults can not be modeled as stuck–at faults and, therefore, a sequence of two consecutive test vectors is necessary to guarantee stuck–open fault detection. In this paper we propose a technique to modify CMOS circuits in such a way that any stuck–open fault in the circuit can be detected using only a single test pattern. The amount of additional logic required to achieve the goal is rather limited: Two pass transistors, one input line, and one inverter (or buffer) at the output of the circuit are sufficient to make stuck–open faults detectable by test patterns generated by usual stuck–at fault test generators.