The search functionality is under construction.
The search functionality is under construction.

Keyword Search Result

[Keyword] Cu(4264hit)

61-80hit(4264hit)

  • A Single-Inverter-Based True Random Number Generator with On-Chip Clock-Tuning-Based Entropy Calibration Circuit

    Xingyu WANG  Ruilin ZHANG  Hirofumi SHINOHARA  

     
    PAPER

      Pubricized:
    2023/07/21
      Vol:
    E107-A No:1
      Page(s):
    105-113

    This paper introduces an inverter-based true random number generator (I-TRNG). It uses a single CMOS inverter to amplify thermal noise multiple times. An adaptive calibration mechanism based on clock tuning provides robust operation across a wide range of supply voltage 0.5∼1.1V and temperature -40∼140°C. An 8-bit Von-Neumann post-processing circuit (VN8W) is implemented for maximum raw entropy extraction. In a 130nm CMOS technology, the I-TRNG entropy source only occupies 635μm2 and consumes 0.016pJ/raw-bit at 0.6V. The I-TRNG occupies 13406μm2, including the entropy source, adaptive calibration circuit, and post-processing circuit. The minimum energy consumption of the I-TRNG is 1.38pJ/bit at 0.5V, while passing all NIST 800-22 and 800-90B tests. Moreover, an equivalent 15-year life at 0.7V, 25°C is confirmed by an accelerated NBTI aging test.

  • Robust Recursive Identification of ARX Models Using Beta Divergence

    Shuichi FUKUNAGA  

     
    LETTER-Systems and Control

      Pubricized:
    2023/06/02
      Vol:
    E106-A No:12
      Page(s):
    1580-1584

    The robust recursive identification method of ARX models is proposed using the beta divergence. The proposed parameter update law suppresses the effect of outliers using a weight function that is automatically determined by minimizing the beta divergence. A numerical example illustrates the efficacy of the proposed method.

  • Secure Enrollment Token Delivery Mechanism for Zero Trust Networks Using Blockchain Open Access

    Javier Jose DIAZ RIVERA  Waleed AKBAR  Talha AHMED KHAN  Afaq MUHAMMAD  Wang-Cheol SONG  

     
    PAPER

      Pubricized:
    2023/06/01
      Vol:
    E106-B No:12
      Page(s):
    1293-1301

    Zero Trust Networking (ZTN) is a security model where no default trust is given to entities in a network infrastructure. The first bastion of security for achieving ZTN is strong identity verification. Several standard methods for assuring a robust identity exist (E.g., OAuth2.0, OpenID Connect). These standards employ JSON Web Tokens (JWT) during the authentication process. However, the use of JWT for One Time Token (OTT) enrollment has a latent security issue. A third party can intercept a JWT, and the payload information can be exposed, revealing the details of the enrollment server. Furthermore, an intercepted JWT could be used for enrollment by an impersonator as long as the JWT remains active. Our proposed mechanism aims to secure the ownership of the OTT by including the JWT as encrypted metadata into a Non-Fungible Token (NFT). The mechanism uses the blockchain Public Key of the intended owner for encrypting the JWT. The blockchain assures the JWT ownership by mapping it to the intended owner's blockchain public address. Our proposed mechanism is applied to an emerging Zero Trust framework (OpenZiti) alongside a permissioned Ethereum blockchain using Hyperledger Besu. The Zero Trust Framework provides enrollment functionality. At the same time, our proposed mechanism based on blockchain and NFT assures the secure distribution of OTTs that is used for the enrollment of identities.

  • Antennas Measurement for Millimeter Wave 5G Wireless Applications Using Radio Over Fiber Technologies Open Access

    Satoru KUROKAWA  Michitaka AMEYA  Yui OTAGAKI  Hiroshi MURATA  Masatoshi ONIZAWA  Masahiro SATO  Masanobu HIROSE  

     
    INVITED PAPER

      Pubricized:
    2023/09/19
      Vol:
    E106-B No:12
      Page(s):
    1313-1321

    We have developed an all-optical fiber link antenna measurement system for a millimeter wave 5th generation mobile communication frequency band around 28 GHz. Our developed system consists of an optical fiber link an electrical signal transmission system, an antenna-coupled-electrode electric-field (EO) sensor system for 28GHz-band as an electrical signal receiving system, and a 6-axis vertically articulated robot with an arm length of 1m. Our developed optical fiber link electrical signal transmission system can transmit the electrical signal of more than 40GHz with more than -30dBm output level. Our developed EO sensor can receive the electrical signal from 27GHz to 30GHz. In addition, we have estimated a far field antenna factor of the EO sensor system for the 28GHz-band using an amplitude center modified antenna factor estimation equation. The estimated far field antenna factor of the sensor system is 83.2dB/m at 28GHz.

  • Heuristic-Based Service Chain Construction with Security-Level Management

    Daisuke AMAYA  Takuji TACHIBANA  

     
    PAPER

      Pubricized:
    2023/07/27
      Vol:
    E106-B No:12
      Page(s):
    1380-1391

    Network function virtualization (NFV) technology significantly changes the traditional communication network environments by providing network functions as virtual network functions (VNFs) on commercial off-the-shelf (COTS) servers. Moreover, for using VNFs in a pre-determined sequence to provide each network service, service chaining is essential. A VNF can provide multiple service chains with the corresponding network function, reducing the number of VNFs. However, VNFs might be the source or the target of a cyberattack. If the node where the VNF is installed is attacked, the VNF would also be easily attacked because of its security vulnerabilities. Contrarily, a malicious VNF may attack the node where it is installed, and other VNFs installed on the node may also be attacked. Few studies have been done on the security of VNFs and nodes for service chaining. This study proposes a service chain construction with security-level management. The security-level management concept is introduced to built many service chains. Moreover, the cost optimization problem for service chaining is formulated and the heuristic algorithm is proposed. We demonstrate the effectiveness of the proposed method under certain network topologies using numerical examples.

  • Effect of Return Current Cable in Three Different Calibration Environments on Ringing Damped Oscillations of Contact Discharge Current Waveform from ESD Generator

    Yukihiro TOZAWA  Takeshi ISHIDA  Jiaqing WANG  Osamu FUJIWARA  

     
    PAPER-Electromagnetic Compatibility(EMC)

      Pubricized:
    2023/09/06
      Vol:
    E106-B No:12
      Page(s):
    1455-1462

    Measurements of contact discharge current waveforms from an ESD generator with a test voltage of 4kV are conducted with the IEC specified arrangement of a 2m long return current cable in different three calibration environments that all comply with the IEC calibration standard to identify the occurrence source of damped oscillations (ringing), which has remained unclear since contact discharge testing was first adopted in 1989 IEC publication 801-2. Their frequency spectra are analyzed comparing with the spectrum calculated from the ideal contact discharge current waveform without ringing (IEC specified waveform) offered in IEC 61000-4-2 and the spectra derived from a simplified equivalent circuit based on the IEC standard in combination with the measured input impedances of one-ended grounding return current cable with the same arrangement in the same calibration environment as those for the current measurements. The results show that the measured contact discharge waveforms have ringing around the IEC specified waveform after the falling edge of the peak, causing their spectra from 20MHz to 200MHz, but the spectra from 40MHz to 200MHz significantly differ depending on the calibration environments even for the same cable arrangement, which do not almost affect the spectra from 20MHz to 40MHz and over 200MHz. In the calibration environment under the cable arrangement close to the reference ground, the spectral shapes of the measured contact discharge currents and their frequencies of the multiple peaks and dips roughly correspond to the spectral distributions calculated from the simplified equivalent circuit using the measured cable input impedances. These findings reveal that the root cause of ringing is mainly due to the resonances of the return current cable, and calibration environment under the cable arrangement away from the reference ground tends to mitigate the cable resonances.

  • Transactional TF: Transform Library with Concurrency and Correctness

    Yushi OGIWARA  Ayanori YOROZU  Akihisa OHYA  Hideyuki KAWASHIMA  

     
    PAPER

      Pubricized:
    2023/06/22
      Vol:
    E106-D No:12
      Page(s):
    1951-1959

    In the Robot Operating System (ROS), a major middleware for robots, the Transform Library (TF) is a mandatory package that manages transformation information between coordinate systems by using a directed forest data structure and providing methods for registering and computing the information. However, the structure has two fundamental problems. The first is its poor scalability: since it accepts only a single thread at a time due to using a single giant lock for mutual exclusion, the access to the tree is sequential. Second, there is a lack of data freshness: it retrieves non-latest synthetic data when computing coordinate transformations because it prioritizes temporal consistency over data freshness. In this paper, we propose methods based on transactional techniques. This will allow us to avoid anomalies, achieve high performance, and obtain fresh data. These transactional methods show a throughput of up to 429 times higher than the conventional method on a read-only workload and a freshness of up to 1276 times higher than the conventional one on a read-write combined workload.

  • FPGA-based Garbling Accelerator with Parallel Pipeline Processing

    Rin OISHI  Junichiro KADOMOTO  Hidetsugu IRIE  Shuichi SAKAI  

     
    PAPER

      Pubricized:
    2023/08/02
      Vol:
    E106-D No:12
      Page(s):
    1988-1996

    As more and more programs handle personal information, the demand for secure handling of data is increasing. The protocol that satisfies this demand is called Secure function evaluation (SFE) and has attracted much attention from a privacy protection perspective. In two-party SFE, two mutually untrustworthy parties compute an arbitrary function on their respective secret inputs without disclosing any information other than the output of the function. For example, it is possible to execute a program while protecting private information, such as genomic information. The garbled circuit (GC) — a method of program obfuscation in which the program is divided into gates and the output is calculated using a symmetric key cipher for each gate — is an efficient method for this purpose. However, GC is computationally expensive and has a significant overhead even with an accelerator. We focus on hardware acceleration because of the nature of GC, which is limited to certain types of calculations, such as encryption and XOR. In this paper, we propose an architecture that accelerates garbling by running multiple garbling engines simultaneously based on the latest FPGA-based GC accelerator. In this architecture, managers are introduced to perform multiple rows of pipeline processing simultaneously. We also propose an optimized implementation of RAM for this FPGA accelerator. As a result, it achieves an average performance improvement of 26% in garbling the same set of programs, compared to the state-of-the-art (SOTA) garbling accelerator.

  • Energy-Efficient One-to-One and Many-to-One Concurrent Transmission for Wireless Sensor Networks

    SenSong HE  Ying QIU  

     
    LETTER-Information Network

      Pubricized:
    2023/09/19
      Vol:
    E106-D No:12
      Page(s):
    2107-2111

    Recent studies have shown that concurrent transmission with precise time synchronization enables reliable and efficient flooding for wireless networks. However, most of them require all nodes in the network to forward packets a fixed number of times to reach the destination, which leads to unnecessary energy consumption in both one-to-one and many-to-one communication scenarios. In this letter, we propose G1M address this issue by reducing redundant packet forwarding in concurrent transmissions. The evaluation of G1M shows that compared with LWB, the average energy consumption of one-to-one and many-to-one transmission is reduced by 37.89% and 25%, respectively.

  • U-Net Architecture for Ancient Handwritten Chinese Character Detection in Han Dynasty Wooden Slips

    Hojun SHIMOYAMA  Soh YOSHIDA  Takao FUJITA  Mitsuji MUNEYASU  

     
    PAPER-Image

      Pubricized:
    2023/05/15
      Vol:
    E106-A No:11
      Page(s):
    1406-1415

    Recent character detectors have been modeled using deep neural networks and have achieved high performance in various tasks, such as text detection in natural scenes and character detection in historical documents. However, existing methods cannot achieve high detection accuracy for wooden slips because of their multi-scale character sizes and aspect ratios, high character density, and close character-to-character distance. In this study, we propose a new U-Net-based character detection and localization framework that learns character regions and boundaries between characters. The proposed method enhances the learning performance of character regions by simultaneously learning the vertical and horizontal boundaries between characters. Furthermore, by adding simple and low-cost post-processing using the learned regions of character boundaries, it is possible to more accurately detect the location of a group of characters in a close neighborhood. In this study, we construct a wooden slip dataset. Experiments demonstrated that the proposed method outperformed existing character detection methods, including state-of-the-art character detection methods for historical documents.

  • A SAT Approach to the Initial Mapping Problem in SWAP Gate Insertion for Commuting Gates

    Atsushi MATSUO  Shigeru YAMASHITA  Daniel J. EGGER  

     
    PAPER-Algorithms and Data Structures

      Pubricized:
    2023/05/17
      Vol:
    E106-A No:11
      Page(s):
    1424-1431

    Most quantum circuits require SWAP gate insertion to run on quantum hardware with limited qubit connectivity. A promising SWAP gate insertion method for blocks of commuting two-qubit gates is a predetermined swap strategy which applies layers of SWAP gates simultaneously executable on the coupling map. A good initial mapping for the swap strategy reduces the number of required swap gates. However, even when a circuit consists of commuting gates, e.g., as in the Quantum Approximate Optimization Algorithm (QAOA) or trotterized simulations of Ising Hamiltonians, finding a good initial mapping is a hard problem. We present a SAT-based approach to find good initial mappings for circuits with commuting gates transpiled to the hardware with swap strategies. Our method achieves a 65% reduction in gate count for random three-regular graphs with 500 nodes. In addition, we present a heuristic approach that combines the SAT formulation with a clustering algorithm to reduce large problems to a manageable size. This approach reduces the number of swap layers by 25% compared to both a trivial and random initial mapping for a random three-regular graph with 1000 nodes. Good initial mappings will therefore enable the study of quantum algorithms, such as QAOA and Ising Hamiltonian simulation applied to sparse problems, on noisy quantum hardware with several hundreds of qubits.

  • Practical Implementation of Motion-Robust Radar Imaging and Whole-Body Weapon Detection for Walk-Through Security Screening

    Masayuki ARIYOSHI  Kazumine OGURA  Tatsuya SUMIYA  Nagma S. KHAN  Shingo YAMANOUCHI  Toshiyuki NOMURA  

     
    PAPER-Sensing

      Pubricized:
    2023/06/07
      Vol:
    E106-B No:11
      Page(s):
    1244-1255

    Radar-based sensing and concealed weapon detection technologies have been attracting attention as a measure to enhance security screening in public facilities and various venues. For these applications, the security check must be performed without impeding the flow of people, with minimum human effort, and in a non-contact manner. We developed technologies for a high-throughput walk-through security screening called Invisible Sensing (IVS) and implemented them in a prototype system. The IVS system consists of dual planar radar panels facing each other and carries out an inspection based on a multi-region screening approach as a person walks between the panels. Our imaging technology constructs a high-quality radar image that compensates for motion blur caused by a person's walk. Our detection technology takes multi-view projected images across the multiple regions as input to enable real-time whole-body screening. The IVS system runs its functions by pipeline processing to achieve real-time screening operation. This paper presents our IVS system along with these key technologies and demonstrates its empirical performance.

  • A Compact Fully-Differential Distributed Amplifier with Coupled Inductors in 0.18-µm CMOS Technology

    Keisuke KAWAHARA  Yohtaro UMEDA  Kyoya TAKANO  Shinsuke HARA  

     
    PAPER

      Pubricized:
    2023/04/19
      Vol:
    E106-C No:11
      Page(s):
    669-676

    This paper presents a compact fully-differential distributed amplifier using a coupled inductor. Differential distributed amplifiers are widely required in optical communication systems. Most of the distributed amplifiers reported in the past are single-ended or pseudo-differential topologies. In addition, the differential distributed amplifiers require many inductors, which increases the silicon cost. In this study, we use differentially coupled inductors to reduce the chip area to less than half and eliminate the difficulties in layout design. The challenge in using coupled inductors is the capacitive parasitic coupling that degrades the flatness of frequency response. To address this challenge, the odd-mode image parameters of a differential artificial transmission line are derived using a simple loss-less model. Based on the analytical results, we optimize the dimensions of the inductor with the gradient descent algorithm to achieve accurate impedance matching and phase matching. The amplifier was fabricated in 0.18-µm CMOS technology. The core area of the amplifier is 0.27 mm2, which is 57% smaller than the previous work. Besides, we demonstrated a small group delay variation of ±2.7 ps thanks to the optimization. the amplifier successfully performed 30-Gbps NRZ and PAM4 transmissions with superior jitter performance. The proposed technique will promote the high-density integration of differential traveling wave devices.

  • Enhancing VQE Convergence for Optimization Problems with Problem-Specific Parameterized Quantum Circuits

    Atsushi MATSUO  Yudai SUZUKI  Ikko HAMAMURA  Shigeru YAMASHITA  

     
    PAPER-Fundamentals of Information Systems

      Pubricized:
    2023/08/17
      Vol:
    E106-D No:11
      Page(s):
    1772-1782

    The Variational Quantum Eigensolver (VQE) algorithm is gaining interest for its potential use in near-term quantum devices. In the VQE algorithm, parameterized quantum circuits (PQCs) are employed to prepare quantum states, which are then utilized to compute the expectation value of a given Hamiltonian. Designing efficient PQCs is crucial for improving convergence speed. In this study, we introduce problem-specific PQCs tailored for optimization problems by dynamically generating PQCs that incorporate problem constraints. This approach reduces a search space by focusing on unitary transformations that benefit the VQE algorithm, and accelerate convergence. Our experimental results demonstrate that the convergence speed of our proposed PQCs outperforms state-of-the-art PQCs, highlighting the potential of problem-specific PQCs in optimization problems.

  • Implementing Region-Based Segmentation for Hardware Trojan Detection in FPGAs Cell-Level Netlist

    Ann Jelyn TIEMPO  Yong-Jin JEONG  

     
    LETTER-Dependable Computing

      Pubricized:
    2023/07/28
      Vol:
    E106-D No:11
      Page(s):
    1926-1929

    Field Programmable Gate Array (FPGA) is gaining popularity because of their reconfigurability which brings in security concerns like inserting hardware trojan. Various detection methods to overcome this threat have been proposed but in the ASIC's supply chain and cannot directly apply to the FPGA application. In this paper, the authors aim to implement a structural feature-based detection method for detecting hardware trojan in a cell-level netlist, which is not well explored yet, where the nets are segmented into smaller groups based on their interconnection and further analyzed by looking at their structural similarities. Experiments show positive performance with an average detection rate of 95.41%, an average false alarm rate of 2.87% and average accuracy of 96.27%.

  • Gaussian Mixture Bandpass Filter Design for Narrow Passband Width by Using a FIR Recursive Filter

    Yukihiko YAMASHITA  

     
    PAPER-Digital Signal Processing

      Pubricized:
    2023/04/11
      Vol:
    E106-A No:10
      Page(s):
    1277-1285

    Bandpass filters (BPFs) are very important to extract target signals and eliminate noise from the received signals. A BPF of which frequency characteristics is a sum of Gaussian functions is called the Gaussian mixture BPF (GMBPF). In this research, we propose to implement the GMBPF approximately by the sum of several frequency components of the sliding Fourier transform (SFT) or the attenuated SFT (ASFT). Because a component of the SFT/ASFT can be approximately realized using the finite impulse response (FIR) recursive filters, its calculation complexity does not depend on the length of the impulse response. The property makes GMBPF ideal for narrow bandpass filtering applications. We conducted experiments to demonstrate the advantages of the proposed GMBPF over FIR filters designed by a MATLAB function with regard to the computational complexity.

  • Recursive Probability Mass Function Method to Calculate Probability Distributions of Pulse-Shaped Signals

    Tomoya FUKAMI  Hirobumi SAITO  Akira HIROSE  

     
    PAPER-Digital Signal Processing

      Pubricized:
    2023/03/27
      Vol:
    E106-A No:10
      Page(s):
    1286-1296

    This paper proposes an accurate and efficient method to calculate probability distributions of pulse-shaped complex signals. We show that the distribution over the in-phase and quadrature-phase (I/Q) complex plane is obtained by a recursive probability mass function of the accumulator for a pulse-shaping filter. In contrast to existing analytical methods, the proposed method provides complex-plane distributions in addition to instantaneous power distributions. Since digital signal processing generally deals with complex amplitude rather than power, the complex-plane distributions are more useful when considering digital signal processing. In addition, our approach is free from the derivation of signal-dependent functions. This fact results in its easy application to arbitrary constellations and pulse-shaping filters like Monte Carlo simulations. Since the proposed method works without numerical integrals and calculations of transcendental functions, the accuracy degradation caused by floating-point arithmetic is inherently reduced. Even though our method is faster than Monte Carlo simulations, the obtained distributions are more accurate. These features of the proposed method realize a novel framework for evaluating the characteristics of pulse-shaped signals, leading to new modulation, predistortion and peak-to-average power ratio (PAPR) reduction schemes.

  • Experimental Investigation on Electromagnetic Immunity and Conduction Immunity of Digital Control Circuit Based on ARM

    Yang XIAO  Zhongyuan ZHOU  Xiang ZHOU  Qi ZHOU  Mingjie SHENG  Yixing GU  Mingliang YANG  

     
    PAPER-Electromagnetic Compatibility(EMC)

      Pubricized:
    2023/05/19
      Vol:
    E106-B No:10
      Page(s):
    969-978

    This paper analyzes the typical functions of digital control circuit and its function modules, and develops a set of digital control circuit equipment based on Advanced RISC Machines (ARM) with typical function modules, including principle design, interference injection trace design, function design, and study the failure mode and threshold of typical function modules. Based on continuous wave (CW) and pulse wave, the direct power injection (DPI) method is used to test the conduction immunity of the digital control circuit, and the failure mode and sensitivity threshold of the digital control circuit are quantitatively obtained. This method can provide experimental verification for the immunity ability of the digital control circuit to different electromagnetic interference.

  • High-Quality and Low-Complexity Polar-Coded Radio-Wave Encrypted Modulation Utilizing Multipurpose Frozen Bits Open Access

    Keisuke ASANO  Takumi ABE  Kenta KATO  Eiji OKAMOTO  Tetsuya YAMAMOTO  

     
    PAPER-Wireless Communication Technologies

      Pubricized:
    2023/03/28
      Vol:
    E106-B No:10
      Page(s):
    987-996

    In recent years, physical layer security (PLS), which utilizes the inherent randomness of wireless signals to perform encryption at the physical layer, has attracted attention. We propose chaos modulation as a PLS technique. In addition, a method for encryption using a special encoder of polar codes has been proposed (PLS-polar), in which PLS can be easily achieved by encrypting the frozen bits of a polar code. Previously, we proposed a chaos-modulated polar code transmission method that can achieve high-quality and improved-security transmission using frozen bit encryption in polar codes. However, in principle, chaos modulation requires maximum likelihood sequence estimation (MLSE) for demodulation, and a large number of candidates for MLSE causes characteristic degradation in the low signal-to-noise ratio region in chaos polar transmission. To address this problem, in this study, we propose a versatile frozen bit method for polar codes, in which the frozen bits are also used to reduce the number of MLSE candidates for chaos demodulation. The numerical results show that the proposed method shows a performance improvement by 1.7dB at a block error rate of 10-3 with a code length of 512 and a code rate of 0.25 compared with that of conventional methods. We also show that the complexity of demodulation can be reduced to 1/16 of that of the conventional method without degrading computational security. Furthermore, we clarified the effective region of the proposed method when the code length and code rate were varied.

  • Experimental Exploration of the Backside ESD Impacts on an IC Chip in Flip Chip Packaging

    Takuya WADATSUMI  Kohei KAWAI  Rikuu HASEGAWA  Kikuo MURAMATSU  Hiromu HASEGAWA  Takuya SAWADA  Takahito FUKUSHIMA  Hisashi KONDO  Takuji MIKI  Makoto NAGATA  

     
    PAPER

      Pubricized:
    2023/04/13
      Vol:
    E106-C No:10
      Page(s):
    556-564

    This paper presents on-chip characterization of electrostatic discharge (ESD) impacts applied on the Si-substrate backside of a flip-chip mounted integrated circuit (FC-IC) chip. An FC-IC chip has an open backside and there is a threat of reliability problems and malfunctions caused by the backside ESD. We prepared a test FC-IC chip and measured Si-substrate voltage fluctuations on its frontside by an on-chip monitor (OCM) circuit. The voltage surges as large as 200mV were observed on the frontside when a 200-V ESD gun was irradiated through a 5kΩ contact resistor on the backside of a 350μm thick Si substrate. The distribution of voltage heights was experimentally measured at 20 on-chip locations among thinned Si substrates up to 40μm, and also explained in full-system level simulation of backside ESD impacts with the equivalent models of ESD-gun operation and FC-IC chip assembly.

61-80hit(4264hit)