We consider Feistel ciphers instantiated with tweakable block ciphers (TBCs) and ideal ciphers (ICs). The indistinguishability security of the TBC-based Feistel cipher is known, and the indifferentiability security of the IC-based Feistel cipher is also known, where independently keyed TBCs and independent ICs are assumed. In this paper, we analyze the security of a single-keyed TBC-based Feistel cipher and a single IC-based Feistel cipher. We characterize the security depending on the number of rounds. More precisely, we cover the case of contracting Feistel ciphers that have d ≥ 2 lines, and the results on Feistel ciphers are obtained as a special case by setting d = 2. Our indistinguishability security analysis shows that it is provably secure with d + 1 rounds. Our indifferentiability result shows that, regardless of the number of rounds, it cannot be secure. Our attacks are a type of a slide attack, and we consider a structure that uses a round constant, which is a well-known countermeasure against slide attacks. We show an indifferentiability attack for the case d = 2 and 3 rounds.

To improve the control performance of the permanent magnet synchronous motor speed control system, the fractional order calculus theory is combined with the sliding mode control to design the fractional order integral sliding mode sliding mode surface (FOISM) to improve the robustness of the system. Secondly, considering the existence of chattering phenomenon in sliding mode control, a new second-order sliding mode reaching law (NSOSMRL) is designed to improve the control accuracy of the system. Finally, the effectiveness of the proposed strategy is demonstrated by simulation.

With the advent of gated quantum computers and the regular structures for qubit layout, methods for placement, routing, noise estimation, and logic to hardware mapping become imminently required. In this paper, we propose a method for quantum circuit layout that is intended to solve such problems when mapping a quantum circuit to a gated quantum computer. The proposed methodology starts by building a Circuit Interaction Graph (CIG) that represents the ideal hardware layout minimizing the distance and path length between the individual qubits. The CIG is also used to introduce a qubit noise model. Once constructed, the CIG is iteratively reduced to a given architecture (qubit coupling model) specifying the neighborhood, qubits, priority, and qubits noise. The introduced constraints allow us to additionally reduce the graph according to preferred weights of desired properties. We propose two different methods of reducing the CIG: iterative reduction or the iterative isomorphism search algorithm. The proposed method is verified and tested on a set of standard benchmarks with results showing improvement on certain functions while in average improving the cost of the implementation over the current state of the art methods.

We present a time-efficient lower bound κ on the number of gates in Toffoli-based reversible circuits that represent a given reversible logic function. For the characteristic vector s of a reversible logic function, κ(s) closely approximates σ-lb(s), which is known as a relatively efficient lower bound in respect of evaluation time and tightness. The primary contribution of this paper is that κ enables fast computation while maintaining a tightness of the lower bound, approximately equal to σ-lb. We prove that the discrepancy between κ(s) and σ-lb(s) is at most one only, by providing upper and lower bounds on σ-lb in terms of κ. Subsequently, we show that κ can be calculated more efficiently than σ-lb. An algorithm for κ(s) with a complexity of 𝓞(n) is presented, where n is the dimension of s. Experimental results comparing κ and σ-lb are also given. The results demonstrate that the two lower bounds are equal for most reversible functions, and that the calculation of κ is significantly faster than σ-lb by several orders of magnitude.

Emerging data-intensive services in distribution grid impose requirements of high-concurrency access for massive internet of things (IoT) devices. However, the lack of effective high-concurrency access management results in severe performance degradation. To address this challenge, we propose a cloud-edge-device collaborative high-concurrency access management algorithm based on multi-timescale joint optimization of channel pre-allocation and load balancing degree. We formulate an optimization problem to minimize the weighted sum of edge-cloud load balancing degree and queuing delay under the constraint of access success rate. The problem is decomposed into a large-timescale channel pre-allocation subproblem solved by the device-edge collaborative access priority scoring mechanism, and a small-timescale data access control subproblem solved by the discounted empirical matching mechanism (DEM) with the perception of high-concurrency number and queue backlog. Particularly, information uncertainty caused by externalities is tackled by exploiting discounted empirical performance which accurately captures the performance influence of historical time points on present preference value. Simulation results demonstrate the effectiveness of the proposed algorithm in reducing edge-cloud load balancing degree and queuing delay.

Stochastic Computing (SC) allows additions and multiplications to be realized with lower power than the conventional binary operations if we admit some errors. However, for many complex functions which cannot be realized by only additions and multiplications, we do not know a generic efficient method to calculate a function by using an SC circuit; it is necessary to realize an SC circuit by using a generic method such as polynomial approximation methods for such a function, which may lose the advantage of SC. Thus, there have been many researches to consider efficient SC realization for specific functions; an efficient SC square root circuit with a feedback circuit was proposed by D. Wu et al. recently. This paper generalizes the SC square root circuit with a feedback circuit; we identify a situation when we can implement a function efficiently by an SC circuit with a feedback circuit. As examples of our generalization, we propose SC circuits to calculate the n-th root calculation and division. We also show our analysis on the accuracy of our SC circuits and the hardware costs; our results show the effectiveness of our method compared to the conventional SC designs; our framework may be able to implement a SC circuit that is better than the existing methods in terms of the hardware cost or the calculation error.

The existing discrete-logarithm-based two-round multi-signature schemes without using the idealized model, i.e., the Algebraic Group Model (AGM), have quite large reduction loss. This means that an implementation of these schemes requires an elliptic curve (EC) with a very large order for the standard 128-bit security when we consider concrete security. Indeed, the existing standardized ECs have orders too small to ensure 128-bit security of such schemes. Recently, Pan and Wagner proposed two two-round schemes based on the Decisional Diffie-Hellman (DDH) assumption (EUROCRYPT 2023). For 128-bit security in concrete security, the first scheme can use the NIST-standardized EC P-256 and the second can use P-384. However, with these parameter choices, they do not improve the signature size and the communication complexity over the existing non-tight schemes. Therefore, there is no two-round scheme that (i) can use a standardized EC for 128-bit security and (ii) has high efficiency. In this paper, we construct a two-round multi-signature scheme achieving both of them from the DDH assumption. We prove that an EC with at least a 321-bit order is sufficient for our scheme to ensure 128-bit security. Thus, we can use the NIST-standardized EC P-384 for 128-bit security. Moreover, the signature size and the communication complexity per one signer of our proposed scheme under P-384 are 1152 bits and 1535 bits, respectively. These are most efficient among the existing two-round schemes without using the AGM including Pan-Wagner’s schemes and non-tight schemes which do not use the AGM. Our experiment on an ordinary machine shows that for signing and verification, each can be completed in about 65 ms under 100 signers. This shows that our scheme has sufficiently reasonable running time in practice.

Efficient multiplexing of ultra-reliable and low-latency communications (URLLC) and enhanced mobile broadband (eMBB) traffic, as well as ensuring the various reliability requirements of these traffic types in 5G wireless communications, is becoming increasingly important, particularly for vertical services. Interference management techniques, such as coordinated inter-cell scheduling, can enhance reliability in dense cell deployments. However, tight inter-cell coordination necessitates frequent information exchange between cells, which limits implementation. This paper introduces a novel RAN slicing framework based on centralized frequency-domain interference control per slice and link adaptation optimized for URLLC. The proposed framework does not require tight inter-cell coordination but can fulfill the requirements of both the decoding error probability and the delay violation probability of each packet flow. These controls are based on a power-law estimation of the lower tail distribution of a measured data set with a smaller number of discrete samples. As design guidelines, we derived a theoretical minimum radio resource size of a slice to guarantee the delay violation probability requirement. Simulation results demonstrate that the proposed RAN slicing framework can achieve the reliability targets of the URLLC slice while improving the spectrum efficiency of the eMBB slice in a well-balanced manner compared to other evaluated benchmarks.

Despite the appealing advantages of reconfigurable intelligent surfaces (RIS) aided mmWave communications, there remain practical issues that need to be addressed before the large-scale deployment of RISs in future wireless networks. In this study, we jointly consider the non-neglectable practical issues in a multi-RIS-aided mmWave system, which can significantly affect the secrecy performance, including the high computational complexity, imperfect channel state information (CSI), and finite resolution of phase shifters. To solve this non-convex challenging stochastic optimization problem, we propose a robust and low-complexity algorithm to maximize the achievable secrete rate. Specially, by combining the benefits of fractional programming and the stochastic successive convex approximation techniques, we transform the joint optimization problem into some convex ones and solve them sub-optimally. The theoretical analysis and simulation results demonstrate that the proposed algorithms could mitigate the joint negative effects of practical issues and yielded a tradeoff between secure performance and complexity/overhead outperforming non-robust benchmarks, which increases the robustness and flexibility of multiple RIS deployments in future wireless networks.

In this work, the core size estimation technique of magnetic nanoparticles (MNPs) using the static magnetization curve obtained from a high-Tc SQUID magnetometer and a metaheuristic inversion technique based on the Particle Swarm Optimizer (PSO) algorithm is presented. The high-Tc SQUID magnetometer is constructed from a high-Tc SQUID sensor coupled by a flux transformer to sense the modulated magnetization signal from a sample. The magnetization signal is modulated by the lateral vibration of the sample on top of a planar differential detection coil of the flux transformer. A pair of primary and excitation coils are utilized to apply an excitation field parallel to the sensitive axis of the detection coil. Using the high-Tc SQUID magnetometer, the magnetization curve of a commercial MNP sample (Resovist) was measured in a logarithmic scale of the excitation field. The PSO inverse technique is then applied to the magnetization curve to construct the magnetic moment distribution. A multimodal normalized log-normal distribution was used in the minimization of the objective function of the PSO inversion technique, and a modification of the PSO search region is proposed to improve the exploration and exploitation of the PSO particles. As a result, a good agreement on the Resovist magnetic core size was obtained between the proposed technique and the non-negative least square (NNLS) inversion technique. The estimated core sizes of 8.0484 nm and 20.3018 nm agreed well with the values reported in the literature using the commercial low-Tc SQUID magnetometer with the SVD and NNLS inversion techniques. Compared to the NNLS inversion technique, the PSO inversion technique had merits in exploring an optimal core size distribution freely without being regularized by a parameter and facilitating an easy peak position determination owing to the smoothness of the constructed distribution. The combination of the high-Tc SQUID magnetometer and the PSO-based reconstruction technique offers a powerful approach for characterizing the MNP core size distribution, and further improvements can be expected from the recent state-of-the-art optimization algorithm to optimize further the computation time and the best objective function value.

This article reviews the author’s group research achievements in analog/mixed-signal circuit and system area with introduction of how they came up with the ideas. Analog/mixed-signal circuits and systems have to be designed as well-balanced in many aspects, and coming up ideas needs some experiences and discussions with researchers. It is also heavily dependent on researchers. Here, the author’s group own experiences are presented as well as their research motivations.

Wide deployment of artificial intelligence (AI) is inducing exponentially growing energy consumption. Traditional digital platforms are becoming difficult to fulfill such ever-growing demands on energy efficiency as well as computing latency, which necessitates the development of high efficiency analog hardware platforms for AI. Recently, optical and electrooptic hybrid computing is reactivated as a promising analog hardware alternative because it can accelerate the information processing in an energy-efficient way. Integrated photonic circuits offer such an analog hardware solution for implementing photonic AI and machine learning. For this purpose, we proposed a photonic analog of support vector machine and experimentally demonstrated low-latency and low-energy classification computing, which evidences the latency and energy advantages of optical analog computing over traditional digital computing. We also proposed an electrooptic Hopfield network for classifying and recognizing time-series data. This paper will review our work on implementing classification computing and Hopfield network by leveraging silicon photonic circuits.

L-type LC/CL matching circuits are well known for their simple analytical solutions and have been applied to many radio-frequency (RF) circuits. When actually constructing a circuit, parasitic elements are added to inductors and capacitors. Therefore, each L and C element has a self-resonant frequency, which affects the characteristics of the matching circuit. In this paper, the parallel parasitic capacitance to the inductor and the series parasitic inductor to the capacitance are taken up as parasitic elements, and the details of the effects of the self-resonant frequency of each element on the S11, voltage standing wave ratio (VSWR) and S21 characteristics are reported. When a parasitic element is added, each characteristic basically tends to deteriorate as the self-resonant frequency decreases. However, as an interesting feature, we found that the combination of resonant frequencies determines the VSWR and passband characteristics, regardless of whether it is the inductor or the capacitor.

A wireless sensor terminal module of 5cc size (2.5 cm × 2.5 cm × 0.8 cm) that does not require a battery is proposed by integrating three kinds of circuit technologies. (i) a low-power sensor interface: an FM modulation type CMOS sensor interface circuit that can operate with a typical power consumption of 24.5 μW was fabricated by the 0.7-μm CMOS process technology. (ii) power supply to the sensor interface circuit: a wireless power transmission characteristic to a small-sized PCB spiral coil antenna was clarified and applied to the module. (iii) wireless sensing from the module: backscatter communication technology that modulates the signal from the base terminal equipment with sensor information and reflects it, which is used for the low-power sensing operation. The module fabricated includes a rectifier circuit with the PCB spiral coil antenna that receives wireless power transmitted from base terminal equipment by electromagnetic resonance coupling and converts it into DC power and a sensor interface circuit that operates using the power. The interface circuit modulates the received signal with the sensor information and reflects it back to the base terminal. The module could achieve 100 mm communication distance when 0.4 mW power is feeding to the sensor terminal.

A 150 GHz fundamental oscillator employing an inter-stage matching network based on a transmission line is presented in this letter. The proposed oscillator consists of a two-stage common-emitter amplifier loop, whose inter-stage connections are optimized to meet the oscillation condition. The oscillator is designed in a 130-nm SiGe BiCMOS process that offers fT and fMAX of 350 GHz and 450 GHz. According to simulation results, an output power of 3.17 dBm is achieved at 147.6 GHz with phase noise of -115 dBc/Hz at 10 MHz offset and figure-of-merit (FoM) of -180 dBc/Hz.

Automatic detection of prohibited items is vital in helping security staff be more efficient while improving the public safety index. However, prohibited item detection within X-ray security inspection images is limited by various factors, including the imbalance distribution of categories, diversity of prohibited item scales, and overlap between items. In this paper, we propose to leverage the Poisson blending algorithm with the Canny edge operator to alleviate the imbalance distribution of categories maximally in the X-ray images dataset. Based on this, we improve the cascade network to deal with the other two difficulties. To address the prohibited scale diversity problem, we propose the Re-BiFPN feature fusion method, which includes a coordinate attention atrous spatial pyramid pooling (CA-ASPP) module and a recursive connection. The CA-ASPP module can implicitly extract direction-aware and position-aware information from the feature map. The recursive connection feeds the CA-ASPP module processed multi-scale feature map to the bottom-up backbone layer for further multi-scale feature extraction. In addition, a Rep-CIoU loss function is designed to address the overlapping problem in X-ray images. Extensive experimental results demonstrate that our method can successfully identify ten types of prohibited items, such as Knives, Scissors, Pressure, etc. and achieves 83.4% of mAP, which is 3.8% superior to the original cascade network. Moreover, our method outperforms other mainstream methods by a significant margin.

Cloud gaming systems allow users to play games that require high-performance computational capability on their mobile devices at any location. However, playing games through cloud gaming systems increases the Round-Trip Time (RTT) due to increased network delay. To simulate a local gaming experience for cloud users, we must minimize RTTs, which include network delays. The speculative video transmission pre-generates and encodes video frames corresponding to all possible user inputs and sends them to the user before the user’s input. The speculative video transmission mitigates the network, whereas a simple solution significantly increases the video traffic. This paper proposes tile-wise delta detection for traffic reduction of speculative video transmission. More specifically, the proposed method determines a reference video frame from the generated video frames and divides the reference video frame into multiple tiles. We calculate the similarity between each tile of the reference video frame and other video frames based on a hash function. Based on calculated similarity, we determine redundant tiles and do not transmit them to reduce traffic volume in minimal processing time without implementing a high compression ratio video compression technique. Evaluations using commercial games showed that the proposed method reduced 40-50% in traffic volume when the SSIM index was around 0.98 in certain genres, compared with the speculative video transmission method. Furthermore, to evaluate the feasibility of the proposed method, we investigated the effectiveness of network delay reduction with existing computational capability and the requirements in the future. As a result, we found that the proposed scheme may mitigate network delay by one to two frames, even with existing computational capability under limited conditions.

An efficient optical power splitter constructed by a metal-dielectric-metal plasmonic waveguide with a resonator structure has been analyzed. The method of solution is the finite difference time domain (FD-TD) method with the piecewise linear recursive convolution (PLRC) method. The resonator structure consists of input/output waveguides and a narrow waveguide with a T-junction. The power splitter with the resonator structure is expressed by an equivalent transmission-line circuit. We can find that the transmittance and reflectance calculated by the FD-TD method and the equivalent circuit are matched when the difference in width between the input/output waveguides and the narrow waveguide is small. It is also shown that the transmission wavelength can be adjusted by changing the narrow waveguide lengths that satisfy the impedance matching condition in the equivalent circuit.

Security-related issues have become more significant due to the proliferation of IT. Collating security-related information in a database improves security. For example, Common Vulnerabilities and Exposures (CVE) is a security knowledge repository containing descriptions of vulnerabilities about software or source code. Although the descriptions include various entities, there is not a uniform entity structure, making security analysis difficult using individual entities. Developing a consistent entity structure will enhance the security field. Herein we propose a method to automatically label select entities from CVE descriptions by applying the Named Entity Recognition (NER) technique. We manually labeled 3287 CVE descriptions and conducted experiments using a machine learning model called BERT to compare the proposed method to labeling with regular expressions. Machine learning using the proposed method significantly improves the labeling accuracy. It has an f1 score of about 0.93, precision of about 0.91, and recall of about 0.95, demonstrating that our method has potential to automatically label select entities from CVE descriptions.

Displacement current is the last piece of the puzzle of electromagnetic theory. Its existence implies that electromagnetic disturbance can propagate at the speed of light and finally it led to the discovery of Hertzian waves. On the other hand, since magnetic fields can be calculated only with conduction currents using Biot-Savart's law, a popular belief that displacement current does not produce magnetic fields has started to circulate. But some people think if this is correct, what is the displacement current introduced for. The controversy over the meaning of displacement currents has been going on for more than hundred years. Such confusion is caused by forgetting the fact that in the case of non-stationary currents, neither magnetic fields created by conduction currents nor those created by displacement currents can be defined. It is also forgotten that the effect of displacement current is automatically incorporated in the magnetic field calculated by Biot-Savart's law. In this paper, mainly with the help of Helmholtz decomposition, we would like to clarify the confusion surrounding displacement currents and provide an opportunity to end the long standing controversy.