It is well known that solving randomly chosen Multivariate Quadratic equations over a finite field (MQ-Problem) is NP-hard, and the security of Multivariate Public Key Cryptosystems (MPKCs) is based on the MQ-Problem. However, this problem can be solved efficiently when the number of unknowns n is sufficiently greater than that of equations m (This is called “Underdefined”). Indeed, the algorithm by Kipnis et al. (Eurocrypt'99) can solve the MQ-Problem over a finite field of even characteristic in a polynomial-time of n when n ≥ m(m+1). Therefore, it is important to estimate the hardness of the MQ-Problem to evaluate the security of Multivariate Public Key Cryptosystems. We propose an algorithm in this paper that can solve the MQ-Problem in a polynomial-time of n when n ≥ m(m+3)/2, which has a wider applicable range than that by Kipnis et al. We will also compare our proposed algorithm with other known algorithms. Moreover, we implemented this algorithm with Magma and solved the MQ-Problem of m=28 and n=504, and it takes 78.7 seconds on a common PC.

An RGB-LED driver with a pulse-skipping-modulation boost converter is proposed to fix the reference voltage for lowering down the circuit complexity. A high-voltage LDO and a bandgap reference circuit are built into the chip. The proposed converter outputs a different voltage in response to a different color of LEDs. The output voltages for driving six red, six green, and six blue LEDs in series are 13.5V, 20V, and 21.5V, respectively. The proposed LDO and bandgap reference circuit work with supply voltages from 8V to 12V. The settling time for changing colors is lower than 300µs, better than the unfixed-reference-voltage methods. The proposed circuit was fabricated by using 0.25-µm BCD 60V technology, and the chip area was 1.9 × 1.7mm2.

This paper introduces a partially parallel inter-chip link architecture for asynchronous multi-chip Network-on-Chips (NoCs). The multi-chip NoCs that operate as a large NoC have been recently proposed for very large systems, such as automotive applications. Inter-chip links are key elements to realize high-performance multi-chip NoCs using a limited number of I/Os. The proposed asynchronous link based on level-encoded dual-rail (LEDR) encoding transmits several bits in parallel that are received by detecting the phase information of the LEDR signals at each serial link. It employs a burst-mode data transmission that eliminates a per-bit handshake for a high-speed operation, but the elimination may cause data-transmission errors due to cross-talk and power-supply noises. For triggering data retransmission, errors are detected from the embedded phase information; error-detection codes are not used. The throughput is theoretically modelled and is optimized by considering the bit-error rate (BER) of the link. Using delay parameters estimated for a 0.13 µm CMOS technology, the throughput of 8.82 Gbps is achieved by using 10 I/Os, which is 90.5% higher than that of a link using 9 I/Os without an error-detection method operating under negligible low BER (<10-20).

Yield enhancements and quality improvements must be considered as factors of the utmost importance in VLSI (Very Large Scale Integration circuits) manufacturing in order to reduce cost and ensure customer satisfaction. This paper will present a study of the yield theory, an analysis of actual manufacturing data, and the challenges of yield enhancement.

In this paper, we propose a fully parallel Turbo decoder for Software-Defined Radio (SDR) on the Graphics Processing Unit (GPU) platform. Soft Output Viterbi algorithm (SOVA) is chosen for its low complexity and high throughput. The parallelism of SOVA is fully analyzed and the whole codeword is divided into multiple sub-codewords, where the turbo-pass decoding procedures are performed in parallel by independent sub-decoders. In each sub-decoder, an efficient initialization method is exploited to assure the bit error ratio (BER) performance. The sub-decoders are mapped to numerous blocks on the GPU. Several optimization methods are employed to enhance the throughput, such as the memory optimization, codeword packing scheme, and asynchronous data transfer. The experiment shows that our decoder has BER performance close to Max-Log-MAP and the peak throughput is 127.84Mbps, which is about two orders of magnitude faster than that of central processing unit (CPU) implementation, which is comparable to application-specific integrated circuit (ASIC) solutions. The presented decoder can achieve higher throughput than that of the existing fastest GPU-based implementation.

Most of the recent classification methods require tuning of the hyper-parameters, such as the kernel function parameter and the regularization parameter. Cross-validation or the leave-one-out method is often used for the tuning, however their computational costs are much higher than that of obtaining a classifier. Quadratically constrained maximum a posteriori (QCMAP) classifiers, which are based on the Bayes classification rule, do not have the regularization parameter, and exhibit higher classification accuracy than support vector machine (SVM). In this paper, we propose a multiple kernel learning (MKL) for QCMAP to tune the kernel parameter automatically and improve the classification performance. By introducing MKL, QCMAP has no parameter to be tuned. Experiments show that the proposed classifier has comparable or higher classification performance than conventional MKL classifiers.

Let p be an odd prime and m be any positive integer. Assume that n=2m and e is a positive divisor of m with m/e being odd. For the decimation factor $d=rac{(p^{m}+1)^2}{2(p^e+1)}$, the cross-correlation between the p-ary m-sequence ${tr_1^n(alpha^i)}$ and its decimated sequence ${tr_1^n(alpha^{di})}$ is investigated. The value distribution of the correlation function is completely determined. The results in this paper generalize the previous results given by Choi, Luo and Sun et al., where they considered some special cases of the decimation factor d with a restriction that m is odd. Note that the integer m in this paper can be even or odd. Thus, the decimation factor d here is more flexible than the previous ones. Moreover, our method for determining the value distribution of the correlation function is different from those adopted by Luo and Sun et al. in that we do not need to calculate the third power sum of the correlation function, which is usually difficult to handle.

In this paper, we propose an optimum access method for a phase change memory (PCM) with NAND strings. A PCM with a block erase interface is proposed. The method, which has a SET block erase operation and fast RESET programming, is proposed since the SET operation causes a slow access time for conventional PCM;. From the results of measurement, the SET-ERASE operation is successfully completed while the RESET-ERASE operation is incomplete owing to serial connection. As a result, the block erase interface with the SET-ERASE and RESET program method realizes a 7.7 times faster write speed compared than a conventional RAM interface owing to the long SET time. We also give pass-transistor design guidelines for PCM with NAND strings. In addition, the write-capability and write-disturb problems are investigated. The ERASE operation for the proposed device structure can be realized with the same current as that for the SET operation of a single cell. For the pass transistor, about 4.4 times larger on-current is needed to carry out the RESET operation and to avoid the write-disturb problem than the minimum RESET current of a single cell. In this paper, the SET programming method is also verified for a conventional RAM interface. The experimental results show that the write-capability and write-disturb problems are negligible.

Filter caches have been studied as an energy efficient solution. They achieve energy savings via selected access to L1 cache, but severely decrease system performance. Therefore, a filter cache system should adopt components that balance execution delay against energy savings. In this letter, we analyze the legacy filter cache system and propose Data Filter Cache with Partial Tag Cache (DFPC) as a new solution. The proposed DFPC scheme reduces energy consumption of L1 data cache and does not impair system performance at all. Simulation results show that DFPC provides the 46.36% energy savings without any performance loss.

Let m ≥ 3 be an odd positive integer, n=2m and p be an odd prime. For the decimation factor $d=rac{(p^{m}+1)(p^{m}+p-1)}{p+1}$, the cross-correlation between the p-ary m-sequence {tr1n(αt)} and its all decimated sequences {tr1n(αdt+l)} is investigated, where 0 ≤ l < gcd(d,pn-1) and α is a primitive element of Fpn. It is shown that the cross-correlation function takes values in {-1,-1±ipm|i=1,2,…p}. The result presented in this paper settles a conjecture proposed by Kim et al. in the 2012 IEEE International Symposium on Information Theory Proceedings paper (pp.1014-1018), and also improves their result.

We propose a method for downsizing line pictures to generate pixel line arts. In our method, topological properties such as connectivity of lines and segments are preserved by allowing slight distortion in the form of objects in input images. When input line pictures are painted with colors, the number of colors is preserved by our method.

Blind source separation is a technique that can separate sound sources without such information as source location, the number of sources, and the utterance content. Multi-channel source separation using many microphones separates signals with high accuracy, even if there are many sources. However, these methods have extremely high computational complexity, which must be reduced. In this paper, we propose a computational complexity reduction method for blind source separation based on frequency domain independent component analysis (FDICA) and examine temporal data that are effective for source separation. A frame with many sound sources is effective for FDICA source separation. We assume that a frame with a low kurtosis has many sound sources and preferentially select such frames. In our proposed method, we used the log power spectrum and the kurtosis of the magnitude distribution of the observed data as selection criteria and conducted source separation experiments using speech signals from twelve speakers. We evaluated the separation performances by the signal-to-interference ratio (SIR) improvement score. From our results, the SIR improvement score was 24.3dB when all the frames were used, and 23.3dB when the 300 frames selected by our criteria were used. These results clarified that our proposed selection criteria based on kurtosis and magnitude is effective. Furthermore, we significantly reduced the computational complexity because it is proportional to the number of selected frames.

In a convex drawing of a plane graph, all edges are drawn as straight-line segments without any edge-intersection and all facial cycles are drawn as convex polygons. In a convex grid drawing, all vertices are put on grid points. A plane graph G has a convex drawing if and only if G is internally triconnected, and an internally triconnected plane graph G has a convex grid drawing on an (n-1)×(n-1) grid if either G is triconnected or the triconnected component decomposition tree T(G) of G has two or three leaves, where n is the number of vertices in G. An internally triconnected plane graph G has a convex grid drawing on a 2n×2n grid if T(G) has exactly four leaves. In this paper, we show that an internally triconnected plane graph G has a convex grid drawing on a 6n×n2 grid if T(G) has exactly five leaves. We also present an algorithm to find such a drawing in linear time. This is the first algorithm that finds a convex grid drawing of such a plane graph G in a grid of polynomial size.

In the arsenal of resources for improving computer memory system performance, predictors have gained an increasing role in the past few years. They can suppress the latencies when accessing cache or main memory. In our previous work we proposed predictors that not only close the opened DRAM row but also predict the next row to be opened, hence the name ‘Complete Predictor’. It requires less than 10kB of SRAM for a 2GB SDRAM system. In this paper we evaluate how much additional hardware is needed and whether the activations of the predictors will slow down the DRAM controller.

This paper introduces a comparison of three automatic gait generation methods for quadruped robots: GA (Genetic Algorithm), GP (genetic programming) and CPG (Central Pattern Generator). It aims to provide a useful guideline for the selection of gait generation methods. GA-based approaches seek to optimize paw locus in Cartesian space. GP-based techniques generate joint trajectories using regression polynomials. The CPGs are neural circuits that generate oscillatory output from an input coming from the brain. Optimizations for the three proposed methods are executed and analyzed using a Webots simulation of the quadruped robot built by Bioloid. The experimental comparisons and analyses provided herein will be an informative guidance for research of gait generation method.

A ghost reduction algorithm for multiple angle sensors tracking objects under dual hypotheses is proposed. When multiple sensors and multiple objects exist on the same plane, the conventional method is unable to distinguish the real objects and ghosts from all possible pairs of measurement angle vectors. In order to resolve the issue stated above, the proposed algorithm utilizes tracking process considering dual hypotheses of real objects and ghosts behaviors. The proposed algorithm predicts dynamics of all the intersections of measurement angle vector pairs with the hypotheses of real objects and ghosts. Each hypothesis is evaluated by the residuals between prediction data and intersection. The appropriate hypothesis is extracted trough several data sampling. Representative simulation results demonstrate the effectiveness of the proposed algorithm.

We theoretically study the performance of multiple-input multiple-output (MIMO) free-space optical (FSO) systems using subcarrier quadrature modulation (SC-QAM) signaling. The system average symbol-error rate (ASER) is derived taking into account the atmospheric turbulence effects on the MIMO/FSO channel, which is modeled by log-normal and the gamma-gamma distributions for weak and moderate-to-strong turbulence conditions. We quantitatively discuss the influence of index of refraction structure parameter, link distance, and different MIMO configurations on the system ASER. We also analytically derive and discuss the MIMO/FSO average (ergodic) channel capacity (ACC), which is expressed in terms of average spectral efficiency (ASE), under the impact of various channel conditions. Monte Carlo simulations are also performed to validate the mathematical analysis, and a good agreement between numerical and simulation results is confirmed.

This paper deals with carrier frequency offset (CFO) estimation based on the minimum variance distortionless response (MVDR) criterion without using specific training sequences for interleaved orthogonal frequency division multiple access (OFDMA) uplink systems. In the presence of large CFOs, the estimator is proposed to find a new CFO vector based on the first-order Taylor series expansion of the one initially given. The problem of finding the new CFO vector is formulated as the closed form of a generalized eigenvalue problem, which allows one to readily solve it. Since raising the accuracy of residual CFO estimation can provide more accurate residual CFO compensation, this paper also present a decision-directed MVDR approach to improve the CFO estimation performance. However, the proposed estimator can estimate CFOs with less computation load. Several computer simulation results are provided for illustrating the effectiveness of the proposed blind estimate approach.

A removable HDD “iVDR” is an international standardized medium, which has HDD features such as a large capacity and high-speed data transfer, and also is removable and compatible. We discuss the concepts of the hardware-specifications designed by the iVDR Consortium and the history of the international standardization activities for iVDR. We also discuss application expansions through these standardization activities.

This paper proposes an improved color barycenter model (CBM) and its separation for automatic road sign (RS) detection. The previous version of CBM can find out the colors of RS, but the accuracy is not high enough for separating the magenta and blue regions and the influence of number with the same color are not considered. In this paper, the improved CBM expands the barycenter distribution to cylindrical coordinate system (CCS) and takes the number of colors at each position into account for clustering. Under this distribution, the color information can be represented more clearly for analyzing. Then aim to the characteristic of barycenter distribution in CBM (CBM-BD), a constrained clustering method is presented to cluster the CBM-BD in CCS. Although the proposed clustering method looks like conventional K-means in some part, it can solve some limitations of K-means in our research. The experimental results show that the proposed method is able to detect RS with high robustness.