A dual-modulus (divide-by-128/129) prescaler has been designed based on 0.25-µm CMOS technology employing new D-flip-flops. The new D-flip-flops are free from glitch problems due to internal charge sharing. Transistor merging technique has been employed to reduce the number of transistors and to secure reliable high-speed operation. At the 2.5-V supply voltage, the prescaler using the proposed dynamic D-flip-flops can operate up to the frequency of 2.95-GHz, and consumes about 10% and about 27% less power than Yuan/Svensson's and Huang's circuits, respectively.

Directional couplers with flat coupling are designed by using an asymmetrical coupled-HNRD-guide consisting of two HNRD guides of different cross sections arranged closely. First, propagation characteristics of the asymmetrical coupled-HNRD-guide are analyzed by the transverse resonance technique. Next, the whole directional couplers including tapered sections are designed from the S-parameters of the coupled HNRD guides derived from a superposition of the even-like and odd-like modes. Finally, the validity of the design procedure is confirmed by an em-simulator (HFSS).

This paper presents a practical implementation scheme of the variable gain amplifier (VGA) using a Cds photo coupler (Cds PC) as a variable resister at the feedback loop. The fundamental design policies of IF amplifier stage in superheterodyne receiver were described. We demonstrated the VGA's experimental results. The results indicated the excellent IIP3 of +25 dBm achieved by a gain of 15 dB, and the reasonable thermal stability and variable gain range. Third-order intermodulation distortion (IMD3) comparison between the proposed VGA and conventional PIN diode attenuation type VGA was evaluated and the result indicated that the proposed VGA surpassed the PIN VGA. The proposed VGA was practically fabricated in 455 kHz IF amplifier stage for an airborne VHF communication receiver in order to improve the large signal handling capability to eliminate numerous interferences resulting from the collocated airborne VHF communication systems on the aircraft.

Adaptive antenna is a promising to increase the spectral efficiency of mobile radio systems. We developed a compact, cost effective planar Butler Matrix as a beam forming network of a multi beam antenna. This circuit consists of a thin substrate that the conductor attaches to both sides, and two thick substrates that the ground conductor attaches to one side. In this circuit, coupling by crossover causes amplitude and phase error of the Butler Matrix. By narrowing the strip width of the crossover, crossover coupling can be suppressed 10 dB. The measurement results of the experimental 88 Butler Matrix were 0.75 dB amplitude deviation, 9.5 degree phase deviation and VSWR of less than 1.15 within the relative bandwidth of 10% at 900 MHz band.

As an enhancement mechanism for the end-to-end congestion control, AQM (Active Queue Management) can keep smaller queuing delay and higher throughput by purposefully dropping the packets at the intermediate nodes. Comparing with RED algorithm, although the PI (Proportional-Integral) controller for AQM designed by C. Hollot improves the stability, it seems unscientific to tune the controller parameters through trial-error, moreover the transient performance of the PI controller is not perfect, such as the regulating time is too long. In order to overcome this drawback, in this paper, the PID (Proportional-Integral-Differential) controller is proposed to speed up the responsiveness of AQM system. The controller parameters are tuned based on the determined gain and phase margins. The simulation results show that the integrated performance of the PID controller is obviously superior to that of the PI controller.

This paper describes a low-power-supply 2-GHz CMOS up-converter. A current-mode mixing method using current adding and self-switching mixers is proposed for 1-V operation. The current-mode up-converter achieves conversion gain of 6.7 dB and linearity of 6.5-dBm OIP3 at 1 V. Balanced configuration and DC offset canceller reduce LO leakage below -40 dBc even with 20-mV Vth mismatches. The bias circuit of the IC is designed to maintain constant conversion gain for variation of temperature for practical usage. The measurement results indicate the proposed up-converter is applicable for future wireless systems.

This paper proposes a multipath interference canceller (MPIC) employing multipath interference (MPI) replica generation (MIG) utilizing previously transmitted packet combining (PTPC), which is well-suited to incremental redundancy, in order to achieve a peak throughput of nearly 8 Mbps in a multipath fading environment in high-speed downlink packet access (HSDPA). In our scheme, more accurate MPI replica generation is possible by generating MPI replicas utilizing the soft-decision symbol sequence of the previously transmitted packets in addition to that of the latest transmitted packet. Computer simulation results elucidate that the achievable throughput of the MPIC employing MIG-PTPC is increased by approximately 100 kbps and 200 kbps and the required average received signal energy per symbol-to-background noise power spectrum density ratio (Es/N0) per antenna at the throughput of 0.8 normalized by the maximum throughput is improved by about 0.3 and 0.7 dB compared to that of the MPIC using the soft-decision symbol sequence after Rake combining of the last transmitted packet both in 2- and 3-path Rayleigh fading channels for QPSK and 16QAM data modulations, respectively. Furthermore, we clarify that the maximum peak throughput using the proposed MPIC with MIG-PTPC coupled with incremental redundancy achieves approximately 7 Mbps and 8 Mbps with 16QAM and 64QAM data modulations in a 2-path Rayleigh fading channel, respectively, within a 5-MHz bandwidth.

In this paper, a hierarchical bit mapping (HBM) scheme suitable for M-level quadrature amplitude modulation (M-QAM) packet transmission is presented. Generally, M-QAM, such as 16QAM or 64QAM, consists of multiple bits with differing bit error-rate quality. Because the packet error rate when using M-QAM is highly dependent on the performance of the "weakest" (poor quality) bits, the throughput of M-QAM packets can dramatically deteriorate especially in a multi-path environment. This paper proposes the use of a bit mapping scheme conceptually similar to hierarchical QAM to improve packet transmission throughput. For 16QAM under this scheme for example, as there are four bits in a 16QAM symbol, four independent packets can be simultaneously transmitted on each of the different bits when HBM is used. In doing so, at least two packets can be transmitted with a high probability of success even under poor transmission conditions, and under good transmission conditions, four packets can potentially be successfully transmitted. An interference cancellation (IC) method is then presented for HBM, with simulation results showing that the combination of HBM with IC results in very good performance. It was also determined that the HBM scheme can be used easily and effectively with hybrid ARQ.

This paper presents the results of field experiments on the pilot symbol assisted (PSA) coherent multistage interference canceller (COMSIC) receiver in the direct sequence code division multiple access (DS-CDMA) reverse link. The implemented COMSIC receiver comprising three cancellation stages employs PSA channel estimation and replica generation of multiple access interference (MAI) of other users. The experimental results demonstrate that the COMSIC receiver associated with antenna diversity reception and fast transmission power control (TPC) exhibits effectiveness in suppressing severe MAI in actual multipath fading channels. The transmission power of a mobile station (MS) when the COMSIC receiver is employed at a base station (BS) is reduced by approximately 2.0 and 4.0 dB compared to that with the matched filter (MF)-based Rake receiver when the ratios of the target signal energy per bit-to-interference power spectrum density ratio (Eb/I0) of the desired user to the target user are Δtarget= -6 and -9 dB, respectively. Furthermore, for the COMSIC receiver, the transmission power of a MS at the average bit error rate (BER) of 10-3 with antenna diversity is decreased by approximately 7.5 and 11 dB compared to that without antenna diversity when the Δtarget values are -6 and -9 dB, respectively.

We apply newly developed rigorous modal transmission-line theory (MTLT) to evaluate optimal design conditions on optical power coupling in grating-assisted directional couplers (GADCs) with two or three guiding channels. By defining a power distribution ratio (PDR) and coupling efficiency (CE) amenable to the rigorous analytical solutions of MTLT, we explicitly analyze the power coupling characteristics of TE modes propagating in GADCs. The numerical results reveal that the incident power is optimally coupled into the desired guiding channel if the powers of rigorous modes excited at the input boundary of grating-assisted coupler are equally partitioned.

This paper investigates the impact of inter-carrier interference (ICI) due to Doppler spread on the packet error rate (PER) performance in Orthogonal Frequency and Code Division Multiplexing (OFCDM) packet wireless access employing turbo coding in a multipath fading channel, and describes the optimization of the sub-carrier spacing, Δ f, i.e., the number of sub-carriers, Nc, with an approximate 50-100 MHz bandwidth. Simulation results show that although the uncoded OFCDM in a 1-path flat Rayleigh fading channel is affected by the ICI caused by the Doppler spread when the maximum Doppler frequency, fD, becomes more than 5% of Δ f, OFCDM employing turbo coding in a 24-path Rayleigh fading channel is robust against Doppler spread and the degradation is not apparent until fD reaches more than 10% of Δ f. This is because the turbo coding gain and the frequency diversity effect compensate for the degradation due to ICI. Meanwhile, the PER performance with a larger Nc is degraded, since the effect of the error correction capability becomes smaller due to the larger variance of the despread OFCDM symbols associated with the narrower spreading bandwidth in the frequency domain. Consequently, along with the packet frame efficiency for accommodating the guard interval to compensate for the maximum multipath delay time of 1 µsec, we clarify that the optimum number of sub-carriers is approximately 512-1024 (the corresponding Δ f becomes 156.3-78.1 kHz) for broadband OFCDM packet wireless access assuming a 50-100 MHz bandwidth.

In an orthogonal frequency division multiplexing (OFDM) system, the bit error performance is degraded in the presence of multiple propagation paths whose excess delays are longer than the Guard Interval (GI), because the orthogonality between subcarriers cannot be maintained. In this paper, we propose a new OFDM demodulation method with a variable-length effective symbol and a multi-stage inter-carrier interference (ICI) canceller, in order to improve the bit error performance in the presence of multipaths whose excess delays are longer than the GI. The influence of the inter-symbol interference (ISI) is eliminated by the variable-length effective symbol, and then the ICI component is reduced by the multi-stage ICI canceller. The principle of the proposed method is explained, and the performance of the proposed method is then evaluated by computer simulation. The results show that the proposed method improves the system availability under more various multipath fading environments without changing the system parameters.

Frequency modulation (FM) noise spectroscopy with diode laser is applied to high-resolution Doppler-free spectroscopy of Cs atomic vapor near a dielectric surface with evanescent-wave pump-probe configuration. Both high resolution and high sensitivity are realized by using an extremely simple experimental setup, in which no sweep or precise tuning of laser frequency are required. Several experimental configurations of optical near-field spectroscopy are demonstrated, which is useful for an extensive study of resonant interactions of atoms and microscopic electronic systems in optical near-fields.

A novel compact T/R (Transmit/Receive) switching circuit for wideband T/R modules has been proposed. It employs quadrature couplers and gate-and-drain-driven HPAs to remove circulators or T/R switches from a conventional T/R module, and T/R switching is made with controlling biasing conditions of the FETs in HPAs. Furthermore, an optimum biasing condition and design of output matching circuit of the HPA have been studied to reduce loss in RX-mode, and the validity of the method has been confirmed by measurements.

This paper proposes a compiler generation method for PEAS-III (Practical Environment for ASIP development), which is a configurable processor development environment for application domain specific embedded systems. Using the PEAS-III system, not only the HDL description of a target processor but also its target compiler can be generated. Therefore, execution cycles and dynamic power consumption can be rapidly evaluated. Two processors and their derivatives were designed using the PEAS-III system in the experiment. Experimental results show that the trade-offs among area, performance and power consumption of processors were analyzed in about twelve hours and the optimal processor was selected under the design constraints by using generated compilers and processors.

We calculated linear and nonlinear responses of a Kerr nonlinear microsphere sandwiched by two prisms using the excitation of whispering gallery modes due to near-field coupling. As numerical calculations, the finite-difference time-domain method that takes into account the Kerr nonlinear effect was used. We dealt with two types of spheres, i.e., the Kerr-material sphere and the dielectric sphere coated by the Kerr material. It was found that the optical switching phenomena are induced in such spheres. The switching results from the fact that the variations of the refractive index of the nonlinear spheres affect the excitation condition of the whispering gallery modes.

The network duplicating can achieve significant improvements of the Local Area Network (LAN)'s performance, availability, and security. For LAN duplicating, a Dual-Path Ethernet Module (DPEM) is developed. Since a DPEM is simply located at the front end of any network device as a transparent add-on type independent hardware machine, it does not require sophisticated server reconfiguration. We examine the desirable properties and the characteristics on the Dual-LAN structure. Our evaluation results show that the developed scheme is more efficient than the conventional Single-LAN structures in various aspects.

This paper presents a case study of synthesis of the industrial embedded microcontroller HT48100 and analysis of performance, cost and software compatibility for its implementation alternatives, using the hardware/software co-design system for microcontrollers/microprocessors PIPER-II. The synthesis tool accepts as input the instruction set architecture (behavioral) specification, and produces as outputs the pipelined RTL designs with their simulators, and the reordering constraints which guide the compiler backend to optimize the code for the synthesized designs. A compiler backend is provided to optimize the application software according to the reordering constraints. The study shows that the co-design approach was able to help the original design team to analyze the architectural properties, identify inefficient architecture features, and explore possible architectural improvements and their impacts in both hardware and software. Feasible future upgrades for the microcontroller family have been identified by the study.

This paper considers a reconfiguration problem on a processor array model based on single-and-half-track switches, which is proposed for a fault tolerance technique at the fabrication time. The focus of this paper is to achieve the optimal reconfigurability, which means that whenever there exists a solution for successful reconfiguration, the designed method can find the solution. The paper consists of two parts. In the first part, we show two essential constraints that have been assumed in most of the previous studies, and make four reconfiguration classes that differ in the assumed essential constraints. Then, we present some inclusion relations among the four reconfiguration classes. As a result, it becomes clear that the most restrictive class including most of the previous methods never achieves the truly optimal reconfigurability. In the second part, we present a reconfiguration method based on sequential routing (RMSR). Although the worst-case time complexity of the RMSR is exponential in the number of processing elements, the reconfigurability of the RMSR is optimal within the most restrictive reconfiguration class. The effectiveness of the RMSR is shown by a computer simulation.

Model checking is a technique that can make a verification for finite state systems absolutely automatic. We propose a method for automatic verification of fault-tolerant concurrent systems using this technique. Unlike other related work, which is tailored to specific systems, we are aimed at providing an approach that can be used to verify various kinds of systems against fault tolerance. The main obstacle in model checking is state explosion. To avoid the problem, we design this method so that it can use a symbolic model checking tool called SMV (Symbolic Model Verifier). Symbolic model checking can overcome the problem by expressing the state space and the transition relation by Boolean functions. Assuming that a system to be verified is modeled as a guarded command program, we design a modeling language and propose a translation method from the modeling language to the input language of SMV. We show the results of applying the proposed method to various examples to demonstrate the feasibility of the method.