This paper presents highly reliable multiple-valued one-phase signalling for an asynchronous on-chip communication link under process, supply-voltage and temperature variations. New multiple-valued dual-rail encoding, where each code is represented by the minimum set of three values, makes it possible to perform asynchronous communication between modules with just two wires. Since an appropriate current level is individually assigned to the logic value, a sufficient dynamic range between adjacent current signals can be maintained in the proposed multiple-valued current-mode (MVCM) circuit, which improves the robustness against the process variation. Moreover, as the supply-voltage and the temperature variations in smaller dimensions of circuit elements are dominated as the common-mode variation, a local reference voltage signal according to the variations can be adaptively generated to compensate characteristic change of the MVCM-circuit component. As a result, the proposed asynchronous on-chip communication link is correctly operated in the operation range from 1.1 V to 1.4 V of the supply voltage and that from -50 to 75 under the process variation of 3σ. In fact, it is demonstrated by HSPICE simulation in a 0.13-µm CMOS process that the throughput of the proposed circuit is enhanced to 435% in comparison with that of the conventional 4-phase asynchronous communication circuit under a comparable energy dissipation.

Generalized selection combining (GSC) was recently proposed as a low-complexity diversity combining technique for diversity-rich environments. This letter proposes a multi-hop Decode-and-Forward Relaying (MDFR) scheme in conjunction with GSC and describes its performance in terms of average bit error probability. We have shown that the proposed protocol offers a remarkable diversity advantage over direct transmission as well as the conventional decode-and-forward relaying (CDFR) scheme. Simulation results are also given to verify the analytical results.

In this paper, multiconductor transmission line (MTL) modelling is used to characterize the frequency response and dispersion of the low-voltage outdoor powerline channel. The analysis focuses on a single transmitter-to-receiver link and all the possible connection schemes associated with that link. By resorting to modal analysis, approximate analytical upper bounds of the channel frequency-response are derived for simplified but representative network configurations involving power cables with star-quad cross-section. Numerical solution of the MTL equations is used to validate the theoretical work and to show the dispersion of the channel frequency-responses, which results to be of the order of 20 dB.

In deep submicron era, wire delay is no longer negligible and is becoming a dominant factor of the system performance. To cope with the increasing wire delay, several state-of-the-art architectural synthesis flows have been proposed for the distributed register architectures by enabling on-chip multicycle communication. In this article, we present a new performance-driven criticality-aware synthesis framework CriAS targeting regular distributed register architectures. To achieve high system performance, CriAS features a hierarchical binding-then-placement for minimizing the number of performance-critical global data transfers. The key ideas are to take time criticality as the major concern at earlier binding stages before the detailed physical placement information is available, and to preserve the locality of closely related critical components in the later placement phase. The experimental results show that CriAS can achieve an average of 14.26% overall performance improvement with no runtime overhead as compared to the previous art.

This paper aims at analyzing the performance of an anonymous communication system 3-Mode Net with respect to the number of relay nodes required for communication and sender anonymity. As for the number of relay nodes, we give explicit formulas of the probability distribution, the expectation, and the variance. Considering sender anonymity, we quantify the degree of sender anonymity under a situation where some relay nodes collude with each other. The above analyses use random walk theory, a probability generating function, and their properties. From obtained formulas, we show several conditions for avoiding a situation where the number of relay nodes becomes large, and for providing high sender anonymity. Furthermore, we investigate the relationship between the number of relay nodes and sender anonymity, and give a condition for providing a better performance of 3 MN.

This paper presents a highly efficient multi-band power amplifier (PA) with a novel reconfigurable configuration. It consists of band-switchable matching networks (BS-MNs) and a biasing network (BS-BN) that are available for multi-band operation. BS-MNs with a susceptance block (SB) require a shorter transmission line (TL) than those without the SB at some target impedances. This paper theoretically derives the relationships of the required TL lengths for the BS-MN with or without the SB and the target impedances. The required TL lengths at the target impedances are evaluated numerically in order to discuss the advantages of the proposed configuration. The BS-BN employing switches for band switching can supply DC power to an amplification device without additional DC power dissipation because the DC bias current does not flow through the switches. Numerical analyses confirm that a BS-BN can be configured with low loss in multiple bands. Based on the proposed configuration, a 1/1.5/1.9/2.5-GHz quad-band reconfigurable PA is designed and fabricated employing RF microelectro mechanical systems switches and partitioned low temperature co-fired ceramics substrates. The fabricated 1 W-class PA achieves a high output power of greater than 30 dBm and a maximum power added efficiency of over 40% in all operating modes.

This paper presents a novel parallel boost converter using switched capacitors The switches are controlled not only by periodic clock but also by voltage-mode threshold that is a key to realize strong stability, fast transient and variable output. The dynamics is described by a piecewise linear equation, the mapping procedure is applicable and the system operation can be analyzed precisely.

We investigated the effect of a high-speed power line communication (PLC) signal induced into a very high-speed digital subscriber line (VDSL) system by conductive coupling based on a network model. Four electronic devices with AC mains and telecommunication ports were modeled using a 4-port network, and the parameters of the network were obtained from measuring impedance and transmission loss. We evaluated the decoupling factor from the mains port to the telecommunication port of a VDSL modem using these parameters for the four electric and electronic devices. The results indicate that the mean value of the decoupling factor for the differential and common mode signals were more than 88 and 62 dB, respectively, in the frequency range of a PLC system. Taking the following parameters into consideration; decoupling factor Ld, the average transmission signal powers of VDSL and PLC, desired and undesired (DU) ratio, and transmission loss of a typical 300-m-long indoor telecommunication line, the VDSL system cannot be disturbed by the PLC signal induced into the VDSL modem from the AC mains port in normal installation.

Various types of optical connector with a precise alignment mechanism and long-term reliability have been researched, developed and improved during about 30 years since practical optical communication systems were first introduced in Japan in 1981. The main issues related to optical fiber connector development changed from performance improvement to miniaturization, cost reduction and ease of field assembly when optical communication systems expanded from optical trunk networks to optical access networks. Various different key technologies for optical connectors have been developed to meet these requirements, and a large number of optical connectors are currently being used for the flexible and efficient construction, maintenance and operation of optical access networks. This paper describes the structure, features, and basic technologies of the optical connectors employed in optical access networks in Japan and their standardization and future prospects.

In this letter, we develop an analytical model for the drive-thru applications based on the IEEE 802.11p WAVE. The model shows that prioritizing the bitrates via the 802.11e EDCA mechanism leads to significant throughput improvement.

A method of fault diagnosis was proposed for power electronics circuits based on S transforms similarity. At first, the standard module time-frequency matrixes of S transforms for all fault signals were constructed, then the similarity of fault signals' module time-frequency matrixes to standard module time-frequency matrixes were calculated, and according to the principle of maximum similarity, the faults were diagnosed. The simulation result of fault diagnosis of a thyristor in a three-phase full-bridge controlled rectifier shows that the method can accurately diagnose faults and locate the fault element for power electronics circuits, and it has excellent performance for noise robustness and calculation complexity, thus it also has good practical engineering value in the solution to the fault problems for power electronics circuits.

Chip-to-chip serial data communication is superposed on power supply over common Vdd/Vss connections through chip, package, and board traces. A power line transceiver demonstrates half duplex spiking communication at more than 100 Mbps. A pair of transceivers consumes 1.35 mA from 3.3 V, at 130 Mbps. On-chip power line LC low pass filter attenuates pseudo-differential communication spikes by 30 dB, purifying power supply current for internal circuits. Bi-directional spiking communication was successfully examined in a 90-nm CMOS prototype setup of on-chip waveform capturing. A micro controller forwards clock pulses to and receives data streams from a comparator based waveform capturer formed on a different chip, through a single pair of power and ground traces. The bit error rate is small enough not to degrade waveform acquisition capability, maintaining the spurious free dynamic range of higher than 50 dB.

For multiple-input multiple-output (MIMO) spatial multiplexing, signal separation/detection is one of the most important signal processing parts, so that signal separation/detection schemes are being vigorously researched. As a promising signal separation/detection scheme, frequency-domain iterative soft interference cancellation (FD-SIC) has been proposed. Although iterative FD-SIC can provide the transmission performance close to lower bound for QPSK, the accuracy of signal separation/detection significantly degrades in case of high level data modulation. Therefore, in this paper, we propose layered soft interference cancellation (LSIC). We consider single-carrier (SC)-MIMO spatial multiplexing with frequency domain equalization (FDE). The achievable frame error rate (FER) performances with LSIC are evaluated by computer simulation to show that LSIC can provide better FER performance than iterative FD-SIC.

Although the topic of multiple-input multiple-output (MIMO) based orthogonal frequency division multiplexing (OFDM) over different fading channels is well investigated, its closed form symbol error rate (SER) expressions and performance results employing orthogonal space time block codes (OSTBCs) over uncorrelated frequency-selective Nakagami-m fading channels are still not available. The closed form expressions are extremely useful for evaluating system's performance without carrying out time consuming simulations. Similarly, the performance results are also quite beneficial for determining the system's performance in the sense that many practical wireless standards extensively employ MIMO-OFDM systems in conjunction with M-ary quadrature amplitude modulation (M-QAM) constellation. This paper thus, derives exact closed form expressions for the SER of M-ary Gray-coded one and two dimensional constellations when an OSTBC is employed and Nt transmit antennas are selected for transmission over frequency-selective Nakagami-m fading channels. For this purpose, first an exact closed-form of average SER expression of OSTBC based MIMO-OFDM system for M-ary phase shift keying (M-PSK) using traditional probability density function (PDF) approach is derived. We then compute exact closed form average SER expressions for M-ary pulse amplitude modulation (M-PAM) and M-QAM schemes by utilizing this generalized result. These expressions are valid over both frequency-flat and frequency-selective Nakagami-m fading MIMO channels and can easily be evaluated without using any numerical integration methods. We also show that average SER of MIMO-OFDM system using OSTBC in case of frequency-selective Rayleigh fading channels remains independent to the number of taps, L of that fading channel and the performance of the same system for two-tap un-correlated Rayleigh and Nakagami-m fading channels is better than that of the correlated one. Moreover, Monte Carlo simulation of MIMO-OFDM system using multiple transmit and receive antennas for different modulations is presented to validate our theoretical results. Finally, due to availability of closed form expressions, we further provide the performance results of MIMO-OFDM system over frequency-selective Nakagami-m fading channels employing (M-QAM) using OSTBCs under the transmission rate equal to 1, 2 and 3 bit(s)/s/Hz, respectively.

The design of microstrip bandpass filters using stepped-impedance resonators (SIRs) is examined. The passband center frequency for the WCDMA-FDD (uplink band) Japanese cellular system is 1950 MHz with a 60-MHz bandwidth. The SIR physical characteristic can be designed using a SIR characteristic chart based on second harmonic suppression. In our filter design, passband design charts were obtained through the design procedure. Tchebycheff and maximally flat bandpass filters of any bandwidth and any number of steps can be designed using these passband design charts. In addition, sharp skirt characteristics in the passband can be realized by having two transmission zeros at both adjacent frequency bands by using open-ended quarter-wavelength stubs at input and output ports. A new even-mode harmonics suppression technique is proposed to enable a wide rejection band having a high suppression level. The unloaded quality factor of the resonator used in the proposed filters is greater than 240.

A direct-conversion receiver integrated with the CMOS subharmonic frequency tripler (SFT) for V-band applications is designed, fabricated and measured using 0.13-µm CMOS technology. The receiver consists of a low-noise amplifier, a down-conversion mixer, an output buffer, and an SFT. A fully differential SFT is introduced to relax the requirements on the design of the frequency synthesizer. Thus, the operational frequency of the frequency synthesizer in the proposed receiver is only 20 GHz. The fabricated receiver has a maximum conversion gain of 19.4 dB, a minimum single-side band noise figure of 10.2 dB, the input-referred 1-dB compression point of -20 dBm and the input third order inter-modulation intercept point of -8.3 dB. It draws only 15.8 mA from a 1.2-V power supply with a total chip area of 0.794 mm0.794 mm. As a result, it is feasible to apply the proposed receiver in low-power wireless transceiver in the V-band applications.

A new pixel design and driving method for active matrix organic light emitting diode (AMOLED) displays that use low-temperature polycrystalline silicon thin-film transistors (LTPS-TFTs) with a voltage programming method are proposed and verified using the SPICE simulator. We had employed an appropriate TFT model in SPICE simulation to demonstrate the performance of the pixel circuit. The OLED anode voltage variation error rates are below 0.35% under driving TFT threshold voltage deviation (Δ Vth = 0.33 V). The OLED current non-uniformity caused by the OLED threshold voltage degradation (Δ VTO = +0.33 V) is significantly reduced (below 6%). The simulation results show that the pixel design can improve the display image non-uniformity by compensating for the threshold voltage deviation in the driving TFT and the OLED threshold voltage degradation at the same time.

We experimentally studied the polarization mode dispersion (PMD) tolerance of an feed-forward equalizer (FFE) electronic dispersion compensation (EDC) IC in the absence of adaptive control, in 43-Gbit/s RZ-DQPSK transmission. Using a 3-tap FFE IC composed of InP HBTs, differential group delay (DGD) tolerance at a 2-dB Q penalty is shown to be extended from 25 ps to up to 29 ps. When a polarization scrambler is used, the tolerance is further extended to 31 ps. This value is close to the tolerance obtained with adaptive control, without a polarization scrambler.

In this paper, we propose a new subcarrier allocation algorithm for a downlink OFDMA relay network with multicells. In the proposed algorithm, subcarriers are allocated to users and relays to maximize the overall sum of the achievable rate under fairness constraints. Simulation results show that the proposed algorithm achieves higher data rate than the static algorithm and reduces the outage probability compared to the static and greedy algorithms.

A low-voltage quadrature up-conversion CMOS mixer for 5-GHz wireless communication applications is designed with a TSMC 0.18-µm process. The fold-switching technique is used to implement the low-voltage double balanced quadrature mixer. A miniature lumped-element microwave broadband rat-race hybrid and RLC shift network are used for the local oscillator and the intermediate frequency port design, respectively. The measured results demonstrate that the mixer can reach a high conversion gain, a low noise figure (NF), and a high linearity. The mixer exhibits improvement in noise, conversion gain, and image rejection. The mixer shows a conversion gain of 16 dB, a noise figure of 12.8 dB, an image rejection of 45 dB, while dissipating 15.5 mW for an operating voltage at 1 V.