This paper proposes a design technique to reduce the power dissipation of CML driver for on-chip transmission-lines. CML drivers can operate at higher frequency than conventional static CMOS logic drivers. On the other hand, the power dissipation is larger than that of CMOS static logic drivers. The proposed method reduces the power dissipation by using an impedance-unmatched driver instead of the conventional impedance-matched driver. Measurement results show that the proposed method reduces the power dissipation by 32% compared with a conventional design at 12.5 Gbps.

A de-embedding technique for the measurement of very small parasitic capacitances of package or small module interconnects is presented. At high frequencies small parasitic capacitances become important, and measurement probes can strongly affect measurement results. The present technique is based on additional measurements with only one tip of the probe touching one conductor, while the second tip is kept floating on the substrate. A necessary condition for its application is that the measured capacitance does not depend on the position of the floating probe tip. Measurements with inverted probe tip polarities are also used. In this way, the capacitances between probe tips and DUT can be estimated together with the parasitic capacitances of interest. Depending on the required accuracy, de-embedding of different orders have been introduced, which consider capacitance configurations of increasing complexity. The technique requires the solution of one or more systems of non-linear equations. In the present example the minimization of the norm of the residual of the system has been treated as a least squares problem, and has been solved numerically with MATLAB. The accuracy of the measurement can be also approximately estimated with the residual. As application example, a small module with power and ground planes has been considered. Two different probes have been used. Even though the stray capacitances of the probes are very different, the values of the extracted parasitic capacitances are in agreement with each other. The accuracy has been verified also with simulation results. To this purpose, a combination of known formulas from the literature, a 2D Finite Element Method (FEM) tool and a 3D Boundary Element Method (BEM) tool have been used. A high accuracy can be obtained, even when a strong capacitive coupling between probe ground and DUT is present. The technique can be applied also when only a subset of measurement results are available.

MIMO systems using a space division multiplexing (SDM) technique in which each transmit antenna sends an independent signal substream have been studied as one of the successful applications to increase data rates in wireless communications. The throughput of a MIMO channel can be maximized by using an eigenbeam-SDM (E-SDM) technique, and this paper investigates the practical performance of 22 and 44 MIMO E-SDM based on indoor measurements. The channel capacity and bit error rate obtained in various uniform linear array configurations are evaluated and are compared with the corresponding values for conventional SDM. Analysis results show that the bit error rate performance of E-SDM is better than that of SDM and that E-SDM gives better performance in line-of-sight (LOS) conditions than in non-LOS ones. They also show that the performance of E-SDM in LOS conditions depends very much on the array configuration.

A new method of cancellation of IM3 using current feedback has been proposed for a multi-stage RFIC amplifier. In order to cancel the IM3 present in an output signal of the amplifier, the IIP3 level and IM3 phase of the amplifier are adjusted by means of feedback circuit techniques, so that the target specification is satisfied. By estimating the IIP3 level and IM3 phase variations for two states in situations with and without feedback possessing linear factors, the parameters of a feedback circuit can be calculated. To confirm the validity of the method, we have investigated two approaches; one including an analytical approach to designing a two-stage feedback amplifier, achieving an IIP3 level improvement of 14.8 dB. The other method involves the fabrication of single-stage amplifiers with and without feedback, operating at 850 MHz, both of which were designed as an integrated circuit using a 0.18 µm SiGe BiCMOS process. The fabricated IC's were tested using a load-pull measurement system, and a good agreement between the estimated and measured IIP3 level and IM3 phase variations has been achieved. Further studies show that the error in these variations, as estimated by the method, has been found to be less than 1.5 dB and 15 degrees, respectively, when the load admittance at 1701 MHz was greater than 1/50 S.

With the rapid progress of electronic and information technology, an expectation for the realization of body area network (BAN) has risen. However, on-body transmission characteristics are greatly dependent on the frequency, and a high-speed transmission is difficult due to the remarkable signal attenuation at higher frequencies. In this study, we proposed a pulse transmission system with the frequencies at dozens of mega-hertzes. The system was based on an impulse radio (IR) scheme with bi-phase modulation. By using the frequency-dependent finite difference time domain (FD2TD) method, we investigated the on-body transmission characteristics and derived a path loss expression. Based on the transmission characteristics, we also investigated the influences of white Gaussian noises and other narrow-band interferences on the communication link budget and bit error rate (BER) performance. The results have shown the feasibility of the proposed on-body IR communication system.

We propose a method of crosstalk analysis for two bent transmission lines with vias at both ends on a PCB using a circuit-concept approach in the quasi-static condition. In this condition, the electromagnetic fields can be approximately estimated by the quasi-static terms of the accurate Green's function in an inhomogeneous medium. Thus we obtain a circuit model in an ABCD matrix by taking account of the fields generated by a longitudinal line and a vertical via on a PCB. To verify the proposed approach, we conducted some experiments and compared our approach's results with measured results and a commercial electromagnetic solver's results.

In this paper, a new operational amplifier is presented that improves the specifications such as dc gain, common mode rejection ratio. To obtain these improvements, we have used the two important concepts of feedback and bulk amplification.

The purpose of our study is to develop an algorithm that would enable the automated detection of lacunar infarct on T1- and T2-weighted magnetic resonance (MR) images. Automated identification of the lacunar infarct regions is not only useful in assisting radiologists to detect lacunar infarcts as a computer-aided detection (CAD) system but is also beneficial in preventing the occurrence of cerebral apoplexy in high-risk patients. The lacunar infarct regions are classified into the following two types for detection: "isolated lacunar infarct regions" and "lacunar infarct regions adjacent to hyperintensive structures." The detection of isolated lacunar infarct regions was based on the multiple-phase binarization (MPB) method. Moreover, to detect lacunar infarct regions adjacent to hyperintensive structures, we used a morphological opening processing and a subtraction technique between images produced using two types of circular structuring elements. Thereafter, candidate regions were selected based on three features -- area, circularity, and gravity center. Two methods were applied to the detected candidates for eliminating false positives (FPs). The first method involved eliminating FPs that occurred along the periphery of the brain using the region-growing technique. The second method, the multi-circular regions difference method (MCRDM), was based on the comparison between the mean pixel values in a series of double circles on a T1-weighted image. A training dataset comprising 20 lacunar infarct cases was used to adjust the parameters. In addition, 673 MR images from 80 cases were used for testing the performance of our method; the sensitivity and specificity were 90.1% and 30.0% with 1.7 FPs per image, respectively. The results indicated that our CAD system for the automatic detection of lacunar infarct on MR images was effective.

A simple, yet effective geometric method is presented to construct the signature sequences for multicarrier code-division multiple access (MC-CDMA) systems. By minimizing the correlation of the effective signature vectors, the signature sequences are recursively determined via projection onto a properly constructed subspace. Conducted simulations verify the effectiveness of the method.

In this paper, a novel independent component analysis (ICA) approach is proposed, which is robust against the interference of impulse noise. To implement ICA in a noisy environment is a difficult problem, in which traditional ICA may lead to poor results. We propose a method that consists of noise detection and image signal recovery. The proposed approach includes two procedures. In the first procedure, we introduce a self-organizing map (SOM) network to determine if the observed image pixels are corrupted by noise. We will mark each pixel to distinguish normal and corrupted ones. In the second procedure, we use one of two traditional ICA algorithms (fixed-point algorithm and Gaussian moments-based fixed-point algorithm) to separate the images. The fixed-point algorithm is proposed for general ICA model in which there is no noise interference. The Gaussian moments-based fixed-point algorithm is robust to noise interference. Therefore, according to the mark of image pixel, we choose the fixed-point or the Gaussian moments-based fixed-point algorithm to update the separation matrix. The proposed approach has the capacity not only to recover the mixed images, but also to reduce noise from observed images. The simulation results and analysis show that the proposed approach is suitable for practical unsupervised separation problem.

An adaptive tri-threshold dynamic call admission control scheme for wideband mobile cellular networks is proposed. The relationship between the Channel Utilization and the Weighted Handover Dropping Probability versus traffic loadings are investigated. This scheme supports voice, data and multimedia services with differentiated QoS.

In this paper, we discuss the effects of switch resistances on the step response of switched-capacitor (SC) circuits, especially multiplying digital-to-analog converters (MDACs) in pipelined analog-to-digital converters. Theory and simulation results reveal that the settling time of MDACs can be decreased by optimizing the switch resistances. This switch resistance optimization does not only effectively increase the speed of single-bit MDACs, but also of multi-bit MDACs. Moreover, multi-bit MDACs are faster than the single-bit MDACs when slewing occurs during the step response. With such an optimization, the response of the switch will be improved by up to 50%.

A quadrature demodulator (QDEMOD) for WCDMA direct-conversion receiver using a common-base input stage is reported. A common-base input stage is robust to parasitic elements and is suitable for integrating on-chip matching circuits to realize small and low-cost RF front-end modules. However, a common-mode blocker signal, such as the transmitter (TX) leakage signal, degrades the noise performance due to DC current increase and intermodulation distortion of the TX leakage signal and noise. We propose a QDEMOD with a common-base input stage capable of suppressing the TX leakage signal using symmetrical inductors. The QDEMOD was fabricated using SiGe BiCMOS process with fT of 75 GHz. The measured results show that the NF degradation does not occur until the TX leakage signal input is larger than -10 dBm.

This paper discusses the resistive termination of on-chip high-performance interconnects. Resistive termination is effective to improve the bandwidth of on-chip interconnects, on the other hands, increases the power dissipation and the area. Therefore trade-off analysis about resistive termination is necessary. This paper proposes a method to determine the termination of on-chip interconnects. The termination derived by the proposed method provides minimum sensitivity to process variation as well as maximum eye-opening in voltage.

When we consider user's convenience for electronic transactions, it might be desirable to generate a digital signature using biometrics. However, it is not easy nor practicable in today's communications environment because of inaccurate measuring and potential hill-climbing attacks with regard to biometrics, unless specific hardware storage is provided for manipulating signature keys or biometric templates securely. In this paper, we study a simple practical method for biometrics based digital signature generation without such restriction. It is based on the existing tools in software in our proposed model where a general digital signature such as RSA can be applied without losing its security. This is not a cryptography paper but rather written from the practical perspectives.

This paper proposes a Mel-Wiener filter to enhance Mel-LPC spectra in the presence of additive noise. The transfer function of the proposed filter is defined by using a first-order all-pass filter instead of unit delay. The filter coefficients are estimated based on minimization of the sum of the square error on the linear frequency scale without applying the bilinear transformation and efficiently implemented in the autocorrelation domain. The proposed filter does not require any time-frequency conversion, which saves a large amount of computational load. The performance of the proposed system is comparable to that of ETSI AFE. The optimum filter order is found to be 3, and thus filtering is computationally inexpensive. The computational cost of the proposed system except VAD is 53% of ETSI AFE.

This paper presents a novel method to increase an impedance of a current source. The proposed circuit with a cascode and gain-boosting configuration is also presented. The operation has been confirmed by simulation using a 0.18 µm CMOS technology.

List decoding is a process by which a list of decoded words is output instead of one. This works for a larger noise threshold than the traditional algorithms. Under some circumstances it becomes useful to be able to find out the actual message from the list. List decoding is assumed to be successful, meaning, the sent message features in the decoded list. This problem has been considered by Guruswami. In Guruswami's work, this disambiguation is done by sending supplementary information through a costly, error-free channel. The model is meaningful only if the number of bits of side information required is much less than the message size. But using deterministic schemes one has to essentially send the entire message through the error free channel. Randomized strategies for both sender and receiver reduces the required number of bits of side information drastically. In Guruswami's work, a Reed-Solomon code based hash family is used to construct such randomized schemes. The scheme with probability utmost ε reports failure and returns the whole list. The scheme doesn't output a wrong message. Also, in Guruswami's work some theoretical bounds have been proved which lower bound the bits of side information required. Here we examine whether the gap between the theoretical bounds and existing schemes may be narrowed. Particularly, we use the same scheme as in Guruswami's work, but use hash families based on Hermitian curve and function fields of Garcia-Stichtenoth tower and analyze the number of bits of side information required for the scheme.

A 1-V operational sigma-delta modulator with a second-order passive switched capacitor filter is designed and fabricated by using a 90 nm CMOS process. No gate-voltage bootstrapped scheme is adopted to drive analog switches, and the voltage gain of a comparator is chosen to be 94 dB. The experimental results show that the peak SNR reached 68.9 dB with a frequency bandwidth of 40 kHz when the clock was 40 MHz.

This paper presents an automated design of linear and non-linear differential analog circuits accelerated by reuse of genetic operations. The system first synthesizes circuits using pairs of simplified MOSFET model. During the evolutionary process, genetic operations that improve circuit characteristics are stored in a database and reused to effectively obtain a better circuit. Simplified elements in a generated circuit are replaced by MOSFETs and optimization of the transistor size is performed using an optimizer available in market if necessary. The capability of this method is demonstrated through experiments of synthesis of a differential voltage amplifier, a circuit having cube-law characteristic in differential mode and square-law characteristic in common-mode, and a dB-linear VGA (Variable Gain Amplifier). The results show the reuse of genetic operations accelerates the synthesis and success rate becomes 100%.