We developed a comprehensive simulation system for evaluating satellite-based navigation services in highly built-up areas; the system can accommodate Global Positioning System (GPS) multipath effects, as well as line-of-sight (LOS) and dilution of position (DOP) issues. For a more realistic simulation covering multipath and diffracted signal propagations, a 3D-ray tracing method was combined with a satellite orbit model and three-dimensional (3D) geographic information system (GIS) model. An accuracy estimation model based on a 3D position determination algorithm with a theoretical delay-locked loop (DLL) correlation computation could measure the extent to which multipath mitigation improved positioning accuracy in highly built-up areas. This system could even capture the multipath effect from an invisible satellite, one of the greatest factors in accuracy deterioration in highly built-up areas. Further, the simulation results of satellite visibility, DOP, and multipath occurrence were mapped to show the spatial distribution of GPS availability. By using object-oriented programming, our simulation system can be extended to other global navigation satellite systems (GNSSs) simply by adding the orbital information of the corresponding GNSS satellites. We demonstrated the applicability of our simulation system in an experimental simulation for Shinjuku, an area of Tokyo filled with skyscrapers.

The subspace algorithm can be utilized for the blind detection of space-time block codes (STBC) without knowledge of channel state information (CSI) both at the transmitter and receiver. However, its performance degrades when the channels are correlated. In this letter, we analyze the impact of channel correlation from the orthogonality loss between the transmit signal subspace (TSS) and the statistical noise subspace (SNS). Based on the decoding property of the subspace algorithm, we propose a revised detection in favor of the channel correlation matrix (CCM) only known to the receiver. Then, a joint transmit-receive preprocessing scheme is derived to obtain a further performance improvement when the CCM is available both at the transmitter and receiver. Analysis and simulation results indicate that the proposed methods can significantly improve the blind detection performance of STBC over the correlated channels.

We propose a method of crosstalk analysis for two bent transmission lines with vias at both ends on a PCB using a circuit-concept approach in the quasi-static condition. In this condition, the electromagnetic fields can be approximately estimated by the quasi-static terms of the accurate Green's function in an inhomogeneous medium. Thus we obtain a circuit model in an ABCD matrix by taking account of the fields generated by a longitudinal line and a vertical via on a PCB. To verify the proposed approach, we conducted some experiments and compared our approach's results with measured results and a commercial electromagnetic solver's results.

A new method of cancellation of IM3 using current feedback has been proposed for a multi-stage RFIC amplifier. In order to cancel the IM3 present in an output signal of the amplifier, the IIP3 level and IM3 phase of the amplifier are adjusted by means of feedback circuit techniques, so that the target specification is satisfied. By estimating the IIP3 level and IM3 phase variations for two states in situations with and without feedback possessing linear factors, the parameters of a feedback circuit can be calculated. To confirm the validity of the method, we have investigated two approaches; one including an analytical approach to designing a two-stage feedback amplifier, achieving an IIP3 level improvement of 14.8 dB. The other method involves the fabrication of single-stage amplifiers with and without feedback, operating at 850 MHz, both of which were designed as an integrated circuit using a 0.18 µm SiGe BiCMOS process. The fabricated IC's were tested using a load-pull measurement system, and a good agreement between the estimated and measured IIP3 level and IM3 phase variations has been achieved. Further studies show that the error in these variations, as estimated by the method, has been found to be less than 1.5 dB and 15 degrees, respectively, when the load admittance at 1701 MHz was greater than 1/50 S.

We propose a periodic binary sequence that compress a pulse to a width of severel chips. In the region of relatively small compression ratios, many periodic binary sequences exist for which Peak Side Lobe Levels (PSLs) are smaller than that those of conventional codes such as m-sequences.

A de-embedding technique for the measurement of very small parasitic capacitances of package or small module interconnects is presented. At high frequencies small parasitic capacitances become important, and measurement probes can strongly affect measurement results. The present technique is based on additional measurements with only one tip of the probe touching one conductor, while the second tip is kept floating on the substrate. A necessary condition for its application is that the measured capacitance does not depend on the position of the floating probe tip. Measurements with inverted probe tip polarities are also used. In this way, the capacitances between probe tips and DUT can be estimated together with the parasitic capacitances of interest. Depending on the required accuracy, de-embedding of different orders have been introduced, which consider capacitance configurations of increasing complexity. The technique requires the solution of one or more systems of non-linear equations. In the present example the minimization of the norm of the residual of the system has been treated as a least squares problem, and has been solved numerically with MATLAB. The accuracy of the measurement can be also approximately estimated with the residual. As application example, a small module with power and ground planes has been considered. Two different probes have been used. Even though the stray capacitances of the probes are very different, the values of the extracted parasitic capacitances are in agreement with each other. The accuracy has been verified also with simulation results. To this purpose, a combination of known formulas from the literature, a 2D Finite Element Method (FEM) tool and a 3D Boundary Element Method (BEM) tool have been used. A high accuracy can be obtained, even when a strong capacitive coupling between probe ground and DUT is present. The technique can be applied also when only a subset of measurement results are available.

With the rapid progress of electronic and information technology, an expectation for the realization of body area network (BAN) has risen. However, on-body transmission characteristics are greatly dependent on the frequency, and a high-speed transmission is difficult due to the remarkable signal attenuation at higher frequencies. In this study, we proposed a pulse transmission system with the frequencies at dozens of mega-hertzes. The system was based on an impulse radio (IR) scheme with bi-phase modulation. By using the frequency-dependent finite difference time domain (FD2TD) method, we investigated the on-body transmission characteristics and derived a path loss expression. Based on the transmission characteristics, we also investigated the influences of white Gaussian noises and other narrow-band interferences on the communication link budget and bit error rate (BER) performance. The results have shown the feasibility of the proposed on-body IR communication system.

A 1-V operational sigma-delta modulator with a second-order passive switched capacitor filter is designed and fabricated by using a 90 nm CMOS process. No gate-voltage bootstrapped scheme is adopted to drive analog switches, and the voltage gain of a comparator is chosen to be 94 dB. The experimental results show that the peak SNR reached 68.9 dB with a frequency bandwidth of 40 kHz when the clock was 40 MHz.

In this paper, we propose two 2's-complement fixed-width Booth multipliers that can generate an n-bit product from an n-bit multiplicand and an n-bit multiplier. Compared with previous designs, our multipliers have smaller truncation error, less area, and smaller time delay in the critical paths. A four-step approach is adopted to search for the best error-compensation bias in designing a multiplier suitable for VLSI implementation. Last but not least, we show the superior capability of our designs by inscribing it in a speech signal processor. Simulation results indicate that this novel design surpasses the previous fixed-width Booth multiplier in the precision of the product. An average error reduction of 65-84% compared with a direct-truncation fixed-width multiplier is achieved by adding only a few logic gates.

We consider an initialization problem in single-hop radio networks. The initialization is the task of assigning distinct ID numbers to nodes in a network. We have greatly improved the previous results [10] for the initialization in an n-node network. We propose randomized initialization algorithms in two cases. The first case is that n is known to all the nodes and the second case is that n is unknown to all the nodes. The algorithm for the first case completes in en+ln n+O (1) expected time slots, and the algorithm for the second case completes in en+O() expected slots. The main idea of the algorithm for the case that n is unknown is presumption of the number of nodes. In the algorithm, each node presumes the number of nodes efficiently and is assigned ID by using the algorithm for the case that n is known with the presumption value.

In order to improve the antenna gain, a composite right/left-handed (CRLH) leaky-wave (LW) antenna composed of symmetrical unit cells with short stubs terminated by vertical vias is designed. The use of symmetrical unit cells suppresses the cross-polarization of radiation to less than 23 dB. By comparing the measured radiation characteristics to that of a conventional CRLH LW antenna without short stub in the X-band, it is shown that the presented CRLH LW antenna with 51 unit cells offers a narrower beam and the antenna gain improves 4.1, 2.2 and 3.1 dB in the backward, broadside and forward directions of radiation, respectively.

List decoding is a process by which a list of decoded words is output instead of one. This works for a larger noise threshold than the traditional algorithms. Under some circumstances it becomes useful to be able to find out the actual message from the list. List decoding is assumed to be successful, meaning, the sent message features in the decoded list. This problem has been considered by Guruswami. In Guruswami's work, this disambiguation is done by sending supplementary information through a costly, error-free channel. The model is meaningful only if the number of bits of side information required is much less than the message size. But using deterministic schemes one has to essentially send the entire message through the error free channel. Randomized strategies for both sender and receiver reduces the required number of bits of side information drastically. In Guruswami's work, a Reed-Solomon code based hash family is used to construct such randomized schemes. The scheme with probability utmost ε reports failure and returns the whole list. The scheme doesn't output a wrong message. Also, in Guruswami's work some theoretical bounds have been proved which lower bound the bits of side information required. Here we examine whether the gap between the theoretical bounds and existing schemes may be narrowed. Particularly, we use the same scheme as in Guruswami's work, but use hash families based on Hermitian curve and function fields of Garcia-Stichtenoth tower and analyze the number of bits of side information required for the scheme.

A highly multi-channel on-chip signal monitor and off-chip waveform acquisition processor established analog circuit diagnosis against environmental disturbances in SoC. An array of 53 distributed probes followed by a single shared waveform acquisition kernel is embedded in a 0.18-µm CMOS experimental on-chip test bench. In combination with the off-chip processor materialized in FPGA and a host PC, fully automated on-chip waveform monitoring achieves high-throughput data acquisition of 300 ms per sample point with adaptive 10-bit timing and voltage resolutions at a minimum LSB of 100 ps and 400 µV, respectively. Analog signals of interest in a 1.5-bit conversion stage of a pipeline ADC were evaluated in terms of their response to substrate noises that globally existed in a chip. On-chip diagnosis derives in-depth findings relating to dynamic, large-signal, and sensitive behaviors of analog circuits in a real SoC environment, far beyond simulations with inevitably limited capacity.

In this paper, a new operational amplifier is presented that improves the specifications such as dc gain, common mode rejection ratio. To obtain these improvements, we have used the two important concepts of feedback and bulk amplification.

MIMO systems using a space division multiplexing (SDM) technique in which each transmit antenna sends an independent signal substream have been studied as one of the successful applications to increase data rates in wireless communications. The throughput of a MIMO channel can be maximized by using an eigenbeam-SDM (E-SDM) technique, and this paper investigates the practical performance of 22 and 44 MIMO E-SDM based on indoor measurements. The channel capacity and bit error rate obtained in various uniform linear array configurations are evaluated and are compared with the corresponding values for conventional SDM. Analysis results show that the bit error rate performance of E-SDM is better than that of SDM and that E-SDM gives better performance in line-of-sight (LOS) conditions than in non-LOS ones. They also show that the performance of E-SDM in LOS conditions depends very much on the array configuration.

An integrated multi-level simulation environment is developed for a highly collision-resistant RFID system. An analog/mixed-signal (AMS) simulator for a circuit-level description of analog front-end power/signal transmission through electro-magnetic coupling is concurrently connected to a tailored software simulator for system-level description of digital back-end processing of TH-CDMA based anti-collision communication. The feasibility of the RFID system in which more than 1,000 transponders can be identified by a single reader in 400 msec is successfuly explored, under a practical presence of field disturbances such as background noises in communication channels as well as variations of electro-magnetic coupling strengths for power transmission.

We have designed, fabricated and measured a second-order multibit switched-capacitor complex bandpass ΔΣAD modulator to evaluate our new algorithms and architecture. We propose a new structure of a complex bandpass filter in the forward path with I, Q dynamic matching, that is equivalent to the conventional one but can be divided into two separate parts. As a result, the ΔΣ modulator, which employs our proposed complex filter can also be divided into two separate parts, and there are no signal lines crossing between the upper and lower paths formed by complex filters and feedback DACs. Therefore, the layout design of the modulator can be simplified. The two sets of signal paths and circuits in the modulator are changed between I and Q while CLK is changed between high and low by adding multiplexers. Symmetric circuits are used for I and Q paths at a certain period of time, and they are switched by multiplexers to those used for Q and I paths at another period of time. In this manner, the effect of mismatches between I and Q paths is reduced. Two nine-level quantizers and four DACs are used in the modulator for low-power implementations and higher signal-to-noise-and-distortion (SNDR), but the nonlinearities of DACs are not noise-shaped and the SNDR of the ΔΣAD modulator degrades. We have also employed a new complex bandpass data-weighted averaging (DWA) algorithm to suppress nonlinearity effects of multibit DACs in complex form to achieve high accuracy; it can be realized by just adding simple digital circuitry. To evaluate these algorithms and architecture, we have implemented a modulator using 0.18 µm CMOS technology for operation at 2.8 V power supply; it achieves a measured peak SNDR of 64.5 dB at 20 MS/s with a signal bandwidth of 78 kHz while dissipating 28.4 mW and occupying a chip area of 1.82 mm2. These experimental results demonstrate the effectiveness of the above two algorithms, and the algorithms may be extended to other complex bandpass ΔΣAD modulators for application to low-IF receivers in wireless communication systems.

This paper proposes a Mel-Wiener filter to enhance Mel-LPC spectra in the presence of additive noise. The transfer function of the proposed filter is defined by using a first-order all-pass filter instead of unit delay. The filter coefficients are estimated based on minimization of the sum of the square error on the linear frequency scale without applying the bilinear transformation and efficiently implemented in the autocorrelation domain. The proposed filter does not require any time-frequency conversion, which saves a large amount of computational load. The performance of the proposed system is comparable to that of ETSI AFE. The optimum filter order is found to be 3, and thus filtering is computationally inexpensive. The computational cost of the proposed system except VAD is 53% of ETSI AFE.

This paper presents a novel method to increase an impedance of a current source. The proposed circuit with a cascode and gain-boosting configuration is also presented. The operation has been confirmed by simulation using a 0.18 µm CMOS technology.

When we consider user's convenience for electronic transactions, it might be desirable to generate a digital signature using biometrics. However, it is not easy nor practicable in today's communications environment because of inaccurate measuring and potential hill-climbing attacks with regard to biometrics, unless specific hardware storage is provided for manipulating signature keys or biometric templates securely. In this paper, we study a simple practical method for biometrics based digital signature generation without such restriction. It is based on the existing tools in software in our proposed model where a general digital signature such as RSA can be applied without losing its security. This is not a cryptography paper but rather written from the practical perspectives.