Comparative performance evaluation between parallel combinatory CDMA (PC-CDMA) and Direct Sequence CDMA (DS-CDMA) has been conducted for high speed radio communication up to 2 Mbps under a multipath Rayleigh fading environment. For both DS-CDMA and PC-CDMA, user information rate per code of 128 kbps, convolutional code with 1/2 coding rate, the same bit interleaving and QPSK data modulation are applied to get transmission symbol rate of 128 ksps. The chip rate of 4. 096 Mcps is used to investigate the possibility of 2 Mbps transmission using only 5 MHz bandwidth. So the spreading factor of the spreading code is 32 for DS-CDMA. In PC-CDMA, 128 ksps data stream is divided into four 32 ksps data streams and according to the every four bits pattern, corresponding spreading code of spreading factor of 128 and its polarity are selected out of eight candidate spreading codes. In soft decision Viterbi decoding applied to PC-CDMA, branch metric is calculated for every bit by weighting the output levels of the PC-CDMA correlators for eight candidate spreading codes. By computer simulation under vehicular environment model with six multipaths, it has been shown that PC-CDMA can offer more capacity approximately by double than DS-CDMA for both downlink and uplink under the condition such as for vehicular for BER of 10-3, and 2 Mbps transmission per cell for downlink is possible not only in isolated cell condition but also in omni cell condition by PC-CDMA.

This paper describes methods used in the design of a high speed burst modem applied for mobile communication systems. The modem has burst mode operations including burst mode AGC (automatic gain control), burst mode BTR (bit timing recovery), adaptive equalization, and diversity based on a selection algorithm to achieve a higher performance in multipath fading channels. Moreover, the performance of the burst modem, which is developed using analog signal processing devices, DSPs (digital signal processors), and FPGAs (field programmable gate arrays), is analyzed experimentally. Results show that the modem can suppress irreducible BER values below 1. 0e-6 and attains a 2 dB implicit diversity gain over multipath fading channels modeled by a two-ray impulse response system with independent Rayleigh fading.

This paper proposes a multiple QoS control scheme that combines the head-of-line priority (HOLP) discipline with equivalent-window connection admission control (CAC). The proposed scheme can support the different cell loss ratios of both delay-sensitive traffic in high-priority buffers and delay-tolerant traffic in low-priority buffers. The CAC scheme extends a measurement-based CAC algorithm for a single buffer to the low-priority buffer with the HOLP discipline to provide the cell loss ratio objective. We introduce an equivalent window for monitoring low-priority cell streams. The equivalent window size equals the period within which the number of times the low-priority buffer is scanned to read cells is constant. Thus the equivalent window size varies with the high-priority queueing state. Numerical results indicate that the proposed QoS control scheme using the equivalent-window CAC can utilize network resources more effectively than the conventional control scheme which is Virtual Path (VP) separation for different cell loss requirement services. In addition, it is confirmed that the proposed scheme provides conservative admissible loads. Thus, this proposed scheme can achieve large statistical gains while providing both high-priority and low-priority cell loss ratio objectives. The proposed scheme will be very useful for cost-effective multimedia services that have different QoS requirements.

One-dimensional Cellular Automata (CA's) are considered as potential pseudorandom pattern generators to generate highly random parallel patterns with simple hardware configurations. A class of linear, binary, and of nearest neighbor (radius = 1) CA's is referred to here as elementary ones. This paper investigates operations of such CA's with fixed boundary conditions when non-null boundary values are applied to them. By modifying transition matrices of elementary CA's to include the influence of boundary values, structures of state transition diagrams are determined.

Two-dimensional (2-D) adaptive digital filters (ADFs) for 2-D signal processing have become a fascinating area of the adaptive signal processing. However, conventional 2-D FIR ADF's require a lot of computations. For example, the TDLMS requires 2N2 multiplications per pixel. We propose a new 2-D adaptive filter using the FFTs. The proposed adaptive filter carries out the fast convolution using overlap-save method, and has parallel structure. Thus, we can reduce the computational complexity to O(log2N) per pixel.

This paper proposes a fast scheduling algorithm based on gradual time-frame reduction for datapath synthesis of digital signal processing hardwares. The objective of the algorithm is to minimize the costs for functional units and registers and to maximize connectivity under given computation time and initiation interval. Incorporating the connectivity in a scheduling stage can reduce multiplexer counts in resource binding. The algorithm maximizes connectivity with maintaining low time complexity and obtains datapath designs with totally small hardware costs in the high-level synthesis environment. The algorithm also resolves inter-iteration data dependencies and thus realizes pipelined datapaths. The experimental results demonstrate that the proposed algorithm reduces the multiplexer counts after resource binding with maintaining low costs for functional units and registers compared with eight conventional schedulers.

The second-generation CMOS current conveyors are developed for high-frequency analog signal processing. It consists of a source follower for the voltage input and a regulated current mirror for the current input and output. The voltage and current input stages are also coupled by a current mirror to reduce the impedance of the current input port. Simulations show that this architecture provides the high input/output conductance ratio and the inherent voltage and current transfer bandwidths extending beyond 100 MHz. The prototype chips fabricated using 0. 6 µm CMOS process have confirmed the simulated performances, though the voltage and current bandwidth are limited to 20 MHz and 35 MHz, respectively, by the built-in capacitances of the bonding pads.

This paper presents a new architecture for multiple-input signature analyzers. The proposed signature analyzer with Hδ inputs is designed by parallelizing a GLFSR(δ,m), where δ is the number of input signals and m is the number of stages in the feedback shift register. The GLFSR, developed by Pradhan and Gupta, is a general framework for representing LFSR-based signature analyzers. The parallelization technique described in this paper can be applied to any kind of GLFSR signature analyzer, e. g. , SISRs, MISRs, multiple MISRs and MLFSRs. It is shown that a proposed signature analyzer with Hδ inputs requires less complex hardware than either single GLFSR(Hδ,m)s or a parallel construction of the H original GLFSR(δ,m)s. It is also shown that the proposed signature analyzer, while requiring simpler hardware, has comparable aliasing probability with analyzers using conventional GLFSRs for some CUT error models of the same test response length and test time. The proposed technique would be practical for testing CUTs with a large number of output sequences, since the test circuit occupies a smaller area on the LSI chip than the conventional multiple-input signature analyzers of comparable aliasing probability.

This paper proves a general sampling theorem, which is an extension of Shannon's classical theorem. Let o be a closed subspace of square integrable functions and call o a signal space. The main aim of this paper is giving a necessary and sufficient condition for unique existence of the sampling basis {Sn}o without band-limited assumption. Using the general sampling theorem we rigorously discuss a frequency domain treatment and a general signal space spanned by translations of a single function. Many known sampling theorems in signal spaces, which have applications for multiresolution analysis in wavelets theory are corollaries of the general sampling theorem.

Subharmonically Injection-locked oscillators (ILO's) with very wide injection-locking ability are presented. Two types of ILO MMIC's with this ability are proposed. The oscillation frequency tuning function of the ILO MMIC is very useful for expansion of the injection locking range at higher subharmonics. One consists of a shunt varactor diode inserted into the oscillation loop, and the other incorporates a vector-combining configuration with in-phase divider and 90 degree hybrid. Using three-dimensional MMIC's technology which can offer miniature and high-density passive circuits, the vector-combining type ILO is formed in a very compact area of 1. 7 mm2. Fabricated 20 GHz-band ILO achieves a wide tuning ranges of 870 MHz, resulting in a very wide locking range for higher subharmonics. The wide frequency tuning ability also reduces phase noise, shortens a locking time and compensates the center frequency deviation against temperature, as well as increasing locking range. The measured results show that the ILO configuration is extremely suitable for realizing simple, fully monolithic and low phase noise millimeter-wave frequency synthesizers.

This paper deals with a set of differential operators for calculating the differentials of an observed signal by the Daubechies wavelet and its application for the estimation of the transfer function of a linear system by using non-stationary step-like signals. The differential operators are constructed by iterative projections of the differential of the scaling function for a multiresolution analysis into a dilation subspace. By the proposed differential operators we can extract the arbitrary order differentials of a signal. We propose a set of identifiable filters constructed by the sum of multiple filters with the first order lag characteristics. Using the above differentials and the identifiable filters we propose an identification method for the transfer function of a linear system. In order to ensure the appropriateness and effectiveness of the proposed method some numerical simulations are presented.

We present experimental results for a structural learning method of feed-forward neural-network classifiers using Principal Component Analysis (PCA) network and Species Genetic Algorithm (SGA). PCA network is used as a means for reducing the number of input units. SGA, a modified GA, is employed for selecting the proper number of hidden units and optimizing the connection links. Experimental results show that the proposed method is a useful tool for choosing an appropriate architecture for high dimensions.

In this paper, a new traffic sign detection algorithm and a symbol recognition algorithm are proposed. For a traffic sign detection, a dominant color transform is introduced, which serves as a tool of highlighting a dominant primary color, while discarding the other two primary colors. For a symbol recognition, the curvilinear shape distribution on a circle centered on the centroid of the symbol, called a circular pattern vector, is used as a spatial feature of the symbol. The circular pattern vector is invariant to scaling, translation, and rotation. As simulation results, the effectiveness of traffic sign detection and recognition algorithms are confirmed.

In this paper a generalized recursive block coding (GRBC) scheme is put forward with a novel non-causal predictor free from the separable assumption on the original random field and then applied to an image data compression so as to compare with the conventional recursive block coding (RBC). In the presently proposed predictor to derive the residual random fields, the constraint on the separability of the original image is completely removed in general in contrast with the conventional 2-dimensional RBC based on non-causal predictive method which eventually leads to the one-dimensional RBC strategy. In addition the resultant characteristic KL functions for the residual errors in GRBC are confirmed to be substantially reduced to the same orthogonal discrete sine functions (DSFs) as RBC, whereas the corresponding eigen values are elucidated to be not expressed in the direct product form but in a somewhat generalized form. Also a novel bit allocation method for the transformed coefficients of the residuals is argued in connection with the eigen value problem for the residual random fields. Finally, introducing an adaptive zonal coding method, the presently proposed scheme is applied to the block codings to clarify a certain advantage beyond the conventional recursive block transform coding.

In this paper, we propose a new denoising algorithm based on the dyadic wavelet transform (DWT) for ECG signals corrupted with different types of synthesized noise. Using the property that DWT is overcomplete, we define some convex sets in the set of wavelet coefficients and give an iterative method of the projection on the convex sets. The results show that the noises are not only removed from ECG signals, but also the ECG signals are reconstructed, which is used in detecting QRS complex. The performance of the proposed algorithm is demonstrated by some experiments in comparison with the conventional methods.

This paper describes design approach and power performance of a single 1. 5 V operation two-stage power amplifier MMIC for 2. 4 GHz wireless local area network applications. The MMIC with 0. 760. 96 mm2 area includes SrTiO3 (STO) capacitors with a high capacitance density of 8. 0 fF/µm2 and double-doped AlGaAs/InGaAs/AlGaAs heterojunction FETs with a shallow threshold voltage of -0. 24 V. Utilizing a series STO capacitor and a shunt inductor as an output matching circuit, the total chip size was reduced by 40% as compared with an MMIC utilizing SiNx capacitors. Under single 1.5 V operation, the developed MMIC delivered an output power of 110 mW (20.4 dBm) and a power-added efficiency (PAE) of 36.7% with an associated gain of 20.0 dB at 2.4 GHz. Even operated at a drain bias voltage of 0.8 V, the MMIC exhibited a high PAE of 31.0%.

An equivalent circuit for designing a coherent power combiner using a quasi-optical resonator has been developed. In the resonator, large numbers of devices (HEMT, HBT, etc. ) are arrayed two dimensionally and mounted on a surface of a metal grooved-mirror. A newly developed equivalent circuit for the resonator has been constructed using a transmission-line model. Experiments performed at Ku-band have shown that oscillation frequencies in a 33 HEMT array oscillator can be predicted with errors of less than 1% by using this equivalent circuit.

This paper presents some fundamental properties of multiple-valued logic functions monotonic in a partial-ordering relation which is introduced in the set of truth values and does not necessarily have the greatest or least element. Two kinds of necessary and sufficient conditions for monotonic p-valued functions are given with the proofs. Their logic formulas using unary operators defined in the partial-ordering relation and a simplification method for those logic formulas are also given. These results include as their special cases our former results for p-valued functions monotonic in the ambiguity relation which is a partial-ordering relation with the greatest element.

This paper describes a complete Mandarin text-to-speech system on time domain. We take advantage of the advancement of memory technology, which achieves ever-increasing capacity and ever-lower price. We try to collect as more as possible the synthesis units in a Mandarin text-to-speech system. With such an effort, we developed simpler speech processing techniques and achieved faster processing speed by using only an ordinary personal computer. We also developed delicate methods to measure the intelligibility, comprehensibility, and naturalness of a Mandarin text-to-speech system. Our system performs very well compared with existing systems. We first develop a set of useful algorithms and methods to deal with some features of the syllables, such as duration, amplitude, fundamental frequency, pause, and so on. Based on these algorithms and methods, we then build a Mandarin text-to-speech system. Given any Chinese text in some computerized form, e. g. , in BIG-5 code representation, our system can pronounce the text in real time. Our text-to-speech system runs on an IBM 80486 compatible PC, with no special hardware for signal processing. The evaluation of our text-to-speech system is based on a proposed subjective evaluation method. An evaluation was made by 51 undergraduate students. The intelligibility of our text-to-speech system is 99. 5%, the comprehensibility of our text-to-speech system is 92. 6%, and the naturalness of our text-to-speech system is 81. 512 points in a percentile grading system (the highest score is 100 points, and the lowest score is 0 point). Other 40 Ph. D. students also did the same evaluation about naturalness. The result shows that the naturalness of our text-to-speech system is 82. 8 points in a percentile grading system.

We present a realization of the transparent wave absorber effective for the use at V-band frequency. First, we propose a structure of the transparent wave absorber consisting of spacer (polycarbonate) and two transparent resistive sheet (polyethylene terephtalate deposited with Indium Tin Oxide) used as a reflection film and an absorption film. Second, a design chart for this type of wave absorber is shown. Third, a design method and manufacturing process of the transparent wave absorber are described particularly for V-band frequency. As a result, the measurement of reflection loss of the absorber indicate that a peak absorption of 32-38 dB is attained at a target frequency of 60 GHz.